contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.cpp

   1 //===-- RegisterContextFreeBSD_x86_64.cpp ----------------------*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===---------------------------------------------------------------------===//
   9
  10 #include "RegisterContextFreeBSD_x86_64.h"
  11 #include "RegisterContextFreeBSD_i386.h"
  12 #include "RegisterContextPOSIX_x86.h"
  13 #include <vector>
  14
  15 using namespace lldb_private;
  16 using namespace lldb;
  17
  18 // http://svnweb.freebsd.org/base/head/sys/x86/include/reg.h
  19 typedef struct _GPR {
  20   uint64_t r15;
  21   uint64_t r14;
  22   uint64_t r13;
  23   uint64_t r12;
  24   uint64_t r11;
  25   uint64_t r10;
  26   uint64_t r9;
  27   uint64_t r8;
  28   uint64_t rdi;
  29   uint64_t rsi;
  30   uint64_t rbp;
  31   uint64_t rbx;
  32   uint64_t rdx;
  33   uint64_t rcx;
  34   uint64_t rax;
  35   uint32_t trapno;
  36   uint16_t fs;
  37   uint16_t gs;
  38   uint32_t err;
  39   uint16_t es;
  40   uint16_t ds;
  41   uint64_t rip;
  42   uint64_t cs;
  43   uint64_t rflags;
  44   uint64_t rsp;
  45   uint64_t ss;
  46 } GPR;
  47
  48 struct DBG {
  49   uint64_t dr[16]; /* debug registers */
  50                    /* Index 0-3: debug address registers */
  51                    /* Index 4-5: reserved */
  52                    /* Index 6: debug status */
  53                    /* Index 7: debug control */
  54                    /* Index 8-15: reserved */
  55 };
  56
  57 struct UserArea {
  58   GPR gpr;
  59   FPR fpr;
  60   DBG dbg;
  61 };
  62
  63 #define DR_OFFSET(reg_index) (LLVM_EXTENSION offsetof(DBG, dr[reg_index]))
  64
  65 //---------------------------------------------------------------------------
  66 // Include RegisterInfos_x86_64 to declare our g_register_infos_x86_64
  67 // structure.
  68 //---------------------------------------------------------------------------
  69 #define DECLARE_REGISTER_INFOS_X86_64_STRUCT
  70 #include "RegisterInfos_x86_64.h"
  71 #undef DECLARE_REGISTER_INFOS_X86_64_STRUCT
  72
  73 static std::vector<lldb_private::RegisterInfo> &GetSharedRegisterInfoVector() {
  74   static std::vector<lldb_private::RegisterInfo> register_infos;
  75   return register_infos;
  76 }
  77
  78 static const RegisterInfo *
  79 GetRegisterInfo_i386(const lldb_private::ArchSpec &arch) {
  80   static std::vector<lldb_private::RegisterInfo> g_register_infos(
  81       GetSharedRegisterInfoVector());
  82
  83   // Allocate RegisterInfo only once
  84   if (g_register_infos.empty()) {
  85     // Copy the register information from base class
  86     std::unique_ptr<RegisterContextFreeBSD_i386> reg_interface(
  87         new RegisterContextFreeBSD_i386(arch));
  88     const RegisterInfo *base_info = reg_interface->GetRegisterInfo();
  89     g_register_infos.insert(g_register_infos.end(), &base_info[0],
  90                             &base_info[k_num_registers_i386]);
  91
  92 //---------------------------------------------------------------------------
  93 // Include RegisterInfos_x86_64 to update the g_register_infos structure
  94 //  with x86_64 offsets.
  95 //---------------------------------------------------------------------------
  96 #define UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
  97 #include "RegisterInfos_x86_64.h"
  98 #undef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
  99   }
 100
 101   return &g_register_infos[0];
 102 }
 103
 104 static const RegisterInfo *
 105 PrivateGetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) {
 106   switch (target_arch.GetMachine()) {
 107   case llvm::Triple::x86:
 108     return GetRegisterInfo_i386(target_arch);
 109   case llvm::Triple::x86_64:
 110     return g_register_infos_x86_64;
 111   default:
 112     assert(false && "Unhandled target architecture.");
 113     return nullptr;
 114   }
 115 }
 116
 117 static uint32_t
 118 PrivateGetRegisterCount(const lldb_private::ArchSpec &target_arch) {
 119   switch (target_arch.GetMachine()) {
 120   case llvm::Triple::x86:
 121     // This vector should have already been filled.
 122     assert(!GetSharedRegisterInfoVector().empty() &&
 123            "i386 register info vector not filled.");
 124     return static_cast<uint32_t>(GetSharedRegisterInfoVector().size());
 125   case llvm::Triple::x86_64:
 126     return static_cast<uint32_t>(sizeof(g_register_infos_x86_64) /
 127                                  sizeof(g_register_infos_x86_64[0]));
 128   default:
 129     assert(false && "Unhandled target architecture.");
 130     return 0;
 131   }
 132 }
 133
 134 RegisterContextFreeBSD_x86_64::RegisterContextFreeBSD_x86_64(
 135     const ArchSpec &target_arch)
 136     : lldb_private::RegisterInfoInterface(target_arch),
 137       m_register_info_p(PrivateGetRegisterInfoPtr(target_arch)),
 138       m_register_count(PrivateGetRegisterCount(target_arch)) {}
 139
 140 size_t RegisterContextFreeBSD_x86_64::GetGPRSize() const { return sizeof(GPR); }
 141
 142 const RegisterInfo *RegisterContextFreeBSD_x86_64::GetRegisterInfo() const {
 143   return m_register_info_p;
 144 }
 145
 146 uint32_t RegisterContextFreeBSD_x86_64::GetRegisterCount() const {
 147   return m_register_count;
 148 }