1 //===-- RegisterContextLinux_arm.cpp ---------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===---------------------------------------------------------------------===//
14 #include "llvm/Support/Compiler.h"
15 #include "lldb/lldb-defines.h"
17 #include "RegisterContextLinux_arm.h"
20 using namespace lldb_private;
22 // Based on RegisterContextDarwin_arm.cpp
23 #define GPR_OFFSET(idx) ((idx) * 4)
24 #define FPU_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextLinux_arm::GPR))
25 #define FPSCR_OFFSET (LLVM_EXTENSION offsetof (RegisterContextLinux_arm::FPU, fpscr) + sizeof (RegisterContextLinux_arm::GPR))
26 #define EXC_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextLinux_arm::GPR) + sizeof (RegisterContextLinux_arm::FPU))
27 #define DBG_OFFSET(reg) ((LLVM_EXTENSION offsetof (RegisterContextLinux_arm::DBG, reg) + sizeof (RegisterContextLinux_arm::GPR) + sizeof (RegisterContextLinux_arm::FPU) + sizeof (RegisterContextLinux_arm::EXC)))
29 #define DEFINE_DBG(reg, i) #reg, NULL, sizeof(((RegisterContextLinux_arm::DBG *)NULL)->reg[i]), DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL
30 #define REG_CONTEXT_SIZE (sizeof (RegisterContextLinux_arm::GPR) + sizeof (RegisterContextLinux_arm::FPU) + sizeof (RegisterContextLinux_arm::EXC))
32 //-----------------------------------------------------------------------------
33 // Include RegisterInfos_arm to declare our g_register_infos_arm structure.
34 //-----------------------------------------------------------------------------
35 #define DECLARE_REGISTER_INFOS_ARM_STRUCT
36 #include "RegisterInfos_arm.h"
37 #undef DECLARE_REGISTER_INFOS_ARM_STRUCT
39 static const lldb_private::RegisterInfo *
40 GetRegisterInfoPtr (const lldb_private::ArchSpec &target_arch)
42 switch (target_arch.GetMachine())
44 case llvm::Triple::arm:
45 return g_register_infos_arm;
47 assert(false && "Unhandled target architecture.");
53 GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch)
55 switch (target_arch.GetMachine())
57 case llvm::Triple::arm:
58 return static_cast<uint32_t>(sizeof(g_register_infos_arm) / sizeof(g_register_infos_arm[0]));
60 assert(false && "Unhandled target architecture.");
65 RegisterContextLinux_arm::RegisterContextLinux_arm(const lldb_private::ArchSpec &target_arch) :
66 lldb_private::RegisterInfoInterface(target_arch),
67 m_register_info_p(GetRegisterInfoPtr(target_arch)),
68 m_register_info_count(GetRegisterInfoCount(target_arch))
73 RegisterContextLinux_arm::GetGPRSize() const
75 return sizeof(struct RegisterContextLinux_arm::GPR);
78 const lldb_private::RegisterInfo *
79 RegisterContextLinux_arm::GetRegisterInfo() const
81 return m_register_info_p;
85 RegisterContextLinux_arm::GetRegisterCount() const
87 return m_register_info_count;