1 //===-- RegisterContextLinux_mips64.cpp ------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===---------------------------------------------------------------------===//
14 // For eh_frame and DWARF Register numbers
15 #include "RegisterContextLinux_mips64.h"
17 // For GP and FP buffers
18 #include "RegisterContext_mips.h"
20 // Internal codes for all mips32 and mips64 registers
21 #include "lldb-mips-linux-register-enums.h"
24 using namespace lldb_private;
26 //---------------------------------------------------------------------------
27 // Include RegisterInfos_mips64 to declare our g_register_infos_mips64
29 //---------------------------------------------------------------------------
30 #define DECLARE_REGISTER_INFOS_MIPS64_STRUCT
32 #include "RegisterInfos_mips64.h"
34 #undef DECLARE_REGISTER_INFOS_MIPS64_STRUCT
36 //---------------------------------------------------------------------------
37 // Include RegisterInfos_mips to declare our g_register_infos_mips structure.
38 //---------------------------------------------------------------------------
39 #define DECLARE_REGISTER_INFOS_MIPS_STRUCT
40 #include "RegisterInfos_mips.h"
41 #undef DECLARE_REGISTER_INFOS_MIPS_STRUCT
43 // mips64 general purpose registers.
44 const uint32_t g_gp_regnums_mips64[] = {
45 gpr_zero_mips64, gpr_r1_mips64, gpr_r2_mips64,
46 gpr_r3_mips64, gpr_r4_mips64, gpr_r5_mips64,
47 gpr_r6_mips64, gpr_r7_mips64, gpr_r8_mips64,
48 gpr_r9_mips64, gpr_r10_mips64, gpr_r11_mips64,
49 gpr_r12_mips64, gpr_r13_mips64, gpr_r14_mips64,
50 gpr_r15_mips64, gpr_r16_mips64, gpr_r17_mips64,
51 gpr_r18_mips64, gpr_r19_mips64, gpr_r20_mips64,
52 gpr_r21_mips64, gpr_r22_mips64, gpr_r23_mips64,
53 gpr_r24_mips64, gpr_r25_mips64, gpr_r26_mips64,
54 gpr_r27_mips64, gpr_gp_mips64, gpr_sp_mips64,
55 gpr_r30_mips64, gpr_ra_mips64, gpr_sr_mips64,
56 gpr_mullo_mips64, gpr_mulhi_mips64, gpr_badvaddr_mips64,
57 gpr_cause_mips64, gpr_pc_mips64, gpr_config5_mips64,
58 LLDB_INVALID_REGNUM // register sets need to end with this flag
61 static_assert((sizeof(g_gp_regnums_mips64) / sizeof(g_gp_regnums_mips64[0])) -
63 k_num_gpr_registers_mips64,
64 "g_gp_regnums_mips64 has wrong number of register infos");
66 // mips64 floating point registers.
67 const uint32_t g_fp_regnums_mips64[] = {
68 fpr_f0_mips64, fpr_f1_mips64, fpr_f2_mips64, fpr_f3_mips64,
69 fpr_f4_mips64, fpr_f5_mips64, fpr_f6_mips64, fpr_f7_mips64,
70 fpr_f8_mips64, fpr_f9_mips64, fpr_f10_mips64, fpr_f11_mips64,
71 fpr_f12_mips64, fpr_f13_mips64, fpr_f14_mips64, fpr_f15_mips64,
72 fpr_f16_mips64, fpr_f17_mips64, fpr_f18_mips64, fpr_f19_mips64,
73 fpr_f20_mips64, fpr_f21_mips64, fpr_f22_mips64, fpr_f23_mips64,
74 fpr_f24_mips64, fpr_f25_mips64, fpr_f26_mips64, fpr_f27_mips64,
75 fpr_f28_mips64, fpr_f29_mips64, fpr_f30_mips64, fpr_f31_mips64,
76 fpr_fcsr_mips64, fpr_fir_mips64, fpr_config5_mips64,
77 LLDB_INVALID_REGNUM // register sets need to end with this flag
80 static_assert((sizeof(g_fp_regnums_mips64) / sizeof(g_fp_regnums_mips64[0])) -
82 k_num_fpr_registers_mips64,
83 "g_fp_regnums_mips64 has wrong number of register infos");
85 // mips64 MSA registers.
86 const uint32_t g_msa_regnums_mips64[] = {
87 msa_w0_mips64, msa_w1_mips64, msa_w2_mips64, msa_w3_mips64,
88 msa_w4_mips64, msa_w5_mips64, msa_w6_mips64, msa_w7_mips64,
89 msa_w8_mips64, msa_w9_mips64, msa_w10_mips64, msa_w11_mips64,
90 msa_w12_mips64, msa_w13_mips64, msa_w14_mips64, msa_w15_mips64,
91 msa_w16_mips64, msa_w17_mips64, msa_w18_mips64, msa_w19_mips64,
92 msa_w20_mips64, msa_w21_mips64, msa_w22_mips64, msa_w23_mips64,
93 msa_w24_mips64, msa_w25_mips64, msa_w26_mips64, msa_w27_mips64,
94 msa_w28_mips64, msa_w29_mips64, msa_w30_mips64, msa_w31_mips64,
95 msa_fcsr_mips64, msa_fir_mips64, msa_mcsr_mips64, msa_mir_mips64,
97 LLDB_INVALID_REGNUM // register sets need to end with this flag
100 static_assert((sizeof(g_msa_regnums_mips64) / sizeof(g_msa_regnums_mips64[0])) -
102 k_num_msa_registers_mips64,
103 "g_msa_regnums_mips64 has wrong number of register infos");
105 // Number of register sets provided by this context.
106 constexpr size_t k_num_register_sets = 3;
108 // Register sets for mips64.
109 static const RegisterSet g_reg_sets_mips64[k_num_register_sets] = {
110 {"General Purpose Registers", "gpr", k_num_gpr_registers_mips64,
111 g_gp_regnums_mips64},
112 {"Floating Point Registers", "fpu", k_num_fpr_registers_mips64,
113 g_fp_regnums_mips64},
114 {"MSA Registers", "msa", k_num_msa_registers_mips64, g_msa_regnums_mips64},
118 RegisterContextLinux_mips64::GetRegisterSet(size_t set) const {
119 if (set >= k_num_register_sets)
122 switch (m_target_arch.GetMachine()) {
123 case llvm::Triple::mips64:
124 case llvm::Triple::mips64el:
125 return &g_reg_sets_mips64[set];
127 assert(false && "Unhandled target architecture.");
134 RegisterContextLinux_mips64::GetRegisterSetCount() const {
135 return k_num_register_sets;
138 static const RegisterInfo *GetRegisterInfoPtr(const ArchSpec &target_arch) {
139 switch (target_arch.GetMachine()) {
140 case llvm::Triple::mips64:
141 case llvm::Triple::mips64el:
142 return g_register_infos_mips64;
143 case llvm::Triple::mips:
144 case llvm::Triple::mipsel:
145 return g_register_infos_mips;
147 assert(false && "Unhandled target architecture.");
152 static uint32_t GetRegisterInfoCount(const ArchSpec &target_arch) {
153 switch (target_arch.GetMachine()) {
154 case llvm::Triple::mips64:
155 case llvm::Triple::mips64el:
156 return static_cast<uint32_t>(sizeof(g_register_infos_mips64) /
157 sizeof(g_register_infos_mips64[0]));
158 case llvm::Triple::mips:
159 case llvm::Triple::mipsel:
160 return static_cast<uint32_t>(sizeof(g_register_infos_mips) /
161 sizeof(g_register_infos_mips[0]));
163 assert(false && "Unhandled target architecture.");
168 uint32_t GetUserRegisterInfoCount(const ArchSpec &target_arch,
170 switch (target_arch.GetMachine()) {
171 case llvm::Triple::mips:
172 case llvm::Triple::mipsel:
174 return static_cast<uint32_t>(k_num_user_registers_mips);
175 return static_cast<uint32_t>(k_num_user_registers_mips -
176 k_num_msa_registers_mips);
177 case llvm::Triple::mips64el:
178 case llvm::Triple::mips64:
180 return static_cast<uint32_t>(k_num_user_registers_mips64);
181 return static_cast<uint32_t>(k_num_user_registers_mips64 -
182 k_num_msa_registers_mips64);
184 assert(false && "Unhandled target architecture.");
189 RegisterContextLinux_mips64::RegisterContextLinux_mips64(
190 const ArchSpec &target_arch, bool msa_present)
191 : lldb_private::RegisterInfoInterface(target_arch),
192 m_register_info_p(GetRegisterInfoPtr(target_arch)),
193 m_register_info_count(GetRegisterInfoCount(target_arch)),
194 m_user_register_count(
195 GetUserRegisterInfoCount(target_arch, msa_present)) {}
197 size_t RegisterContextLinux_mips64::GetGPRSize() const {
198 return sizeof(GPR_linux_mips);
201 const RegisterInfo *RegisterContextLinux_mips64::GetRegisterInfo() const {
202 return m_register_info_p;
205 uint32_t RegisterContextLinux_mips64::GetRegisterCount() const {
206 return m_register_info_count;
209 uint32_t RegisterContextLinux_mips64::GetUserRegisterCount() const {
210 return m_user_register_count;