1 //===-- RegisterContextPOSIX_arm64.cpp --------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
14 #include "lldb/Core/DataBufferHeap.h"
15 #include "lldb/Core/DataExtractor.h"
16 #include "lldb/Core/RegisterValue.h"
17 #include "lldb/Core/Scalar.h"
18 #include "lldb/Target/Target.h"
19 #include "lldb/Target/Thread.h"
20 #include "lldb/Host/Endian.h"
21 #include "llvm/Support/Compiler.h"
23 #include "RegisterContextPOSIX_arm64.h"
24 #include "Plugins/Process/elf-core/ProcessElfCore.h"
27 using namespace lldb_private;
29 // ARM64 general purpose registers.
30 const uint32_t g_gpr_regnums_arm64[] =
66 LLDB_INVALID_REGNUM // register sets need to end with this flag
68 static_assert(((sizeof g_gpr_regnums_arm64 / sizeof g_gpr_regnums_arm64[0]) - 1) == k_num_gpr_registers_arm64, \
69 "g_gpr_regnums_arm64 has wrong number of register infos");
71 // ARM64 floating point registers.
72 static const uint32_t g_fpu_regnums_arm64[] =
108 LLDB_INVALID_REGNUM // register sets need to end with this flag
110 static_assert(((sizeof g_fpu_regnums_arm64 / sizeof g_fpu_regnums_arm64[0]) - 1) == k_num_fpr_registers_arm64, \
111 "g_fpu_regnums_arm64 has wrong number of register infos");
113 // Number of register sets provided by this context.
116 k_num_register_sets = 2
119 // Register sets for ARM64.
120 static const lldb_private::RegisterSet
121 g_reg_sets_arm64[k_num_register_sets] =
123 { "General Purpose Registers", "gpr", k_num_gpr_registers_arm64, g_gpr_regnums_arm64 },
124 { "Floating Point Registers", "fpu", k_num_fpr_registers_arm64, g_fpu_regnums_arm64 }
127 bool RegisterContextPOSIX_arm64::IsGPR(unsigned reg)
129 return reg <= m_reg_info.last_gpr; // GPR's come first.
132 bool RegisterContextPOSIX_arm64::IsFPR(unsigned reg)
134 return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr);
137 RegisterContextPOSIX_arm64::RegisterContextPOSIX_arm64(lldb_private::Thread &thread,
138 uint32_t concrete_frame_idx,
139 lldb_private::RegisterInfoInterface *register_info)
140 : lldb_private::RegisterContext(thread, concrete_frame_idx)
142 m_register_info_ap.reset(register_info);
144 switch (register_info->m_target_arch.GetMachine())
146 case llvm::Triple::aarch64:
147 m_reg_info.num_registers = k_num_registers_arm64;
148 m_reg_info.num_gpr_registers = k_num_gpr_registers_arm64;
149 m_reg_info.num_fpr_registers = k_num_fpr_registers_arm64;
150 m_reg_info.last_gpr = k_last_gpr_arm64;
151 m_reg_info.first_fpr = k_first_fpr_arm64;
152 m_reg_info.last_fpr = k_last_fpr_arm64;
153 m_reg_info.first_fpr_v = fpu_v0_arm64;
154 m_reg_info.last_fpr_v = fpu_v31_arm64;
155 m_reg_info.gpr_flags = gpr_cpsr_arm64;
158 assert(false && "Unhandled target architecture.");
162 ::memset(&m_fpr, 0, sizeof m_fpr);
164 // elf-core yet to support ReadFPR()
165 lldb::ProcessSP base = CalculateProcess();
166 if (base.get()->GetPluginName() == ProcessElfCore::GetPluginNameStatic())
170 RegisterContextPOSIX_arm64::~RegisterContextPOSIX_arm64()
175 RegisterContextPOSIX_arm64::Invalidate()
180 RegisterContextPOSIX_arm64::InvalidateAllRegisters()
185 RegisterContextPOSIX_arm64::GetRegisterOffset(unsigned reg)
187 assert(reg < m_reg_info.num_registers && "Invalid register number.");
188 return GetRegisterInfo()[reg].byte_offset;
192 RegisterContextPOSIX_arm64::GetRegisterSize(unsigned reg)
194 assert(reg < m_reg_info.num_registers && "Invalid register number.");
195 return GetRegisterInfo()[reg].byte_size;
199 RegisterContextPOSIX_arm64::GetRegisterCount()
201 size_t num_registers = m_reg_info.num_gpr_registers + m_reg_info.num_fpr_registers;
202 return num_registers;
206 RegisterContextPOSIX_arm64::GetGPRSize()
208 return m_register_info_ap->GetGPRSize ();
211 const lldb_private::RegisterInfo *
212 RegisterContextPOSIX_arm64::GetRegisterInfo()
214 // Commonly, this method is overridden and g_register_infos is copied and specialized.
215 // So, use GetRegisterInfo() rather than g_register_infos in this scope.
216 return m_register_info_ap->GetRegisterInfo ();
219 const lldb_private::RegisterInfo *
220 RegisterContextPOSIX_arm64::GetRegisterInfoAtIndex(size_t reg)
222 if (reg < m_reg_info.num_registers)
223 return &GetRegisterInfo()[reg];
229 RegisterContextPOSIX_arm64::GetRegisterSetCount()
232 for (size_t set = 0; set < k_num_register_sets; ++set)
234 if (IsRegisterSetAvailable(set))
241 const lldb_private::RegisterSet *
242 RegisterContextPOSIX_arm64::GetRegisterSet(size_t set)
244 if (IsRegisterSetAvailable(set))
246 switch (m_register_info_ap->m_target_arch.GetMachine())
248 case llvm::Triple::aarch64:
249 return &g_reg_sets_arm64[set];
251 assert(false && "Unhandled target architecture.");
259 RegisterContextPOSIX_arm64::GetRegisterName(unsigned reg)
261 assert(reg < m_reg_info.num_registers && "Invalid register offset.");
262 return GetRegisterInfo()[reg].name;
266 RegisterContextPOSIX_arm64::GetByteOrder()
268 // Get the target process whose privileged thread was used for the register read.
269 lldb::ByteOrder byte_order = lldb::eByteOrderInvalid;
270 lldb_private::Process *process = CalculateProcess().get();
273 byte_order = process->GetByteOrder();
278 RegisterContextPOSIX_arm64::IsRegisterSetAvailable(size_t set_index)
280 return set_index < k_num_register_sets;
284 // Used when parsing DWARF and EH frame information and any other
285 // object file sections that contain register numbers in them.
287 RegisterContextPOSIX_arm64::ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
290 const uint32_t num_regs = GetRegisterCount();
292 assert (kind < lldb::kNumRegisterKinds);
293 for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx)
295 const lldb_private::RegisterInfo *reg_info = GetRegisterInfoAtIndex (reg_idx);
297 if (reg_info->kinds[kind] == num)
301 return LLDB_INVALID_REGNUM;