1 //===-- RegisterContextPOSIX_arm64.cpp --------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
14 #include "lldb/Core/DataBufferHeap.h"
15 #include "lldb/Core/DataExtractor.h"
16 #include "lldb/Core/RegisterValue.h"
17 #include "lldb/Core/Scalar.h"
18 #include "lldb/Target/Target.h"
19 #include "lldb/Target/Thread.h"
20 #include "lldb/Host/Endian.h"
21 #include "llvm/Support/Compiler.h"
23 #include "RegisterContextPOSIX_arm64.h"
24 #include "Plugins/Process/elf-core/ProcessElfCore.h"
26 // ARM64 general purpose registers.
27 const uint32_t g_gpr_regnums_arm64[] =
63 LLDB_INVALID_REGNUM // register sets need to end with this flag
65 static_assert(((sizeof g_gpr_regnums_arm64 / sizeof g_gpr_regnums_arm64[0]) - 1) == k_num_gpr_registers_arm64, \
66 "g_gpr_regnums_arm64 has wrong number of register infos");
68 // ARM64 floating point registers.
69 static const uint32_t g_fpu_regnums_arm64[] =
105 LLDB_INVALID_REGNUM // register sets need to end with this flag
107 static_assert(((sizeof g_fpu_regnums_arm64 / sizeof g_fpu_regnums_arm64[0]) - 1) == k_num_fpr_registers_arm64, \
108 "g_fpu_regnums_arm64 has wrong number of register infos");
110 // Number of register sets provided by this context.
113 k_num_register_sets = 2
116 // Register sets for ARM64.
117 static const lldb_private::RegisterSet
118 g_reg_sets_arm64[k_num_register_sets] =
120 { "General Purpose Registers", "gpr", k_num_gpr_registers_arm64, g_gpr_regnums_arm64 },
121 { "Floating Point Registers", "fpu", k_num_fpr_registers_arm64, g_fpu_regnums_arm64 }
124 bool RegisterContextPOSIX_arm64::IsGPR(unsigned reg)
126 return reg <= m_reg_info.last_gpr; // GPR's come first.
129 bool RegisterContextPOSIX_arm64::IsFPR(unsigned reg)
131 return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr);
134 RegisterContextPOSIX_arm64::RegisterContextPOSIX_arm64(lldb_private::Thread &thread,
135 uint32_t concrete_frame_idx,
136 lldb_private::RegisterInfoInterface *register_info)
137 : lldb_private::RegisterContext(thread, concrete_frame_idx)
139 m_register_info_ap.reset(register_info);
141 switch (register_info->m_target_arch.GetMachine())
143 case llvm::Triple::aarch64:
144 m_reg_info.num_registers = k_num_registers_arm64;
145 m_reg_info.num_gpr_registers = k_num_gpr_registers_arm64;
146 m_reg_info.num_fpr_registers = k_num_fpr_registers_arm64;
147 m_reg_info.last_gpr = k_last_gpr_arm64;
148 m_reg_info.first_fpr = k_first_fpr_arm64;
149 m_reg_info.last_fpr = k_last_fpr_arm64;
150 m_reg_info.first_fpr_v = fpu_v0_arm64;
151 m_reg_info.last_fpr_v = fpu_v31_arm64;
152 m_reg_info.gpr_flags = gpr_cpsr_arm64;
155 assert(false && "Unhandled target architecture.");
159 ::memset(&m_fpr, 0, sizeof m_fpr);
161 // elf-core yet to support ReadFPR()
162 lldb::ProcessSP base = CalculateProcess();
163 if (base.get()->GetPluginName() == ProcessElfCore::GetPluginNameStatic())
167 RegisterContextPOSIX_arm64::~RegisterContextPOSIX_arm64()
172 RegisterContextPOSIX_arm64::Invalidate()
177 RegisterContextPOSIX_arm64::InvalidateAllRegisters()
182 RegisterContextPOSIX_arm64::GetRegisterOffset(unsigned reg)
184 assert(reg < m_reg_info.num_registers && "Invalid register number.");
185 return GetRegisterInfo()[reg].byte_offset;
189 RegisterContextPOSIX_arm64::GetRegisterSize(unsigned reg)
191 assert(reg < m_reg_info.num_registers && "Invalid register number.");
192 return GetRegisterInfo()[reg].byte_size;
196 RegisterContextPOSIX_arm64::GetRegisterCount()
198 size_t num_registers = m_reg_info.num_gpr_registers + m_reg_info.num_fpr_registers;
199 return num_registers;
203 RegisterContextPOSIX_arm64::GetGPRSize()
205 return m_register_info_ap->GetGPRSize ();
208 const lldb_private::RegisterInfo *
209 RegisterContextPOSIX_arm64::GetRegisterInfo()
211 // Commonly, this method is overridden and g_register_infos is copied and specialized.
212 // So, use GetRegisterInfo() rather than g_register_infos in this scope.
213 return m_register_info_ap->GetRegisterInfo ();
216 const lldb_private::RegisterInfo *
217 RegisterContextPOSIX_arm64::GetRegisterInfoAtIndex(size_t reg)
219 if (reg < m_reg_info.num_registers)
220 return &GetRegisterInfo()[reg];
226 RegisterContextPOSIX_arm64::GetRegisterSetCount()
229 for (size_t set = 0; set < k_num_register_sets; ++set)
231 if (IsRegisterSetAvailable(set))
238 const lldb_private::RegisterSet *
239 RegisterContextPOSIX_arm64::GetRegisterSet(size_t set)
241 if (IsRegisterSetAvailable(set))
243 switch (m_register_info_ap->m_target_arch.GetMachine())
245 case llvm::Triple::aarch64:
246 return &g_reg_sets_arm64[set];
248 assert(false && "Unhandled target architecture.");
256 RegisterContextPOSIX_arm64::GetRegisterName(unsigned reg)
258 assert(reg < m_reg_info.num_registers && "Invalid register offset.");
259 return GetRegisterInfo()[reg].name;
263 RegisterContextPOSIX_arm64::GetByteOrder()
265 // Get the target process whose privileged thread was used for the register read.
266 lldb::ByteOrder byte_order = lldb::eByteOrderInvalid;
267 lldb_private::Process *process = CalculateProcess().get();
270 byte_order = process->GetByteOrder();
275 RegisterContextPOSIX_arm64::IsRegisterSetAvailable(size_t set_index)
277 return set_index < k_num_register_sets;
281 // Used when parsing DWARF and EH frame information and any other
282 // object file sections that contain register numbers in them.
284 RegisterContextPOSIX_arm64::ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
287 const uint32_t num_regs = GetRegisterCount();
289 assert (kind < lldb::kNumRegisterKinds);
290 for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx)
292 const lldb_private::RegisterInfo *reg_info = GetRegisterInfoAtIndex (reg_idx);
294 if (reg_info->kinds[kind] == num)
298 return LLDB_INVALID_REGNUM;