1 //===-- RegisterInfos_i386.h ------------------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "llvm/Support/Compiler.h"
16 #ifdef DECLARE_REGISTER_INFOS_I386_STRUCT
18 // Computes the offset of the given GPR in the user data area.
19 #define GPR_OFFSET(regname) (LLVM_EXTENSION offsetof(GPR, regname))
21 // Computes the offset of the given FPR in the extended data area.
22 #define FPR_OFFSET(regname) \
23 (LLVM_EXTENSION offsetof(UserArea, i387) + \
24 LLVM_EXTENSION offsetof(FPR_i386, regname))
26 // Computes the offset of the YMM register assembled from register halves.
27 // Based on DNBArchImplI386.cpp from debugserver
28 #define YMM_OFFSET(reg_index) \
29 (LLVM_EXTENSION offsetof(UserArea, i387) + \
30 LLVM_EXTENSION offsetof(FPR, xstate) + \
31 LLVM_EXTENSION offsetof(FXSAVE, xmm[7]) + sizeof(XMMReg) + \
34 #define BNDR_OFFSET(reg_index) \
35 (LLVM_EXTENSION offsetof(UserArea, i387) + \
36 LLVM_EXTENSION offsetof(FPR, xstate) + \
37 LLVM_EXTENSION offsetof(XSAVE, mpxr[reg_index]))
39 #define BNDC_OFFSET(reg_index) \
40 (LLVM_EXTENSION offsetof(UserArea, i387) + \
41 LLVM_EXTENSION offsetof(FPR, xstate) + \
42 LLVM_EXTENSION offsetof(XSAVE, mpxc[reg_index]))
44 // Number of bytes needed to represent a FPR.
45 #if !defined(FPR_SIZE)
46 #define FPR_SIZE(reg) sizeof(((FXSAVE *)nullptr)->reg)
49 // Number of bytes needed to represent the i'th FP register.
50 #define FP_SIZE sizeof(((MMSReg *)nullptr)->bytes)
52 // Number of bytes needed to represent an XMM register.
53 #define XMM_SIZE sizeof(XMMReg)
55 // Number of bytes needed to represent a YMM register.
56 #define YMM_SIZE sizeof(YMMReg)
58 // Number of bytes needed to represent MPX registers.
59 #define BNDR_SIZE sizeof(MPXReg)
60 #define BNDC_SIZE sizeof(MPXCsr)
62 // Note that the size and offset will be updated by platform-specific classes.
63 #define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \
65 #reg, alt, sizeof(((GPR *)nullptr)->reg), \
66 GPR_OFFSET(reg), eEncodingUint, eFormatHex, \
67 {kind1, kind2, kind3, kind4, \
68 lldb_##reg##_i386 }, \
69 nullptr, nullptr, nullptr, 0 \
72 #define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4) \
74 #name, nullptr, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, eFormatHex, \
75 {kind1, kind2, kind3, kind4, \
76 lldb_##name##_i386 }, \
77 nullptr, nullptr, nullptr, 0 \
80 // RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB
82 #define DEFINE_FP_ST(reg, i) \
84 #reg #i, nullptr, FP_SIZE, \
85 LLVM_EXTENSION FPR_OFFSET( \
86 stmm[i]), eEncodingVector, eFormatVectorOfUInt8, \
87 {ehframe_st##i##_i386, dwarf_st##i##_i386, LLDB_INVALID_REGNUM, \
88 LLDB_INVALID_REGNUM, lldb_st##i##_i386 }, \
89 nullptr, nullptr, nullptr, 0 \
92 #define DEFINE_FP_MM(reg, i) \
94 #reg #i, nullptr, sizeof(uint64_t), \
95 LLVM_EXTENSION FPR_OFFSET( \
96 stmm[i]), eEncodingUint, eFormatHex, \
97 {ehframe_mm##i##_i386, dwarf_mm##i##_i386, \
98 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
99 lldb_mm##i##_i386 }, \
100 nullptr, nullptr, nullptr, 0 \
103 #define DEFINE_XMM(reg, i) \
105 #reg #i, nullptr, XMM_SIZE, \
106 LLVM_EXTENSION FPR_OFFSET( \
107 reg[i]), eEncodingVector, eFormatVectorOfUInt8, \
108 {ehframe_##reg##i##_i386, dwarf_##reg##i##_i386, \
109 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_i386 }, \
110 nullptr, nullptr, nullptr, 0 \
113 // I believe the YMM registers use dwarf_xmm_%_i386 register numbers and then
114 // differentiate based on register size.
115 #define DEFINE_YMM(reg, i) \
117 #reg #i, nullptr, YMM_SIZE, \
118 LLVM_EXTENSION YMM_OFFSET(i), eEncodingVector, eFormatVectorOfUInt8, \
119 {LLDB_INVALID_REGNUM, dwarf_xmm##i##_i386, \
120 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
121 lldb_##reg##i##_i386 }, \
122 nullptr, nullptr, nullptr, 0 \
125 #define DEFINE_BNDR(reg, i) \
127 #reg #i, nullptr, BNDR_SIZE, \
128 LLVM_EXTENSION BNDR_OFFSET(i), eEncodingVector, eFormatVectorOfUInt64, \
129 {dwarf_##reg##i##_i386, dwarf_##reg##i##_i386, LLDB_INVALID_REGNUM, \
130 LLDB_INVALID_REGNUM, lldb_##reg##i##_i386 }, \
131 nullptr, nullptr, nullptr, 0 \
134 #define DEFINE_BNDC(name, i) \
136 #name, nullptr, BNDC_SIZE, \
137 LLVM_EXTENSION BNDC_OFFSET(i), eEncodingVector, \
138 eFormatVectorOfUInt8, \
139 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
140 LLDB_INVALID_REGNUM, lldb_##name##_i386 }, \
141 nullptr, nullptr, nullptr, 0 \
144 #define DEFINE_DR(reg, i) \
146 #reg #i, nullptr, DR_SIZE, \
147 DR_OFFSET(i), eEncodingUint, eFormatHex, \
148 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
149 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
150 LLDB_INVALID_REGNUM }, \
151 nullptr, nullptr, nullptr, 0 \
154 #define DEFINE_GPR_PSEUDO_16(reg16, reg32) \
156 #reg16, nullptr, 2, \
157 GPR_OFFSET(reg32), eEncodingUint, eFormatHex, \
158 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
159 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
160 lldb_##reg16##_i386 }, \
161 RegisterContextPOSIX_x86::g_contained_##reg32, \
162 RegisterContextPOSIX_x86::g_invalidate_##reg32, nullptr, 0 \
165 #define DEFINE_GPR_PSEUDO_8H(reg8, reg32) \
168 GPR_OFFSET(reg32) + 1, eEncodingUint, eFormatHex, \
169 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
170 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
171 lldb_##reg8##_i386 }, \
172 RegisterContextPOSIX_x86::g_contained_##reg32, \
173 RegisterContextPOSIX_x86::g_invalidate_##reg32, nullptr, 0 \
176 #define DEFINE_GPR_PSEUDO_8L(reg8, reg32) \
179 GPR_OFFSET(reg32), eEncodingUint, eFormatHex, \
180 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
181 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
182 lldb_##reg8##_i386 }, \
183 RegisterContextPOSIX_x86::g_contained_##reg32, \
184 RegisterContextPOSIX_x86::g_invalidate_##reg32, nullptr, 0 \
187 static RegisterInfo g_register_infos_i386[] = {
188 // General purpose registers.
189 DEFINE_GPR(eax, nullptr, ehframe_eax_i386, dwarf_eax_i386,
190 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
191 DEFINE_GPR(ebx, nullptr, ehframe_ebx_i386, dwarf_ebx_i386,
192 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
193 DEFINE_GPR(ecx, nullptr, ehframe_ecx_i386, dwarf_ecx_i386,
194 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
195 DEFINE_GPR(edx, nullptr, ehframe_edx_i386, dwarf_edx_i386,
196 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
197 DEFINE_GPR(edi, nullptr, ehframe_edi_i386, dwarf_edi_i386,
198 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
199 DEFINE_GPR(esi, nullptr, ehframe_esi_i386, dwarf_esi_i386,
200 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
201 DEFINE_GPR(ebp, "fp", ehframe_ebp_i386, dwarf_ebp_i386,
202 LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM),
203 DEFINE_GPR(esp, "sp", ehframe_esp_i386, dwarf_esp_i386,
204 LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM),
205 DEFINE_GPR(eip, "pc", ehframe_eip_i386, dwarf_eip_i386,
206 LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM),
207 DEFINE_GPR(eflags, "flags", ehframe_eflags_i386, dwarf_eflags_i386,
208 LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM),
209 DEFINE_GPR(cs, nullptr, LLDB_INVALID_REGNUM, dwarf_cs_i386,
210 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
211 DEFINE_GPR(fs, nullptr, LLDB_INVALID_REGNUM, dwarf_fs_i386,
212 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
213 DEFINE_GPR(gs, nullptr, LLDB_INVALID_REGNUM, dwarf_gs_i386,
214 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
215 DEFINE_GPR(ss, nullptr, LLDB_INVALID_REGNUM, dwarf_ss_i386,
216 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
217 DEFINE_GPR(ds, nullptr, LLDB_INVALID_REGNUM, dwarf_ds_i386,
218 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
219 DEFINE_GPR(es, nullptr, LLDB_INVALID_REGNUM, dwarf_es_i386,
220 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
222 DEFINE_GPR_PSEUDO_16(ax, eax), DEFINE_GPR_PSEUDO_16(bx, ebx),
223 DEFINE_GPR_PSEUDO_16(cx, ecx), DEFINE_GPR_PSEUDO_16(dx, edx),
224 DEFINE_GPR_PSEUDO_16(di, edi), DEFINE_GPR_PSEUDO_16(si, esi),
225 DEFINE_GPR_PSEUDO_16(bp, ebp), DEFINE_GPR_PSEUDO_16(sp, esp),
226 DEFINE_GPR_PSEUDO_8H(ah, eax), DEFINE_GPR_PSEUDO_8H(bh, ebx),
227 DEFINE_GPR_PSEUDO_8H(ch, ecx), DEFINE_GPR_PSEUDO_8H(dh, edx),
228 DEFINE_GPR_PSEUDO_8L(al, eax), DEFINE_GPR_PSEUDO_8L(bl, ebx),
229 DEFINE_GPR_PSEUDO_8L(cl, ecx), DEFINE_GPR_PSEUDO_8L(dl, edx),
231 // i387 Floating point registers.
232 DEFINE_FPR(fctrl, fctrl, LLDB_INVALID_REGNUM, dwarf_fctrl_i386,
233 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
234 DEFINE_FPR(fstat, fstat, LLDB_INVALID_REGNUM, dwarf_fstat_i386,
235 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
236 DEFINE_FPR(ftag, ftag, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
237 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
238 DEFINE_FPR(fop, fop, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
239 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
240 DEFINE_FPR(fiseg, ptr.i386_.fiseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
241 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
242 DEFINE_FPR(fioff, ptr.i386_.fioff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
243 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
244 DEFINE_FPR(foseg, ptr.i386_.foseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
245 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
246 DEFINE_FPR(fooff, ptr.i386_.fooff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
247 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
248 DEFINE_FPR(mxcsr, mxcsr, LLDB_INVALID_REGNUM, dwarf_mxcsr_i386,
249 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
250 DEFINE_FPR(mxcsrmask, mxcsrmask, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
251 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
254 DEFINE_FP_ST(st, 0), DEFINE_FP_ST(st, 1), DEFINE_FP_ST(st, 2),
255 DEFINE_FP_ST(st, 3), DEFINE_FP_ST(st, 4), DEFINE_FP_ST(st, 5),
256 DEFINE_FP_ST(st, 6), DEFINE_FP_ST(st, 7), DEFINE_FP_MM(mm, 0),
257 DEFINE_FP_MM(mm, 1), DEFINE_FP_MM(mm, 2), DEFINE_FP_MM(mm, 3),
258 DEFINE_FP_MM(mm, 4), DEFINE_FP_MM(mm, 5), DEFINE_FP_MM(mm, 6),
262 DEFINE_XMM(xmm, 0), DEFINE_XMM(xmm, 1), DEFINE_XMM(xmm, 2),
263 DEFINE_XMM(xmm, 3), DEFINE_XMM(xmm, 4), DEFINE_XMM(xmm, 5),
264 DEFINE_XMM(xmm, 6), DEFINE_XMM(xmm, 7),
266 // Copy of YMM registers assembled from xmm and ymmh
267 DEFINE_YMM(ymm, 0), DEFINE_YMM(ymm, 1), DEFINE_YMM(ymm, 2),
268 DEFINE_YMM(ymm, 3), DEFINE_YMM(ymm, 4), DEFINE_YMM(ymm, 5),
269 DEFINE_YMM(ymm, 6), DEFINE_YMM(ymm, 7),
277 DEFINE_BNDC(bndcfgu, 0),
278 DEFINE_BNDC(bndstatus, 1),
280 // Debug registers for lldb internal use
281 DEFINE_DR(dr, 0), DEFINE_DR(dr, 1), DEFINE_DR(dr, 2), DEFINE_DR(dr, 3),
282 DEFINE_DR(dr, 4), DEFINE_DR(dr, 5), DEFINE_DR(dr, 6), DEFINE_DR(dr, 7)};
284 static_assert((sizeof(g_register_infos_i386) /
285 sizeof(g_register_infos_i386[0])) == k_num_registers_i386,
286 "g_register_infos_x86_64 has wrong number of register infos");
303 #undef DEFINE_GPR_PSEUDO_16
304 #undef DEFINE_GPR_PSEUDO_8H
305 #undef DEFINE_GPR_PSEUDO_8L
307 #endif // DECLARE_REGISTER_INFOS_I386_STRUCT