1 //===-- RegisterInfos_x86_64.h ----------------------------------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file is meant to be textually included. Do not #include modular
12 // Computes the offset of the given GPR in the user data area.
13 #define GPR_OFFSET(regname) (LLVM_EXTENSION offsetof(GPR, regname))
15 // Computes the offset of the given FPR in the extended data area.
16 #define FPR_OFFSET(regname) \
17 (LLVM_EXTENSION offsetof(UserArea, fpr) + \
18 LLVM_EXTENSION offsetof(FPR, fxsave) + \
19 LLVM_EXTENSION offsetof(FXSAVE, regname))
21 // Computes the offset of the YMM register assembled from register halves.
22 // Based on DNBArchImplX86_64.cpp from debugserver
23 #define YMM_OFFSET(reg_index) \
24 (LLVM_EXTENSION offsetof(UserArea, fpr) + \
25 LLVM_EXTENSION offsetof(FPR, xsave) + \
26 LLVM_EXTENSION offsetof(XSAVE, ymmh[0]) + (32 * reg_index))
28 #define BNDR_OFFSET(reg_index) \
29 (LLVM_EXTENSION offsetof(UserArea, fpr) + \
30 LLVM_EXTENSION offsetof(FPR, xsave) + \
31 LLVM_EXTENSION offsetof(XSAVE, mpxr[reg_index]))
33 #define BNDC_OFFSET(reg_index) \
34 (LLVM_EXTENSION offsetof(UserArea, fpr) + \
35 LLVM_EXTENSION offsetof(FPR, xsave) + \
36 LLVM_EXTENSION offsetof(XSAVE, mpxc[reg_index]))
38 #ifdef DECLARE_REGISTER_INFOS_X86_64_STRUCT
40 // Number of bytes needed to represent a FPR.
41 #define FPR_SIZE(reg) sizeof(((FXSAVE *)nullptr)->reg)
43 // Number of bytes needed to represent the i'th FP register.
44 #define FP_SIZE sizeof(((MMSReg *)nullptr)->bytes)
46 // Number of bytes needed to represent an XMM register.
47 #define XMM_SIZE sizeof(XMMReg)
49 // Number of bytes needed to represent a YMM register.
50 #define YMM_SIZE sizeof(YMMReg)
52 // Number of bytes needed to represent MPX registers.
53 #define BNDR_SIZE sizeof(MPXReg)
54 #define BNDC_SIZE sizeof(MPXCsr)
56 #define DR_SIZE sizeof(((DBG *)nullptr)->dr[0])
58 // RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB
60 // Note that the size and offset will be updated by platform-specific classes.
61 #define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \
63 #reg, alt, sizeof(((GPR *)nullptr)->reg), \
64 GPR_OFFSET(reg), eEncodingUint, eFormatHex, \
65 {kind1, kind2, kind3, kind4, \
66 lldb_##reg##_x86_64 }, \
67 nullptr, nullptr, nullptr, 0 \
70 #define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4) \
72 #name, nullptr, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, eFormatHex, \
73 {kind1, kind2, kind3, kind4, \
74 lldb_##name##_x86_64 }, \
75 nullptr, nullptr, nullptr, 0 \
78 #define DEFINE_FP_ST(reg, i) \
80 #reg #i, nullptr, FP_SIZE, \
81 LLVM_EXTENSION FPR_OFFSET( \
82 stmm[i]), eEncodingVector, eFormatVectorOfUInt8, \
83 {dwarf_st##i##_x86_64, dwarf_st##i##_x86_64, LLDB_INVALID_REGNUM, \
84 LLDB_INVALID_REGNUM, lldb_st##i##_x86_64 }, \
85 nullptr, nullptr, nullptr, 0 \
88 #define DEFINE_FP_MM(reg, i) \
90 #reg #i, nullptr, sizeof(uint64_t), \
91 LLVM_EXTENSION FPR_OFFSET( \
92 stmm[i]), eEncodingUint, eFormatHex, \
93 {dwarf_mm##i##_x86_64, dwarf_mm##i##_x86_64, \
94 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
95 lldb_mm##i##_x86_64 }, \
96 nullptr, nullptr, nullptr, 0 \
99 #define DEFINE_XMM(reg, i) \
101 #reg #i, nullptr, XMM_SIZE, \
102 LLVM_EXTENSION FPR_OFFSET( \
103 reg[i]), eEncodingVector, eFormatVectorOfUInt8, \
104 {dwarf_##reg##i##_x86_64, dwarf_##reg##i##_x86_64, \
105 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
106 lldb_##reg##i##_x86_64 }, \
107 nullptr, nullptr, nullptr, 0 \
110 #define DEFINE_YMM(reg, i) \
112 #reg #i, nullptr, YMM_SIZE, \
113 LLVM_EXTENSION YMM_OFFSET(i), eEncodingVector, eFormatVectorOfUInt8, \
114 {dwarf_##reg##i##h_x86_64, \
115 dwarf_##reg##i##h_x86_64, \
116 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
117 lldb_##reg##i##_x86_64 }, \
118 nullptr, nullptr, nullptr, 0 \
121 #define DEFINE_BNDR(reg, i) \
123 #reg #i, nullptr, BNDR_SIZE, \
124 LLVM_EXTENSION BNDR_OFFSET(i), eEncodingVector, eFormatVectorOfUInt64, \
125 {dwarf_##reg##i##_x86_64, \
126 dwarf_##reg##i##_x86_64, \
127 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
128 lldb_##reg##i##_x86_64 }, \
129 nullptr, nullptr, nullptr, 0 \
132 #define DEFINE_BNDC(name, i) \
134 #name, nullptr, BNDC_SIZE, \
135 LLVM_EXTENSION BNDC_OFFSET(i), eEncodingVector, eFormatVectorOfUInt8, \
136 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
137 LLDB_INVALID_REGNUM, lldb_##name##_x86_64 }, \
138 nullptr, nullptr, nullptr, 0 \
141 #define DEFINE_DR(reg, i) \
143 #reg #i, nullptr, DR_SIZE, \
144 DR_OFFSET(i), eEncodingUint, eFormatHex, \
145 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
146 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
147 lldb_##reg##i##_x86_64 }, \
148 nullptr, nullptr, nullptr, 0 \
151 #define DEFINE_GPR_PSEUDO_32(reg32, reg64) \
153 #reg32, nullptr, 4, \
154 GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \
155 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
156 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
157 lldb_##reg32##_x86_64 }, \
158 RegisterContextPOSIX_x86::g_contained_##reg64, \
159 RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \
162 #define DEFINE_GPR_PSEUDO_16(reg16, reg64) \
164 #reg16, nullptr, 2, \
165 GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \
166 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
167 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
168 lldb_##reg16##_x86_64 }, \
169 RegisterContextPOSIX_x86::g_contained_##reg64, \
170 RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \
173 #define DEFINE_GPR_PSEUDO_8H(reg8, reg64) \
176 GPR_OFFSET(reg64) + 1, eEncodingUint, eFormatHex, \
177 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
178 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
179 lldb_##reg8##_x86_64 }, \
180 RegisterContextPOSIX_x86::g_contained_##reg64, \
181 RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \
184 #define DEFINE_GPR_PSEUDO_8L(reg8, reg64) \
187 GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \
188 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
189 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
190 lldb_##reg8##_x86_64 }, \
191 RegisterContextPOSIX_x86::g_contained_##reg64, \
192 RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \
196 static RegisterInfo g_register_infos_x86_64[] = {
197 // General purpose registers EH_Frame DWARF Generic Process Plugin
198 // =========================== ================== ================ ========================= ====================
199 DEFINE_GPR(rax, nullptr, dwarf_rax_x86_64, dwarf_rax_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
200 DEFINE_GPR(rbx, nullptr, dwarf_rbx_x86_64, dwarf_rbx_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
201 DEFINE_GPR(rcx, "arg4", dwarf_rcx_x86_64, dwarf_rcx_x86_64, LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM),
202 DEFINE_GPR(rdx, "arg3", dwarf_rdx_x86_64, dwarf_rdx_x86_64, LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM),
203 DEFINE_GPR(rdi, "arg1", dwarf_rdi_x86_64, dwarf_rdi_x86_64, LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM),
204 DEFINE_GPR(rsi, "arg2", dwarf_rsi_x86_64, dwarf_rsi_x86_64, LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM),
205 DEFINE_GPR(rbp, "fp", dwarf_rbp_x86_64, dwarf_rbp_x86_64, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM),
206 DEFINE_GPR(rsp, "sp", dwarf_rsp_x86_64, dwarf_rsp_x86_64, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM),
207 DEFINE_GPR(r8, "arg5", dwarf_r8_x86_64, dwarf_r8_x86_64, LLDB_REGNUM_GENERIC_ARG5, LLDB_INVALID_REGNUM),
208 DEFINE_GPR(r9, "arg6", dwarf_r9_x86_64, dwarf_r9_x86_64, LLDB_REGNUM_GENERIC_ARG6, LLDB_INVALID_REGNUM),
209 DEFINE_GPR(r10, nullptr, dwarf_r10_x86_64, dwarf_r10_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
210 DEFINE_GPR(r11, nullptr, dwarf_r11_x86_64, dwarf_r11_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
211 DEFINE_GPR(r12, nullptr, dwarf_r12_x86_64, dwarf_r12_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
212 DEFINE_GPR(r13, nullptr, dwarf_r13_x86_64, dwarf_r13_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
213 DEFINE_GPR(r14, nullptr, dwarf_r14_x86_64, dwarf_r14_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
214 DEFINE_GPR(r15, nullptr, dwarf_r15_x86_64, dwarf_r15_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
215 DEFINE_GPR(rip, "pc", dwarf_rip_x86_64, dwarf_rip_x86_64, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM),
216 DEFINE_GPR(rflags, "flags", dwarf_rflags_x86_64, dwarf_rflags_x86_64, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM),
217 DEFINE_GPR(cs, nullptr, dwarf_cs_x86_64, dwarf_cs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
218 DEFINE_GPR(fs, nullptr, dwarf_fs_x86_64, dwarf_fs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
219 DEFINE_GPR(gs, nullptr, dwarf_gs_x86_64, dwarf_gs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
220 DEFINE_GPR(ss, nullptr, dwarf_ss_x86_64, dwarf_ss_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
221 DEFINE_GPR(ds, nullptr, dwarf_ds_x86_64, dwarf_ds_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
222 DEFINE_GPR(es, nullptr, dwarf_es_x86_64, dwarf_es_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
224 DEFINE_GPR_PSEUDO_32(eax, rax), DEFINE_GPR_PSEUDO_32(ebx, rbx),
225 DEFINE_GPR_PSEUDO_32(ecx, rcx), DEFINE_GPR_PSEUDO_32(edx, rdx),
226 DEFINE_GPR_PSEUDO_32(edi, rdi), DEFINE_GPR_PSEUDO_32(esi, rsi),
227 DEFINE_GPR_PSEUDO_32(ebp, rbp), DEFINE_GPR_PSEUDO_32(esp, rsp),
228 DEFINE_GPR_PSEUDO_32(r8d, r8), DEFINE_GPR_PSEUDO_32(r9d, r9),
229 DEFINE_GPR_PSEUDO_32(r10d, r10), DEFINE_GPR_PSEUDO_32(r11d, r11),
230 DEFINE_GPR_PSEUDO_32(r12d, r12), DEFINE_GPR_PSEUDO_32(r13d, r13),
231 DEFINE_GPR_PSEUDO_32(r14d, r14), DEFINE_GPR_PSEUDO_32(r15d, r15),
232 DEFINE_GPR_PSEUDO_16(ax, rax), DEFINE_GPR_PSEUDO_16(bx, rbx),
233 DEFINE_GPR_PSEUDO_16(cx, rcx), DEFINE_GPR_PSEUDO_16(dx, rdx),
234 DEFINE_GPR_PSEUDO_16(di, rdi), DEFINE_GPR_PSEUDO_16(si, rsi),
235 DEFINE_GPR_PSEUDO_16(bp, rbp), DEFINE_GPR_PSEUDO_16(sp, rsp),
236 DEFINE_GPR_PSEUDO_16(r8w, r8), DEFINE_GPR_PSEUDO_16(r9w, r9),
237 DEFINE_GPR_PSEUDO_16(r10w, r10), DEFINE_GPR_PSEUDO_16(r11w, r11),
238 DEFINE_GPR_PSEUDO_16(r12w, r12), DEFINE_GPR_PSEUDO_16(r13w, r13),
239 DEFINE_GPR_PSEUDO_16(r14w, r14), DEFINE_GPR_PSEUDO_16(r15w, r15),
240 DEFINE_GPR_PSEUDO_8H(ah, rax), DEFINE_GPR_PSEUDO_8H(bh, rbx),
241 DEFINE_GPR_PSEUDO_8H(ch, rcx), DEFINE_GPR_PSEUDO_8H(dh, rdx),
242 DEFINE_GPR_PSEUDO_8L(al, rax), DEFINE_GPR_PSEUDO_8L(bl, rbx),
243 DEFINE_GPR_PSEUDO_8L(cl, rcx), DEFINE_GPR_PSEUDO_8L(dl, rdx),
244 DEFINE_GPR_PSEUDO_8L(dil, rdi), DEFINE_GPR_PSEUDO_8L(sil, rsi),
245 DEFINE_GPR_PSEUDO_8L(bpl, rbp), DEFINE_GPR_PSEUDO_8L(spl, rsp),
246 DEFINE_GPR_PSEUDO_8L(r8l, r8), DEFINE_GPR_PSEUDO_8L(r9l, r9),
247 DEFINE_GPR_PSEUDO_8L(r10l, r10), DEFINE_GPR_PSEUDO_8L(r11l, r11),
248 DEFINE_GPR_PSEUDO_8L(r12l, r12), DEFINE_GPR_PSEUDO_8L(r13l, r13),
249 DEFINE_GPR_PSEUDO_8L(r14l, r14), DEFINE_GPR_PSEUDO_8L(r15l, r15),
251 // i387 Floating point registers. EH_frame DWARF Generic Process Plugin
252 // ====================================== =============== ================== =================== ====================
253 DEFINE_FPR(fctrl, fctrl, dwarf_fctrl_x86_64, dwarf_fctrl_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
254 DEFINE_FPR(fstat, fstat, dwarf_fstat_x86_64, dwarf_fstat_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
255 DEFINE_FPR(ftag, ftag, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
256 DEFINE_FPR(fop, fop, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
257 DEFINE_FPR(fiseg, ptr.i386_.fiseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
258 DEFINE_FPR(fioff, ptr.i386_.fioff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
259 DEFINE_FPR(foseg, ptr.i386_.foseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
260 DEFINE_FPR(fooff, ptr.i386_.fooff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
261 DEFINE_FPR(mxcsr, mxcsr, dwarf_mxcsr_x86_64, dwarf_mxcsr_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
262 DEFINE_FPR(mxcsrmask, mxcsrmask, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
265 DEFINE_FP_ST(st, 0), DEFINE_FP_ST(st, 1), DEFINE_FP_ST(st, 2),
266 DEFINE_FP_ST(st, 3), DEFINE_FP_ST(st, 4), DEFINE_FP_ST(st, 5),
267 DEFINE_FP_ST(st, 6), DEFINE_FP_ST(st, 7), DEFINE_FP_MM(mm, 0),
268 DEFINE_FP_MM(mm, 1), DEFINE_FP_MM(mm, 2), DEFINE_FP_MM(mm, 3),
269 DEFINE_FP_MM(mm, 4), DEFINE_FP_MM(mm, 5), DEFINE_FP_MM(mm, 6),
273 DEFINE_XMM(xmm, 0), DEFINE_XMM(xmm, 1), DEFINE_XMM(xmm, 2),
274 DEFINE_XMM(xmm, 3), DEFINE_XMM(xmm, 4), DEFINE_XMM(xmm, 5),
275 DEFINE_XMM(xmm, 6), DEFINE_XMM(xmm, 7), DEFINE_XMM(xmm, 8),
276 DEFINE_XMM(xmm, 9), DEFINE_XMM(xmm, 10), DEFINE_XMM(xmm, 11),
277 DEFINE_XMM(xmm, 12), DEFINE_XMM(xmm, 13), DEFINE_XMM(xmm, 14),
280 // Copy of YMM registers assembled from xmm and ymmh
281 DEFINE_YMM(ymm, 0), DEFINE_YMM(ymm, 1), DEFINE_YMM(ymm, 2),
282 DEFINE_YMM(ymm, 3), DEFINE_YMM(ymm, 4), DEFINE_YMM(ymm, 5),
283 DEFINE_YMM(ymm, 6), DEFINE_YMM(ymm, 7), DEFINE_YMM(ymm, 8),
284 DEFINE_YMM(ymm, 9), DEFINE_YMM(ymm, 10), DEFINE_YMM(ymm, 11),
285 DEFINE_YMM(ymm, 12), DEFINE_YMM(ymm, 13), DEFINE_YMM(ymm, 14),
294 DEFINE_BNDC(bndcfgu, 0),
295 DEFINE_BNDC(bndstatus, 1),
297 // Debug registers for lldb internal use
298 DEFINE_DR(dr, 0), DEFINE_DR(dr, 1), DEFINE_DR(dr, 2), DEFINE_DR(dr, 3),
299 DEFINE_DR(dr, 4), DEFINE_DR(dr, 5), DEFINE_DR(dr, 6), DEFINE_DR(dr, 7)};
303 static_assert((sizeof(g_register_infos_x86_64) /
304 sizeof(g_register_infos_x86_64[0])) == k_num_registers_x86_64,
305 "g_register_infos_x86_64 has wrong number of register infos");
319 #undef DEFINE_GPR_PSEUDO_32
320 #undef DEFINE_GPR_PSEUDO_16
321 #undef DEFINE_GPR_PSEUDO_8H
322 #undef DEFINE_GPR_PSEUDO_8L
324 #endif // DECLARE_REGISTER_INFOS_X86_64_STRUCT
326 #ifdef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
328 #define UPDATE_GPR_INFO(reg, reg64) \
330 g_register_infos[lldb_##reg##_i386].byte_offset = GPR_OFFSET(reg64); \
333 #define UPDATE_GPR_INFO_8H(reg, reg64) \
335 g_register_infos[lldb_##reg##_i386].byte_offset = GPR_OFFSET(reg64) + 1; \
338 #define UPDATE_FPR_INFO(reg, reg64) \
340 g_register_infos[lldb_##reg##_i386].byte_offset = FPR_OFFSET(reg64); \
343 #define UPDATE_FP_INFO(reg, i) \
345 g_register_infos[lldb_##reg##i##_i386].byte_offset = FPR_OFFSET(stmm[i]); \
348 #define UPDATE_XMM_INFO(reg, i) \
350 g_register_infos[lldb_##reg##i##_i386].byte_offset = FPR_OFFSET(reg[i]); \
353 #define UPDATE_YMM_INFO(reg, i) \
355 g_register_infos[lldb_##reg##i##_i386].byte_offset = YMM_OFFSET(i); \
358 #define UPDATE_DR_INFO(reg_index) \
360 g_register_infos[lldb_dr##reg_index##_i386].byte_offset = \
361 DR_OFFSET(reg_index); \
364 // Update the register offsets
365 UPDATE_GPR_INFO(eax, rax);
366 UPDATE_GPR_INFO(ebx, rbx);
367 UPDATE_GPR_INFO(ecx, rcx);
368 UPDATE_GPR_INFO(edx, rdx);
369 UPDATE_GPR_INFO(edi, rdi);
370 UPDATE_GPR_INFO(esi, rsi);
371 UPDATE_GPR_INFO(ebp, rbp);
372 UPDATE_GPR_INFO(esp, rsp);
373 UPDATE_GPR_INFO(eip, rip);
374 UPDATE_GPR_INFO(eflags, rflags);
375 UPDATE_GPR_INFO(cs, cs);
376 UPDATE_GPR_INFO(fs, fs);
377 UPDATE_GPR_INFO(gs, gs);
378 UPDATE_GPR_INFO(ss, ss);
379 UPDATE_GPR_INFO(ds, ds);
380 UPDATE_GPR_INFO(es, es);
382 UPDATE_GPR_INFO(ax, rax);
383 UPDATE_GPR_INFO(bx, rbx);
384 UPDATE_GPR_INFO(cx, rcx);
385 UPDATE_GPR_INFO(dx, rdx);
386 UPDATE_GPR_INFO(di, rdi);
387 UPDATE_GPR_INFO(si, rsi);
388 UPDATE_GPR_INFO(bp, rbp);
389 UPDATE_GPR_INFO(sp, rsp);
390 UPDATE_GPR_INFO_8H(ah, rax);
391 UPDATE_GPR_INFO_8H(bh, rbx);
392 UPDATE_GPR_INFO_8H(ch, rcx);
393 UPDATE_GPR_INFO_8H(dh, rdx);
394 UPDATE_GPR_INFO(al, rax);
395 UPDATE_GPR_INFO(bl, rbx);
396 UPDATE_GPR_INFO(cl, rcx);
397 UPDATE_GPR_INFO(dl, rdx);
399 UPDATE_FPR_INFO(fctrl, fctrl);
400 UPDATE_FPR_INFO(fstat, fstat);
401 UPDATE_FPR_INFO(ftag, ftag);
402 UPDATE_FPR_INFO(fop, fop);
403 UPDATE_FPR_INFO(fiseg, ptr.i386_.fiseg);
404 UPDATE_FPR_INFO(fioff, ptr.i386_.fioff);
405 UPDATE_FPR_INFO(fooff, ptr.i386_.fooff);
406 UPDATE_FPR_INFO(foseg, ptr.i386_.foseg);
407 UPDATE_FPR_INFO(mxcsr, mxcsr);
408 UPDATE_FPR_INFO(mxcsrmask, mxcsrmask);
410 UPDATE_FP_INFO(st, 0);
411 UPDATE_FP_INFO(st, 1);
412 UPDATE_FP_INFO(st, 2);
413 UPDATE_FP_INFO(st, 3);
414 UPDATE_FP_INFO(st, 4);
415 UPDATE_FP_INFO(st, 5);
416 UPDATE_FP_INFO(st, 6);
417 UPDATE_FP_INFO(st, 7);
418 UPDATE_FP_INFO(mm, 0);
419 UPDATE_FP_INFO(mm, 1);
420 UPDATE_FP_INFO(mm, 2);
421 UPDATE_FP_INFO(mm, 3);
422 UPDATE_FP_INFO(mm, 4);
423 UPDATE_FP_INFO(mm, 5);
424 UPDATE_FP_INFO(mm, 6);
425 UPDATE_FP_INFO(mm, 7);
427 UPDATE_XMM_INFO(xmm, 0);
428 UPDATE_XMM_INFO(xmm, 1);
429 UPDATE_XMM_INFO(xmm, 2);
430 UPDATE_XMM_INFO(xmm, 3);
431 UPDATE_XMM_INFO(xmm, 4);
432 UPDATE_XMM_INFO(xmm, 5);
433 UPDATE_XMM_INFO(xmm, 6);
434 UPDATE_XMM_INFO(xmm, 7);
436 UPDATE_YMM_INFO(ymm, 0);
437 UPDATE_YMM_INFO(ymm, 1);
438 UPDATE_YMM_INFO(ymm, 2);
439 UPDATE_YMM_INFO(ymm, 3);
440 UPDATE_YMM_INFO(ymm, 4);
441 UPDATE_YMM_INFO(ymm, 5);
442 UPDATE_YMM_INFO(ymm, 6);
443 UPDATE_YMM_INFO(ymm, 7);
454 #undef UPDATE_GPR_INFO
455 #undef UPDATE_GPR_INFO_8H
456 #undef UPDATE_FPR_INFO
457 #undef UPDATE_FP_INFO
458 #undef UPDATE_XMM_INFO
459 #undef UPDATE_YMM_INFO
460 #undef UPDATE_DR_INFO
462 #endif // UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS