contrib/llvm/tools/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_mips64.cpp

   1 //===-- RegisterContextPOSIXCore_mips64.cpp ---------------------*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9
  10 #include "RegisterContextPOSIXCore_mips64.h"
  11
  12 #include "lldb/Core/RegisterValue.h"
  13 #include "lldb/Target/Thread.h"
  14
  15 using namespace lldb_private;
  16
  17 RegisterContextCorePOSIX_mips64::RegisterContextCorePOSIX_mips64(
  18     Thread &thread, RegisterInfoInterface *register_info,
  19     const DataExtractor &gpregset, llvm::ArrayRef<CoreNote> notes)
  20     : RegisterContextPOSIX_mips64(thread, 0, register_info) {
  21   m_gpr_buffer.reset(
  22       new DataBufferHeap(gpregset.GetDataStart(), gpregset.GetByteSize()));
  23   m_gpr.SetData(m_gpr_buffer);
  24   m_gpr.SetByteOrder(gpregset.GetByteOrder());
  25
  26   DataExtractor fpregset = getRegset(
  27       notes, register_info->GetTargetArchitecture().GetTriple(), FPR_Desc);
  28   m_fpr_buffer.reset(
  29       new DataBufferHeap(fpregset.GetDataStart(), fpregset.GetByteSize()));
  30   m_fpr.SetData(m_fpr_buffer);
  31   m_fpr.SetByteOrder(fpregset.GetByteOrder());
  32 }
  33
  34 RegisterContextCorePOSIX_mips64::~RegisterContextCorePOSIX_mips64() {}
  35
  36 bool RegisterContextCorePOSIX_mips64::ReadGPR() { return true; }
  37
  38 bool RegisterContextCorePOSIX_mips64::ReadFPR() { return false; }
  39
  40 bool RegisterContextCorePOSIX_mips64::WriteGPR() {
  41   assert(0);
  42   return false;
  43 }
  44
  45 bool RegisterContextCorePOSIX_mips64::WriteFPR() {
  46   assert(0);
  47   return false;
  48 }
  49
  50 bool RegisterContextCorePOSIX_mips64::ReadRegister(const RegisterInfo *reg_info,
  51                                                    RegisterValue &value) {
  52
  53   lldb::offset_t offset = reg_info->byte_offset;
  54   lldb_private::ArchSpec arch = m_register_info_ap->GetTargetArchitecture();
  55   uint64_t v;
  56   if (IsGPR(reg_info->kinds[lldb::eRegisterKindLLDB])) {
  57     if (reg_info->byte_size == 4 && !(arch.GetMachine() == llvm::Triple::mips64el))
  58       // In case of 32bit core file, the register data are placed at 4 byte
  59       // offset.
  60       offset = offset / 2;
  61     v = m_gpr.GetMaxU64(&offset, reg_info->byte_size);
  62     value = v;
  63     return true;
  64   } else if (IsFPR(reg_info->kinds[lldb::eRegisterKindLLDB])) {
  65     offset = offset - sizeof(GPR_linux_mips);
  66     v =m_fpr.GetMaxU64(&offset, reg_info->byte_size);
  67     value = v;
  68     return true;
  69     }
  70   return false;
  71 }
  72
  73 bool RegisterContextCorePOSIX_mips64::ReadAllRegisterValues(
  74     lldb::DataBufferSP &data_sp) {
  75   return false;
  76 }
  77
  78 bool RegisterContextCorePOSIX_mips64::WriteRegister(
  79     const RegisterInfo *reg_info, const RegisterValue &value) {
  80   return false;
  81 }
  82
  83 bool RegisterContextCorePOSIX_mips64::WriteAllRegisterValues(
  84     const lldb::DataBufferSP &data_sp) {
  85   return false;
  86 }
  87
  88 bool RegisterContextCorePOSIX_mips64::HardwareSingleStep(bool enable) {
  89   return false;
  90 }