1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class wraps target description classes used by the various code
11 // generation TableGen backends. This makes it easier to access the data and
12 // provides a single place that needs to check it for validity. All of these
13 // classes abort on error conditions.
15 //===----------------------------------------------------------------------===//
17 #include "CodeGenTarget.h"
18 #include "CodeGenIntrinsics.h"
19 #include "CodeGenSchedule.h"
20 #include "llvm/ADT/STLExtras.h"
21 #include "llvm/ADT/StringExtras.h"
22 #include "llvm/Support/CommandLine.h"
23 #include "llvm/TableGen/Error.h"
24 #include "llvm/TableGen/Record.h"
28 static cl::opt<unsigned>
29 AsmParserNum("asmparsernum", cl::init(0),
30 cl::desc("Make -gen-asm-parser emit assembly parser #N"));
32 static cl::opt<unsigned>
33 AsmWriterNum("asmwriternum", cl::init(0),
34 cl::desc("Make -gen-asm-writer emit assembly writer #N"));
36 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
37 /// record corresponds to.
38 MVT::SimpleValueType llvm::getValueType(Record *Rec) {
39 return (MVT::SimpleValueType)Rec->getValueAsInt("Value");
42 StringRef llvm::getName(MVT::SimpleValueType T) {
44 case MVT::Other: return "UNKNOWN";
45 case MVT::iPTR: return "TLI.getPointerTy()";
46 case MVT::iPTRAny: return "TLI.getPointerTy()";
47 default: return getEnumName(T);
51 StringRef llvm::getEnumName(MVT::SimpleValueType T) {
53 case MVT::Other: return "MVT::Other";
54 case MVT::i1: return "MVT::i1";
55 case MVT::i8: return "MVT::i8";
56 case MVT::i16: return "MVT::i16";
57 case MVT::i32: return "MVT::i32";
58 case MVT::i64: return "MVT::i64";
59 case MVT::i128: return "MVT::i128";
60 case MVT::Any: return "MVT::Any";
61 case MVT::iAny: return "MVT::iAny";
62 case MVT::fAny: return "MVT::fAny";
63 case MVT::vAny: return "MVT::vAny";
64 case MVT::f16: return "MVT::f16";
65 case MVT::f32: return "MVT::f32";
66 case MVT::f64: return "MVT::f64";
67 case MVT::f80: return "MVT::f80";
68 case MVT::f128: return "MVT::f128";
69 case MVT::ppcf128: return "MVT::ppcf128";
70 case MVT::x86mmx: return "MVT::x86mmx";
71 case MVT::Glue: return "MVT::Glue";
72 case MVT::isVoid: return "MVT::isVoid";
73 case MVT::v2i1: return "MVT::v2i1";
74 case MVT::v4i1: return "MVT::v4i1";
75 case MVT::v8i1: return "MVT::v8i1";
76 case MVT::v16i1: return "MVT::v16i1";
77 case MVT::v32i1: return "MVT::v32i1";
78 case MVT::v64i1: return "MVT::v64i1";
79 case MVT::v512i1: return "MVT::v512i1";
80 case MVT::v1024i1: return "MVT::v1024i1";
81 case MVT::v1i8: return "MVT::v1i8";
82 case MVT::v2i8: return "MVT::v2i8";
83 case MVT::v4i8: return "MVT::v4i8";
84 case MVT::v8i8: return "MVT::v8i8";
85 case MVT::v16i8: return "MVT::v16i8";
86 case MVT::v32i8: return "MVT::v32i8";
87 case MVT::v64i8: return "MVT::v64i8";
88 case MVT::v128i8: return "MVT::v128i8";
89 case MVT::v256i8: return "MVT::v256i8";
90 case MVT::v1i16: return "MVT::v1i16";
91 case MVT::v2i16: return "MVT::v2i16";
92 case MVT::v4i16: return "MVT::v4i16";
93 case MVT::v8i16: return "MVT::v8i16";
94 case MVT::v16i16: return "MVT::v16i16";
95 case MVT::v32i16: return "MVT::v32i16";
96 case MVT::v64i16: return "MVT::v64i16";
97 case MVT::v128i16: return "MVT::v128i16";
98 case MVT::v1i32: return "MVT::v1i32";
99 case MVT::v2i32: return "MVT::v2i32";
100 case MVT::v4i32: return "MVT::v4i32";
101 case MVT::v8i32: return "MVT::v8i32";
102 case MVT::v16i32: return "MVT::v16i32";
103 case MVT::v32i32: return "MVT::v32i32";
104 case MVT::v64i32: return "MVT::v64i32";
105 case MVT::v1i64: return "MVT::v1i64";
106 case MVT::v2i64: return "MVT::v2i64";
107 case MVT::v4i64: return "MVT::v4i64";
108 case MVT::v8i64: return "MVT::v8i64";
109 case MVT::v16i64: return "MVT::v16i64";
110 case MVT::v32i64: return "MVT::v32i64";
111 case MVT::v1i128: return "MVT::v1i128";
112 case MVT::v2f16: return "MVT::v2f16";
113 case MVT::v4f16: return "MVT::v4f16";
114 case MVT::v8f16: return "MVT::v8f16";
115 case MVT::v1f32: return "MVT::v1f32";
116 case MVT::v2f32: return "MVT::v2f32";
117 case MVT::v4f32: return "MVT::v4f32";
118 case MVT::v8f32: return "MVT::v8f32";
119 case MVT::v16f32: return "MVT::v16f32";
120 case MVT::v1f64: return "MVT::v1f64";
121 case MVT::v2f64: return "MVT::v2f64";
122 case MVT::v4f64: return "MVT::v4f64";
123 case MVT::v8f64: return "MVT::v8f64";
124 case MVT::token: return "MVT::token";
125 case MVT::Metadata: return "MVT::Metadata";
126 case MVT::iPTR: return "MVT::iPTR";
127 case MVT::iPTRAny: return "MVT::iPTRAny";
128 case MVT::Untyped: return "MVT::Untyped";
129 default: llvm_unreachable("ILLEGAL VALUE TYPE!");
133 /// getQualifiedName - Return the name of the specified record, with a
134 /// namespace qualifier if the record contains one.
136 std::string llvm::getQualifiedName(const Record *R) {
137 std::string Namespace;
138 if (R->getValue("Namespace"))
139 Namespace = R->getValueAsString("Namespace");
140 if (Namespace.empty()) return R->getName();
141 return Namespace + "::" + R->getName();
145 /// getTarget - Return the current instance of the Target class.
147 CodeGenTarget::CodeGenTarget(RecordKeeper &records)
149 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
150 if (Targets.size() == 0)
151 PrintFatalError("ERROR: No 'Target' subclasses defined!");
152 if (Targets.size() != 1)
153 PrintFatalError("ERROR: Multiple subclasses of Target defined!");
154 TargetRec = Targets[0];
157 CodeGenTarget::~CodeGenTarget() {
160 const std::string &CodeGenTarget::getName() const {
161 return TargetRec->getName();
164 std::string CodeGenTarget::getInstNamespace() const {
165 for (const CodeGenInstruction *Inst : getInstructionsByEnumValue()) {
166 // Make sure not to pick up "TargetOpcode" by accidentally getting
167 // the namespace off the PHI instruction or something.
168 if (Inst->Namespace != "TargetOpcode")
169 return Inst->Namespace;
175 Record *CodeGenTarget::getInstructionSet() const {
176 return TargetRec->getValueAsDef("InstructionSet");
180 /// getAsmParser - Return the AssemblyParser definition for this target.
182 Record *CodeGenTarget::getAsmParser() const {
183 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers");
184 if (AsmParserNum >= LI.size())
185 PrintFatalError("Target does not have an AsmParser #" +
186 Twine(AsmParserNum) + "!");
187 return LI[AsmParserNum];
190 /// getAsmParserVariant - Return the AssmblyParserVariant definition for
193 Record *CodeGenTarget::getAsmParserVariant(unsigned i) const {
194 std::vector<Record*> LI =
195 TargetRec->getValueAsListOfDefs("AssemblyParserVariants");
197 PrintFatalError("Target does not have an AsmParserVariant #" + Twine(i) +
202 /// getAsmParserVariantCount - Return the AssmblyParserVariant definition
203 /// available for this target.
205 unsigned CodeGenTarget::getAsmParserVariantCount() const {
206 std::vector<Record*> LI =
207 TargetRec->getValueAsListOfDefs("AssemblyParserVariants");
211 /// getAsmWriter - Return the AssemblyWriter definition for this target.
213 Record *CodeGenTarget::getAsmWriter() const {
214 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
215 if (AsmWriterNum >= LI.size())
216 PrintFatalError("Target does not have an AsmWriter #" +
217 Twine(AsmWriterNum) + "!");
218 return LI[AsmWriterNum];
221 CodeGenRegBank &CodeGenTarget::getRegBank() const {
223 RegBank = llvm::make_unique<CodeGenRegBank>(Records);
227 void CodeGenTarget::ReadRegAltNameIndices() const {
228 RegAltNameIndices = Records.getAllDerivedDefinitions("RegAltNameIndex");
229 std::sort(RegAltNameIndices.begin(), RegAltNameIndices.end(), LessRecord());
232 /// getRegisterByName - If there is a register with the specific AsmName,
234 const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const {
235 const StringMap<CodeGenRegister*> &Regs = getRegBank().getRegistersByName();
236 StringMap<CodeGenRegister*>::const_iterator I = Regs.find(Name);
242 std::vector<MVT::SimpleValueType> CodeGenTarget::
243 getRegisterVTs(Record *R) const {
244 const CodeGenRegister *Reg = getRegBank().getReg(R);
245 std::vector<MVT::SimpleValueType> Result;
246 for (const auto &RC : getRegBank().getRegClasses()) {
247 if (RC.contains(Reg)) {
248 ArrayRef<MVT::SimpleValueType> InVTs = RC.getValueTypes();
249 Result.insert(Result.end(), InVTs.begin(), InVTs.end());
253 // Remove duplicates.
254 array_pod_sort(Result.begin(), Result.end());
255 Result.erase(std::unique(Result.begin(), Result.end()), Result.end());
260 void CodeGenTarget::ReadLegalValueTypes() const {
261 for (const auto &RC : getRegBank().getRegClasses())
262 LegalValueTypes.insert(LegalValueTypes.end(), RC.VTs.begin(), RC.VTs.end());
264 // Remove duplicates.
265 array_pod_sort(LegalValueTypes.begin(), LegalValueTypes.end());
266 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(),
267 LegalValueTypes.end()),
268 LegalValueTypes.end());
271 CodeGenSchedModels &CodeGenTarget::getSchedModels() const {
273 SchedModels = llvm::make_unique<CodeGenSchedModels>(Records, *this);
277 void CodeGenTarget::ReadInstructions() const {
278 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
279 if (Insts.size() <= 2)
280 PrintFatalError("No 'Instruction' subclasses defined!");
282 // Parse the instructions defined in the .td file.
283 for (unsigned i = 0, e = Insts.size(); i != e; ++i)
284 Instructions[Insts[i]] = llvm::make_unique<CodeGenInstruction>(Insts[i]);
287 static const CodeGenInstruction *
288 GetInstByName(const char *Name,
289 const DenseMap<const Record*,
290 std::unique_ptr<CodeGenInstruction>> &Insts,
291 RecordKeeper &Records) {
292 const Record *Rec = Records.getDef(Name);
294 const auto I = Insts.find(Rec);
295 if (!Rec || I == Insts.end())
296 PrintFatalError(Twine("Could not find '") + Name + "' instruction!");
297 return I->second.get();
300 /// \brief Return all of the instructions defined by the target, ordered by
301 /// their enum value.
302 void CodeGenTarget::ComputeInstrsByEnum() const {
303 static const char *const FixedInstrs[] = {
304 #define HANDLE_TARGET_OPCODE(OPC, NUM) #OPC,
305 #include "llvm/Target/TargetOpcodes.def"
307 const auto &Insts = getInstructions();
308 for (const char *const *p = FixedInstrs; *p; ++p) {
309 const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records);
310 assert(Instr && "Missing target independent instruction");
311 assert(Instr->Namespace == "TargetOpcode" && "Bad namespace");
312 InstrsByEnum.push_back(Instr);
314 unsigned EndOfPredefines = InstrsByEnum.size();
316 for (const auto &I : Insts) {
317 const CodeGenInstruction *CGI = I.second.get();
318 if (CGI->Namespace != "TargetOpcode")
319 InstrsByEnum.push_back(CGI);
322 assert(InstrsByEnum.size() == Insts.size() && "Missing predefined instr");
324 // All of the instructions are now in random order based on the map iteration.
325 // Sort them by name.
326 std::sort(InstrsByEnum.begin() + EndOfPredefines, InstrsByEnum.end(),
327 [](const CodeGenInstruction *Rec1, const CodeGenInstruction *Rec2) {
328 return Rec1->TheDef->getName() < Rec2->TheDef->getName();
333 /// isLittleEndianEncoding - Return whether this target encodes its instruction
334 /// in little-endian format, i.e. bits laid out in the order [0..n]
336 bool CodeGenTarget::isLittleEndianEncoding() const {
337 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
340 /// reverseBitsForLittleEndianEncoding - For little-endian instruction bit
341 /// encodings, reverse the bit order of all instructions.
342 void CodeGenTarget::reverseBitsForLittleEndianEncoding() {
343 if (!isLittleEndianEncoding())
346 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
347 for (Record *R : Insts) {
348 if (R->getValueAsString("Namespace") == "TargetOpcode" ||
349 R->getValueAsBit("isPseudo"))
352 BitsInit *BI = R->getValueAsBitsInit("Inst");
354 unsigned numBits = BI->getNumBits();
356 SmallVector<Init *, 16> NewBits(numBits);
358 for (unsigned bit = 0, end = numBits / 2; bit != end; ++bit) {
359 unsigned bitSwapIdx = numBits - bit - 1;
360 Init *OrigBit = BI->getBit(bit);
361 Init *BitSwap = BI->getBit(bitSwapIdx);
362 NewBits[bit] = BitSwap;
363 NewBits[bitSwapIdx] = OrigBit;
366 unsigned middle = (numBits + 1) / 2;
367 NewBits[middle] = BI->getBit(middle);
370 BitsInit *NewBI = BitsInit::get(NewBits);
372 // Update the bits in reversed order so that emitInstrOpBits will get the
373 // correct endianness.
374 R->getValue("Inst")->setValue(NewBI);
378 /// guessInstructionProperties - Return true if it's OK to guess instruction
379 /// properties instead of raising an error.
381 /// This is configurable as a temporary migration aid. It will eventually be
382 /// permanently false.
383 bool CodeGenTarget::guessInstructionProperties() const {
384 return getInstructionSet()->getValueAsBit("guessInstructionProperties");
387 //===----------------------------------------------------------------------===//
388 // ComplexPattern implementation
390 ComplexPattern::ComplexPattern(Record *R) {
391 Ty = ::getValueType(R->getValueAsDef("Ty"));
392 NumOperands = R->getValueAsInt("NumOperands");
393 SelectFunc = R->getValueAsString("SelectFunc");
394 RootNodes = R->getValueAsListOfDefs("RootNodes");
396 // Parse the properties.
398 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
399 for (unsigned i = 0, e = PropList.size(); i != e; ++i)
400 if (PropList[i]->getName() == "SDNPHasChain") {
401 Properties |= 1 << SDNPHasChain;
402 } else if (PropList[i]->getName() == "SDNPOptInGlue") {
403 Properties |= 1 << SDNPOptInGlue;
404 } else if (PropList[i]->getName() == "SDNPMayStore") {
405 Properties |= 1 << SDNPMayStore;
406 } else if (PropList[i]->getName() == "SDNPMayLoad") {
407 Properties |= 1 << SDNPMayLoad;
408 } else if (PropList[i]->getName() == "SDNPSideEffect") {
409 Properties |= 1 << SDNPSideEffect;
410 } else if (PropList[i]->getName() == "SDNPMemOperand") {
411 Properties |= 1 << SDNPMemOperand;
412 } else if (PropList[i]->getName() == "SDNPVariadic") {
413 Properties |= 1 << SDNPVariadic;
414 } else if (PropList[i]->getName() == "SDNPWantRoot") {
415 Properties |= 1 << SDNPWantRoot;
416 } else if (PropList[i]->getName() == "SDNPWantParent") {
417 Properties |= 1 << SDNPWantParent;
419 PrintFatalError("Unsupported SD Node property '" +
420 PropList[i]->getName() + "' on ComplexPattern '" +
421 R->getName() + "'!");
425 //===----------------------------------------------------------------------===//
426 // CodeGenIntrinsic Implementation
427 //===----------------------------------------------------------------------===//
429 CodeGenIntrinsicTable::CodeGenIntrinsicTable(const RecordKeeper &RC,
431 std::vector<Record*> Defs = RC.getAllDerivedDefinitions("Intrinsic");
433 Intrinsics.reserve(Defs.size());
435 for (unsigned I = 0, e = Defs.size(); I != e; ++I) {
436 bool isTarget = Defs[I]->getValueAsBit("isTarget");
437 if (isTarget == TargetOnly)
438 Intrinsics.push_back(CodeGenIntrinsic(Defs[I]));
440 std::sort(Intrinsics.begin(), Intrinsics.end(),
441 [](const CodeGenIntrinsic &LHS, const CodeGenIntrinsic &RHS) {
442 return std::tie(LHS.TargetPrefix, LHS.Name) <
443 std::tie(RHS.TargetPrefix, RHS.Name);
445 Targets.push_back({"", 0, 0});
446 for (size_t I = 0, E = Intrinsics.size(); I < E; ++I)
447 if (Intrinsics[I].TargetPrefix != Targets.back().Name) {
448 Targets.back().Count = I - Targets.back().Offset;
449 Targets.push_back({Intrinsics[I].TargetPrefix, I, 0});
451 Targets.back().Count = Intrinsics.size() - Targets.back().Offset;
454 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
456 std::string DefName = R->getName();
457 ModRef = ReadWriteMem;
458 isOverloaded = false;
459 isCommutative = false;
462 isNoDuplicate = false;
463 isConvergent = false;
465 if (DefName.size() <= 4 ||
466 std::string(DefName.begin(), DefName.begin() + 4) != "int_")
467 PrintFatalError("Intrinsic '" + DefName + "' does not start with 'int_'!");
469 EnumName = std::string(DefName.begin()+4, DefName.end());
471 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field.
472 GCCBuiltinName = R->getValueAsString("GCCBuiltinName");
473 if (R->getValue("MSBuiltinName")) // Ignore a missing MSBuiltinName field.
474 MSBuiltinName = R->getValueAsString("MSBuiltinName");
476 TargetPrefix = R->getValueAsString("TargetPrefix");
477 Name = R->getValueAsString("LLVMName");
480 // If an explicit name isn't specified, derive one from the DefName.
483 for (unsigned i = 0, e = EnumName.size(); i != e; ++i)
484 Name += (EnumName[i] == '_') ? '.' : EnumName[i];
486 // Verify it starts with "llvm.".
487 if (Name.size() <= 5 ||
488 std::string(Name.begin(), Name.begin() + 5) != "llvm.")
489 PrintFatalError("Intrinsic '" + DefName + "'s name does not start with 'llvm.'!");
492 // If TargetPrefix is specified, make sure that Name starts with
493 // "llvm.<targetprefix>.".
494 if (!TargetPrefix.empty()) {
495 if (Name.size() < 6+TargetPrefix.size() ||
496 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size())
497 != (TargetPrefix + "."))
498 PrintFatalError("Intrinsic '" + DefName + "' does not start with 'llvm." +
499 TargetPrefix + ".'!");
502 // Parse the list of return types.
503 std::vector<MVT::SimpleValueType> OverloadedVTs;
504 ListInit *TypeList = R->getValueAsListInit("RetTypes");
505 for (unsigned i = 0, e = TypeList->size(); i != e; ++i) {
506 Record *TyEl = TypeList->getElementAsRecord(i);
507 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
508 MVT::SimpleValueType VT;
509 if (TyEl->isSubClassOf("LLVMMatchType")) {
510 unsigned MatchTy = TyEl->getValueAsInt("Number");
511 assert(MatchTy < OverloadedVTs.size() &&
512 "Invalid matching number!");
513 VT = OverloadedVTs[MatchTy];
514 // It only makes sense to use the extended and truncated vector element
515 // variants with iAny types; otherwise, if the intrinsic is not
516 // overloaded, all the types can be specified directly.
517 assert(((!TyEl->isSubClassOf("LLVMExtendedType") &&
518 !TyEl->isSubClassOf("LLVMTruncatedType")) ||
519 VT == MVT::iAny || VT == MVT::vAny) &&
520 "Expected iAny or vAny type");
522 VT = getValueType(TyEl->getValueAsDef("VT"));
524 if (MVT(VT).isOverloaded()) {
525 OverloadedVTs.push_back(VT);
529 // Reject invalid types.
530 if (VT == MVT::isVoid)
531 PrintFatalError("Intrinsic '" + DefName + " has void in result type list!");
533 IS.RetVTs.push_back(VT);
534 IS.RetTypeDefs.push_back(TyEl);
537 // Parse the list of parameter types.
538 TypeList = R->getValueAsListInit("ParamTypes");
539 for (unsigned i = 0, e = TypeList->size(); i != e; ++i) {
540 Record *TyEl = TypeList->getElementAsRecord(i);
541 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
542 MVT::SimpleValueType VT;
543 if (TyEl->isSubClassOf("LLVMMatchType")) {
544 unsigned MatchTy = TyEl->getValueAsInt("Number");
545 assert(MatchTy < OverloadedVTs.size() &&
546 "Invalid matching number!");
547 VT = OverloadedVTs[MatchTy];
548 // It only makes sense to use the extended and truncated vector element
549 // variants with iAny types; otherwise, if the intrinsic is not
550 // overloaded, all the types can be specified directly.
551 assert(((!TyEl->isSubClassOf("LLVMExtendedType") &&
552 !TyEl->isSubClassOf("LLVMTruncatedType") &&
553 !TyEl->isSubClassOf("LLVMVectorSameWidth") &&
554 !TyEl->isSubClassOf("LLVMPointerToElt")) ||
555 VT == MVT::iAny || VT == MVT::vAny) &&
556 "Expected iAny or vAny type");
558 VT = getValueType(TyEl->getValueAsDef("VT"));
560 if (MVT(VT).isOverloaded()) {
561 OverloadedVTs.push_back(VT);
565 // Reject invalid types.
566 if (VT == MVT::isVoid && i != e-1 /*void at end means varargs*/)
567 PrintFatalError("Intrinsic '" + DefName + " has void in result type list!");
569 IS.ParamVTs.push_back(VT);
570 IS.ParamTypeDefs.push_back(TyEl);
573 // Parse the intrinsic properties.
574 ListInit *PropList = R->getValueAsListInit("IntrProperties");
575 for (unsigned i = 0, e = PropList->size(); i != e; ++i) {
576 Record *Property = PropList->getElementAsRecord(i);
577 assert(Property->isSubClassOf("IntrinsicProperty") &&
578 "Expected a property!");
580 if (Property->getName() == "IntrNoMem")
582 else if (Property->getName() == "IntrReadMem")
583 ModRef = ModRefBehavior(ModRef & ~MR_Mod);
584 else if (Property->getName() == "IntrWriteMem")
585 ModRef = ModRefBehavior(ModRef & ~MR_Ref);
586 else if (Property->getName() == "IntrArgMemOnly")
587 ModRef = ModRefBehavior(ModRef & ~MR_Anywhere);
588 else if (Property->getName() == "Commutative")
589 isCommutative = true;
590 else if (Property->getName() == "Throws")
592 else if (Property->getName() == "IntrNoDuplicate")
593 isNoDuplicate = true;
594 else if (Property->getName() == "IntrConvergent")
596 else if (Property->getName() == "IntrNoReturn")
598 else if (Property->isSubClassOf("NoCapture")) {
599 unsigned ArgNo = Property->getValueAsInt("ArgNo");
600 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture));
601 } else if (Property->isSubClassOf("Returned")) {
602 unsigned ArgNo = Property->getValueAsInt("ArgNo");
603 ArgumentAttributes.push_back(std::make_pair(ArgNo, Returned));
604 } else if (Property->isSubClassOf("ReadOnly")) {
605 unsigned ArgNo = Property->getValueAsInt("ArgNo");
606 ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadOnly));
607 } else if (Property->isSubClassOf("WriteOnly")) {
608 unsigned ArgNo = Property->getValueAsInt("ArgNo");
609 ArgumentAttributes.push_back(std::make_pair(ArgNo, WriteOnly));
610 } else if (Property->isSubClassOf("ReadNone")) {
611 unsigned ArgNo = Property->getValueAsInt("ArgNo");
612 ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadNone));
614 llvm_unreachable("Unknown property!");
617 // Sort the argument attributes for later benefit.
618 std::sort(ArgumentAttributes.begin(), ArgumentAttributes.end());