1 //===--- InfoByHwMode.cpp -------------------------------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
9 // Classes that implement data parameterized by HW modes for instruction
10 // selection. Currently it is ValueTypeByHwMode (parameterized ValueType),
11 // and RegSizeInfoByHwMode (parameterized register/spill size and alignment
13 //===----------------------------------------------------------------------===//
15 #include "CodeGenTarget.h"
16 #include "InfoByHwMode.h"
17 #include "llvm/ADT/STLExtras.h"
18 #include "llvm/ADT/Twine.h"
19 #include "llvm/Support/Debug.h"
20 #include "llvm/Support/raw_ostream.h"
27 std::string llvm::getModeName(unsigned Mode) {
28 if (Mode == DefaultMode)
30 return (Twine('m') + Twine(Mode)).str();
33 ValueTypeByHwMode::ValueTypeByHwMode(Record *R, const CodeGenHwModes &CGH) {
34 const HwModeSelect &MS = CGH.getHwModeSelect(R);
35 for (const HwModeSelect::PairType &P : MS.Items) {
36 auto I = Map.insert({P.first, MVT(llvm::getValueType(P.second))});
37 assert(I.second && "Duplicate entry?");
42 bool ValueTypeByHwMode::operator== (const ValueTypeByHwMode &T) const {
43 assert(isValid() && T.isValid() && "Invalid type in assignment");
44 bool Simple = isSimple();
45 if (Simple != T.isSimple())
48 return getSimple() == T.getSimple();
53 bool ValueTypeByHwMode::operator< (const ValueTypeByHwMode &T) const {
54 assert(isValid() && T.isValid() && "Invalid type in comparison");
55 // Default order for maps.
59 MVT &ValueTypeByHwMode::getOrCreateTypeForMode(unsigned Mode, MVT Type) {
60 auto F = Map.find(Mode);
63 // If Mode is not in the map, look up the default mode. If it exists,
64 // make a copy of it for Mode and return it.
65 auto D = Map.find(DefaultMode);
67 return Map.insert(std::make_pair(Mode, D->second)).first->second;
68 // If default mode is not present either, use provided Type.
69 return Map.insert(std::make_pair(Mode, Type)).first->second;
72 StringRef ValueTypeByHwMode::getMVTName(MVT T) {
73 StringRef N = llvm::getEnumName(T.SimpleTy);
74 N.consume_front("MVT::");
78 void ValueTypeByHwMode::writeToStream(raw_ostream &OS) const {
80 OS << getMVTName(getSimple());
84 std::vector<const PairType*> Pairs;
85 for (const auto &P : Map)
87 std::sort(Pairs.begin(), Pairs.end(), deref<std::less<PairType>>());
90 for (unsigned i = 0, e = Pairs.size(); i != e; ++i) {
91 const PairType *P = Pairs[i];
92 OS << '(' << getModeName(P->first)
93 << ':' << getMVTName(P->second).str() << ')';
101 void ValueTypeByHwMode::dump() const {
102 dbgs() << *this << '\n';
105 ValueTypeByHwMode llvm::getValueTypeByHwMode(Record *Rec,
106 const CodeGenHwModes &CGH) {
108 if (!Rec->isSubClassOf("ValueType"))
111 assert(Rec->isSubClassOf("ValueType") &&
112 "Record must be derived from ValueType");
113 if (Rec->isSubClassOf("HwModeSelect"))
114 return ValueTypeByHwMode(Rec, CGH);
115 return ValueTypeByHwMode(llvm::getValueType(Rec));
118 RegSizeInfo::RegSizeInfo(Record *R, const CodeGenHwModes &CGH) {
119 RegSize = R->getValueAsInt("RegSize");
120 SpillSize = R->getValueAsInt("SpillSize");
121 SpillAlignment = R->getValueAsInt("SpillAlignment");
124 bool RegSizeInfo::operator< (const RegSizeInfo &I) const {
125 return std::tie(RegSize, SpillSize, SpillAlignment) <
126 std::tie(I.RegSize, I.SpillSize, I.SpillAlignment);
129 bool RegSizeInfo::isSubClassOf(const RegSizeInfo &I) const {
130 return RegSize <= I.RegSize &&
131 SpillAlignment && I.SpillAlignment % SpillAlignment == 0 &&
132 SpillSize <= I.SpillSize;
135 void RegSizeInfo::writeToStream(raw_ostream &OS) const {
136 OS << "[R=" << RegSize << ",S=" << SpillSize
137 << ",A=" << SpillAlignment << ']';
140 RegSizeInfoByHwMode::RegSizeInfoByHwMode(Record *R,
141 const CodeGenHwModes &CGH) {
142 const HwModeSelect &MS = CGH.getHwModeSelect(R);
143 for (const HwModeSelect::PairType &P : MS.Items) {
144 auto I = Map.insert({P.first, RegSizeInfo(P.second, CGH)});
145 assert(I.second && "Duplicate entry?");
150 bool RegSizeInfoByHwMode::operator< (const RegSizeInfoByHwMode &I) const {
151 unsigned M0 = Map.begin()->first;
152 return get(M0) < I.get(M0);
155 bool RegSizeInfoByHwMode::operator== (const RegSizeInfoByHwMode &I) const {
156 unsigned M0 = Map.begin()->first;
157 return get(M0) == I.get(M0);
160 bool RegSizeInfoByHwMode::isSubClassOf(const RegSizeInfoByHwMode &I) const {
161 unsigned M0 = Map.begin()->first;
162 return get(M0).isSubClassOf(I.get(M0));
165 bool RegSizeInfoByHwMode::hasStricterSpillThan(const RegSizeInfoByHwMode &I)
167 unsigned M0 = Map.begin()->first;
168 const RegSizeInfo &A0 = get(M0);
169 const RegSizeInfo &B0 = I.get(M0);
170 return std::tie(A0.SpillSize, A0.SpillAlignment) >
171 std::tie(B0.SpillSize, B0.SpillAlignment);
174 void RegSizeInfoByHwMode::writeToStream(raw_ostream &OS) const {
175 typedef typename decltype(Map)::value_type PairType;
176 std::vector<const PairType*> Pairs;
177 for (const auto &P : Map)
179 std::sort(Pairs.begin(), Pairs.end(), deref<std::less<PairType>>());
182 for (unsigned i = 0, e = Pairs.size(); i != e; ++i) {
183 const PairType *P = Pairs[i];
184 OS << '(' << getModeName(P->first) << ':' << P->second << ')';
192 raw_ostream &operator<<(raw_ostream &OS, const ValueTypeByHwMode &T) {
197 raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfo &T) {
202 raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfoByHwMode &T) {