contrib/llvm/utils/TableGen/TableGen.cpp

   1 //===- TableGen.cpp - Top-Level TableGen implementation for LLVM ----------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the main function for LLVM's TableGen.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "TableGenBackends.h" // Declares all backends.
  15 #include "llvm/Support/CommandLine.h"
  16 #include "llvm/Support/ManagedStatic.h"
  17 #include "llvm/Support/PrettyStackTrace.h"
  18 #include "llvm/Support/Signals.h"
  19 #include "llvm/TableGen/Error.h"
  20 #include "llvm/TableGen/Main.h"
  21 #include "llvm/TableGen/Record.h"
  22 #include "llvm/TableGen/SetTheory.h"
  23
  24 using namespace llvm;
  25
  26 enum ActionType {
  27   PrintRecords,
  28   GenEmitter,
  29   GenRegisterInfo,
  30   GenInstrInfo,
  31   GenAsmWriter,
  32   GenAsmMatcher,
  33   GenDisassembler,
  34   GenPseudoLowering,
  35   GenCallingConv,
  36   GenDAGISel,
  37   GenDFAPacketizer,
  38   GenFastISel,
  39   GenSubtarget,
  40   GenIntrinsic,
  41   GenTgtIntrinsic,
  42   PrintEnums,
  43   PrintSets,
  44   GenOptParserDefs,
  45   GenCTags,
  46   GenAttributes,
  47   GenSearchableTables,
  48   GenGlobalISel,
  49   GenX86EVEX2VEXTables,
  50   GenRegisterBank,
  51 };
  52
  53 namespace {
  54   cl::opt<ActionType>
  55   Action(cl::desc("Action to perform:"),
  56          cl::values(clEnumValN(PrintRecords, "print-records",
  57                                "Print all records to stdout (default)"),
  58                     clEnumValN(GenEmitter, "gen-emitter",
  59                                "Generate machine code emitter"),
  60                     clEnumValN(GenRegisterInfo, "gen-register-info",
  61                                "Generate registers and register classes info"),
  62                     clEnumValN(GenInstrInfo, "gen-instr-info",
  63                                "Generate instruction descriptions"),
  64                     clEnumValN(GenCallingConv, "gen-callingconv",
  65                                "Generate calling convention descriptions"),
  66                     clEnumValN(GenAsmWriter, "gen-asm-writer",
  67                                "Generate assembly writer"),
  68                     clEnumValN(GenDisassembler, "gen-disassembler",
  69                                "Generate disassembler"),
  70                     clEnumValN(GenPseudoLowering, "gen-pseudo-lowering",
  71                                "Generate pseudo instruction lowering"),
  72                     clEnumValN(GenAsmMatcher, "gen-asm-matcher",
  73                                "Generate assembly instruction matcher"),
  74                     clEnumValN(GenDAGISel, "gen-dag-isel",
  75                                "Generate a DAG instruction selector"),
  76                     clEnumValN(GenDFAPacketizer, "gen-dfa-packetizer",
  77                                "Generate DFA Packetizer for VLIW targets"),
  78                     clEnumValN(GenFastISel, "gen-fast-isel",
  79                                "Generate a \"fast\" instruction selector"),
  80                     clEnumValN(GenSubtarget, "gen-subtarget",
  81                                "Generate subtarget enumerations"),
  82                     clEnumValN(GenIntrinsic, "gen-intrinsic",
  83                                "Generate intrinsic information"),
  84                     clEnumValN(GenTgtIntrinsic, "gen-tgt-intrinsic",
  85                                "Generate target intrinsic information"),
  86                     clEnumValN(PrintEnums, "print-enums",
  87                                "Print enum values for a class"),
  88                     clEnumValN(PrintSets, "print-sets",
  89                                "Print expanded sets for testing DAG exprs"),
  90                     clEnumValN(GenOptParserDefs, "gen-opt-parser-defs",
  91                                "Generate option definitions"),
  92                     clEnumValN(GenCTags, "gen-ctags",
  93                                "Generate ctags-compatible index"),
  94                     clEnumValN(GenAttributes, "gen-attrs",
  95                                "Generate attributes"),
  96                     clEnumValN(GenSearchableTables, "gen-searchable-tables",
  97                                "Generate generic binary-searchable table"),
  98                     clEnumValN(GenGlobalISel, "gen-global-isel",
  99                                "Generate GlobalISel selector"),
 100                     clEnumValN(GenX86EVEX2VEXTables, "gen-x86-EVEX2VEX-tables",
 101                                "Generate X86 EVEX to VEX compress tables"),
 102                     clEnumValN(GenRegisterBank, "gen-register-bank",
 103                                "Generate registers bank descriptions")));
 104
 105   cl::OptionCategory PrintEnumsCat("Options for -print-enums");
 106   cl::opt<std::string>
 107   Class("class", cl::desc("Print Enum list for this class"),
 108         cl::value_desc("class name"), cl::cat(PrintEnumsCat));
 109
 110 bool LLVMTableGenMain(raw_ostream &OS, RecordKeeper &Records) {
 111   switch (Action) {
 112   case PrintRecords:
 113     OS << Records;           // No argument, dump all contents
 114     break;
 115   case GenEmitter:
 116     EmitCodeEmitter(Records, OS);
 117     break;
 118   case GenRegisterInfo:
 119     EmitRegisterInfo(Records, OS);
 120     break;
 121   case GenInstrInfo:
 122     EmitInstrInfo(Records, OS);
 123     break;
 124   case GenCallingConv:
 125     EmitCallingConv(Records, OS);
 126     break;
 127   case GenAsmWriter:
 128     EmitAsmWriter(Records, OS);
 129     break;
 130   case GenAsmMatcher:
 131     EmitAsmMatcher(Records, OS);
 132     break;
 133   case GenDisassembler:
 134     EmitDisassembler(Records, OS);
 135     break;
 136   case GenPseudoLowering:
 137     EmitPseudoLowering(Records, OS);
 138     break;
 139   case GenDAGISel:
 140     EmitDAGISel(Records, OS);
 141     break;
 142   case GenDFAPacketizer:
 143     EmitDFAPacketizer(Records, OS);
 144     break;
 145   case GenFastISel:
 146     EmitFastISel(Records, OS);
 147     break;
 148   case GenSubtarget:
 149     EmitSubtarget(Records, OS);
 150     break;
 151   case GenIntrinsic:
 152     EmitIntrinsics(Records, OS);
 153     break;
 154   case GenTgtIntrinsic:
 155     EmitIntrinsics(Records, OS, true);
 156     break;
 157   case GenOptParserDefs:
 158     EmitOptParser(Records, OS);
 159     break;
 160   case PrintEnums:
 161   {
 162     for (Record *Rec : Records.getAllDerivedDefinitions(Class))
 163       OS << Rec->getName() << ", ";
 164     OS << "\n";
 165     break;
 166   }
 167   case PrintSets:
 168   {
 169     SetTheory Sets;
 170     Sets.addFieldExpander("Set", "Elements");
 171     for (Record *Rec : Records.getAllDerivedDefinitions("Set")) {
 172       OS << Rec->getName() << " = [";
 173       const std::vector<Record*> *Elts = Sets.expand(Rec);
 174       assert(Elts && "Couldn't expand Set instance");
 175       for (Record *Elt : *Elts)
 176         OS << ' ' << Elt->getName();
 177       OS << " ]\n";
 178     }
 179     break;
 180   }
 181   case GenCTags:
 182     EmitCTags(Records, OS);
 183     break;
 184   case GenAttributes:
 185     EmitAttributes(Records, OS);
 186     break;
 187   case GenSearchableTables:
 188     EmitSearchableTables(Records, OS);
 189     break;
 190   case GenGlobalISel:
 191     EmitGlobalISel(Records, OS);
 192     break;
 193   case GenRegisterBank:
 194     EmitRegisterBank(Records, OS);
 195     break;
 196   case GenX86EVEX2VEXTables:
 197     EmitX86EVEX2VEXTables(Records, OS);
 198     break;
 199   }
 200
 201   return false;
 202 }
 203 }
 204
 205 int main(int argc, char **argv) {
 206   sys::PrintStackTraceOnErrorSignal(argv[0]);
 207   PrettyStackTraceProgram X(argc, argv);
 208   cl::ParseCommandLineOptions(argc, argv);
 209
 210   llvm_shutdown_obj Y;
 211
 212   return TableGenMain(argv[0], &LLVMTableGenMain);
 213 }
 214
 215 #ifdef __has_feature
 216 #if __has_feature(address_sanitizer)
 217 #include <sanitizer/lsan_interface.h>
 218 // Disable LeakSanitizer for this binary as it has too many leaks that are not
 219 // very interesting to fix. See compiler-rt/include/sanitizer/lsan_interface.h .
 220 int __lsan_is_turned_off() { return 1; }
 221 #endif  // __has_feature(address_sanitizer)
 222 #endif  // defined(__has_feature)