1 //===- X86DisassemblerTables.cpp - Disassembler tables ----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file is part of the X86 Disassembler Emitter.
11 // It contains the implementation of the disassembler tables.
12 // Documentation for the disassembler emitter in general can be found in
13 // X86DisassemblerEmitter.h.
15 //===----------------------------------------------------------------------===//
17 #include "X86DisassemblerTables.h"
18 #include "X86DisassemblerShared.h"
19 #include "llvm/ADT/STLExtras.h"
20 #include "llvm/Support/ErrorHandling.h"
21 #include "llvm/Support/Format.h"
25 using namespace X86Disassembler;
27 /// stringForContext - Returns a string containing the name of a particular
28 /// InstructionContext, usually for diagnostic purposes.
30 /// @param insnContext - The instruction class to transform to a string.
31 /// @return - A statically-allocated string constant that contains the
32 /// name of the instruction class.
33 static inline const char* stringForContext(InstructionContext insnContext) {
34 switch (insnContext) {
36 llvm_unreachable("Unhandled instruction class");
37 #define ENUM_ENTRY(n, r, d) case n: return #n; break;
38 #define ENUM_ENTRY_K_B(n, r, d) ENUM_ENTRY(n, r, d) ENUM_ENTRY(n##_K_B, r, d)\
39 ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) ENUM_ENTRY(n##_B, r, d)\
40 ENUM_ENTRY(n##_KZ_B, r, d)
47 /// stringForOperandType - Like stringForContext, but for OperandTypes.
48 static inline const char* stringForOperandType(OperandType type) {
51 llvm_unreachable("Unhandled type");
52 #define ENUM_ENTRY(i, d) case i: return #i;
58 /// stringForOperandEncoding - like stringForContext, but for
60 static inline const char* stringForOperandEncoding(OperandEncoding encoding) {
63 llvm_unreachable("Unhandled encoding");
64 #define ENUM_ENTRY(i, d) case i: return #i;
70 /// inheritsFrom - Indicates whether all instructions in one class also belong
73 /// @param child - The class that may be the subset
74 /// @param parent - The class that may be the superset
75 /// @return - True if child is a subset of parent, false otherwise.
76 static inline bool inheritsFrom(InstructionContext child,
77 InstructionContext parent, bool noPrefix = true,
78 bool VEX_LIG = false, bool VEX_WIG = false,
79 bool AdSize64 = false) {
85 return(inheritsFrom(child, IC_64BIT, AdSize64) ||
86 (noPrefix && inheritsFrom(child, IC_OPSIZE, noPrefix)) ||
87 inheritsFrom(child, IC_ADSIZE) ||
88 (noPrefix && inheritsFrom(child, IC_XD, noPrefix)) ||
89 (noPrefix && inheritsFrom(child, IC_XS, noPrefix)));
91 return(inheritsFrom(child, IC_64BIT_REXW) ||
92 (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE, noPrefix)) ||
93 (!AdSize64 && inheritsFrom(child, IC_64BIT_ADSIZE)) ||
94 (noPrefix && inheritsFrom(child, IC_64BIT_XD, noPrefix)) ||
95 (noPrefix && inheritsFrom(child, IC_64BIT_XS, noPrefix)));
97 return inheritsFrom(child, IC_64BIT_OPSIZE) ||
98 inheritsFrom(child, IC_OPSIZE_ADSIZE);
100 return (noPrefix && inheritsFrom(child, IC_OPSIZE_ADSIZE, noPrefix));
101 case IC_OPSIZE_ADSIZE:
103 case IC_64BIT_ADSIZE:
104 return (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE, noPrefix));
105 case IC_64BIT_OPSIZE_ADSIZE:
108 return inheritsFrom(child, IC_64BIT_XD);
110 return inheritsFrom(child, IC_64BIT_XS);
112 return inheritsFrom(child, IC_64BIT_XD_OPSIZE);
114 return inheritsFrom(child, IC_64BIT_XS_OPSIZE);
116 return((noPrefix && inheritsFrom(child, IC_64BIT_REXW_XS, noPrefix)) ||
117 (noPrefix && inheritsFrom(child, IC_64BIT_REXW_XD, noPrefix)) ||
118 (noPrefix && inheritsFrom(child, IC_64BIT_REXW_OPSIZE, noPrefix)) ||
119 (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE)));
120 case IC_64BIT_OPSIZE:
121 return inheritsFrom(child, IC_64BIT_REXW_OPSIZE) ||
122 (!AdSize64 && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE)) ||
123 (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE));
125 return(inheritsFrom(child, IC_64BIT_REXW_XD));
127 return(inheritsFrom(child, IC_64BIT_REXW_XS));
128 case IC_64BIT_XD_OPSIZE:
129 case IC_64BIT_XS_OPSIZE:
131 case IC_64BIT_REXW_XD:
132 case IC_64BIT_REXW_XS:
133 case IC_64BIT_REXW_OPSIZE:
134 case IC_64BIT_REXW_ADSIZE:
137 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W)) ||
138 (VEX_WIG && inheritsFrom(child, IC_VEX_W)) ||
139 (VEX_LIG && inheritsFrom(child, IC_VEX_L));
141 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XS)) ||
142 (VEX_WIG && inheritsFrom(child, IC_VEX_W_XS)) ||
143 (VEX_LIG && inheritsFrom(child, IC_VEX_L_XS));
145 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XD)) ||
146 (VEX_WIG && inheritsFrom(child, IC_VEX_W_XD)) ||
147 (VEX_LIG && inheritsFrom(child, IC_VEX_L_XD));
149 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE)) ||
150 (VEX_WIG && inheritsFrom(child, IC_VEX_W_OPSIZE)) ||
151 (VEX_LIG && inheritsFrom(child, IC_VEX_L_OPSIZE));
153 return VEX_LIG && inheritsFrom(child, IC_VEX_L_W);
155 return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XS);
157 return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XD);
158 case IC_VEX_W_OPSIZE:
159 return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE);
161 return VEX_WIG && inheritsFrom(child, IC_VEX_L_W);
163 return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XS);
165 return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XD);
166 case IC_VEX_L_OPSIZE:
167 return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE);
171 case IC_VEX_L_W_OPSIZE:
174 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W)) ||
175 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W)) ||
176 (VEX_WIG && inheritsFrom(child, IC_EVEX_W)) ||
177 (VEX_LIG && inheritsFrom(child, IC_EVEX_L)) ||
178 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2));
180 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS)) ||
181 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS)) ||
182 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS)) ||
183 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS)) ||
184 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS));
186 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD)) ||
187 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD)) ||
188 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD)) ||
189 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD)) ||
190 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD));
192 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE)) ||
193 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE)) ||
194 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE)) ||
195 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE)) ||
196 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE));
198 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K)) ||
199 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K)) ||
200 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_K)) ||
201 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_K)) ||
202 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_K));
204 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K)) ||
205 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K)) ||
206 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_K)) ||
207 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_K)) ||
208 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_K));
210 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K)) ||
211 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K)) ||
212 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_K)) ||
213 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_K)) ||
214 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_K));
215 case IC_EVEX_OPSIZE_K:
216 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K)) ||
217 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K)) ||
218 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_K)) ||
219 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_K)) ||
220 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_K));
222 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ)) ||
223 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ)) ||
224 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_KZ)) ||
225 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_KZ)) ||
226 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_KZ));
228 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ)) ||
229 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ)) ||
230 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_KZ)) ||
231 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_KZ)) ||
232 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_KZ));
234 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ)) ||
235 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ)) ||
236 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_KZ)) ||
237 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_KZ)) ||
238 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_KZ));
239 case IC_EVEX_OPSIZE_KZ:
240 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ)) ||
241 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ)) ||
242 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_KZ)) ||
243 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_KZ)) ||
244 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ));
246 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W)) ||
247 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W));
249 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS)) ||
250 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS));
252 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD)) ||
253 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD));
254 case IC_EVEX_W_OPSIZE:
255 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE)) ||
256 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE));
258 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_K)) ||
259 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_K));
261 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_K)) ||
262 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K));
264 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_K)) ||
265 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K));
266 case IC_EVEX_W_OPSIZE_K:
267 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K)) ||
268 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K));
270 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_KZ)) ||
271 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_KZ));
272 case IC_EVEX_W_XS_KZ:
273 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ)) ||
274 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ));
275 case IC_EVEX_W_XD_KZ:
276 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ)) ||
277 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ));
278 case IC_EVEX_W_OPSIZE_KZ:
279 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ)) ||
280 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ));
282 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W);
284 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS);
286 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD);
287 case IC_EVEX_L_OPSIZE:
288 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE);
290 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K);
292 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K);
294 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K);
295 case IC_EVEX_L_OPSIZE_K:
296 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K);
298 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ);
299 case IC_EVEX_L_XS_KZ:
300 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ);
301 case IC_EVEX_L_XD_KZ:
302 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ);
303 case IC_EVEX_L_OPSIZE_KZ:
304 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ);
308 case IC_EVEX_L_W_OPSIZE:
311 case IC_EVEX_L_W_XS_K:
312 case IC_EVEX_L_W_XD_K:
313 case IC_EVEX_L_W_OPSIZE_K:
316 case IC_EVEX_L_W_XS_KZ:
317 case IC_EVEX_L_W_XD_KZ:
318 case IC_EVEX_L_W_OPSIZE_KZ:
321 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W);
323 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS);
325 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD);
326 case IC_EVEX_L2_OPSIZE:
327 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE);
329 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K);
330 case IC_EVEX_L2_XS_K:
331 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K);
332 case IC_EVEX_L2_XD_K:
333 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K);
334 case IC_EVEX_L2_OPSIZE_K:
335 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K);
337 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ);
338 case IC_EVEX_L2_XS_KZ:
339 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ);
340 case IC_EVEX_L2_XD_KZ:
341 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ);
342 case IC_EVEX_L2_OPSIZE_KZ:
343 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ);
345 case IC_EVEX_L2_W_XS:
346 case IC_EVEX_L2_W_XD:
347 case IC_EVEX_L2_W_OPSIZE:
350 case IC_EVEX_L2_W_XS_K:
351 case IC_EVEX_L2_W_XD_K:
352 case IC_EVEX_L2_W_OPSIZE_K:
354 case IC_EVEX_L2_W_KZ:
355 case IC_EVEX_L2_W_XS_KZ:
356 case IC_EVEX_L2_W_XD_KZ:
357 case IC_EVEX_L2_W_OPSIZE_KZ:
360 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_B)) ||
361 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_B)) ||
362 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_B)) ||
363 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_B)) ||
364 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_B));
366 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_B)) ||
367 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B)) ||
368 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_B)) ||
369 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_B)) ||
370 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_B));
372 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_B)) ||
373 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B)) ||
374 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_B)) ||
375 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_B)) ||
376 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_B));
377 case IC_EVEX_OPSIZE_B:
378 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B)) ||
379 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B)) ||
380 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_B)) ||
381 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_B)) ||
382 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_B));
384 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K_B)) ||
385 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K_B)) ||
386 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_K_B)) ||
387 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_K_B)) ||
388 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_K_B));
390 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B)) ||
391 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B)) ||
392 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_K_B)) ||
393 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_K_B)) ||
394 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_K_B));
396 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B)) ||
397 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B)) ||
398 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_K_B)) ||
399 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_K_B)) ||
400 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_K_B));
401 case IC_EVEX_OPSIZE_K_B:
402 return (VEX_LIG && VEX_WIG &&
403 inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) ||
404 (VEX_LIG && VEX_WIG &&
405 inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B)) ||
406 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_K_B)) ||
407 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_K_B)) ||
408 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_K_B));
410 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B)) ||
411 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B)) ||
412 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_KZ_B)) ||
413 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_KZ_B)) ||
414 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_KZ_B));
415 case IC_EVEX_XS_KZ_B:
416 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B)) ||
417 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B)) ||
418 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_KZ_B)) ||
419 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_KZ_B)) ||
420 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_KZ_B));
421 case IC_EVEX_XD_KZ_B:
422 return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B)) ||
423 (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B)) ||
424 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_KZ_B)) ||
425 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_KZ_B)) ||
426 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_KZ_B));
427 case IC_EVEX_OPSIZE_KZ_B:
428 return (VEX_LIG && VEX_WIG &&
429 inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) ||
430 (VEX_LIG && VEX_WIG &&
431 inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B)) ||
432 (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_KZ_B)) ||
433 (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_KZ_B)) ||
434 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ_B));
436 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_B)) ||
437 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_B));
439 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_B)) ||
440 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B));
442 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_B)) ||
443 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B));
444 case IC_EVEX_W_OPSIZE_B:
445 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B)) ||
446 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B));
448 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_K_B)) ||
449 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_K_B));
450 case IC_EVEX_W_XS_K_B:
451 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B)) ||
452 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B));
453 case IC_EVEX_W_XD_K_B:
454 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B)) ||
455 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B));
456 case IC_EVEX_W_OPSIZE_K_B:
457 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) ||
458 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B));
460 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B)) ||
461 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B));
462 case IC_EVEX_W_XS_KZ_B:
463 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B)) ||
464 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B));
465 case IC_EVEX_W_XD_KZ_B:
466 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B)) ||
467 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B));
468 case IC_EVEX_W_OPSIZE_KZ_B:
469 return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) ||
470 (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B));
472 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_B);
474 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_B);
476 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_B);
477 case IC_EVEX_L_OPSIZE_B:
478 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B);
480 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K_B);
481 case IC_EVEX_L_XS_K_B:
482 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B);
483 case IC_EVEX_L_XD_K_B:
484 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B);
485 case IC_EVEX_L_OPSIZE_K_B:
486 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B);
488 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B);
489 case IC_EVEX_L_XS_KZ_B:
490 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B);
491 case IC_EVEX_L_XD_KZ_B:
492 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B);
493 case IC_EVEX_L_OPSIZE_KZ_B:
494 return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B);
496 case IC_EVEX_L_W_XS_B:
497 case IC_EVEX_L_W_XD_B:
498 case IC_EVEX_L_W_OPSIZE_B:
500 case IC_EVEX_L_W_K_B:
501 case IC_EVEX_L_W_XS_K_B:
502 case IC_EVEX_L_W_XD_K_B:
503 case IC_EVEX_L_W_OPSIZE_K_B:
505 case IC_EVEX_L_W_KZ_B:
506 case IC_EVEX_L_W_XS_KZ_B:
507 case IC_EVEX_L_W_XD_KZ_B:
508 case IC_EVEX_L_W_OPSIZE_KZ_B:
511 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_B);
512 case IC_EVEX_L2_XS_B:
513 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B);
514 case IC_EVEX_L2_XD_B:
515 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B);
516 case IC_EVEX_L2_OPSIZE_B:
517 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B);
519 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K_B);
520 case IC_EVEX_L2_XS_K_B:
521 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B);
522 case IC_EVEX_L2_XD_K_B:
523 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B);
524 case IC_EVEX_L2_OPSIZE_K_B:
525 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B);
526 case IC_EVEX_L2_KZ_B:
527 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B);
528 case IC_EVEX_L2_XS_KZ_B:
529 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B);
530 case IC_EVEX_L2_XD_KZ_B:
531 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B);
532 case IC_EVEX_L2_OPSIZE_KZ_B:
533 return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B);
535 case IC_EVEX_L2_W_XS_B:
536 case IC_EVEX_L2_W_XD_B:
537 case IC_EVEX_L2_W_OPSIZE_B:
539 case IC_EVEX_L2_W_K_B:
540 case IC_EVEX_L2_W_XS_K_B:
541 case IC_EVEX_L2_W_XD_K_B:
542 case IC_EVEX_L2_W_OPSIZE_K_B:
544 case IC_EVEX_L2_W_KZ_B:
545 case IC_EVEX_L2_W_XS_KZ_B:
546 case IC_EVEX_L2_W_XD_KZ_B:
547 case IC_EVEX_L2_W_OPSIZE_KZ_B:
550 errs() << "Unknown instruction class: " <<
551 stringForContext((InstructionContext)parent) << "\n";
552 llvm_unreachable("Unknown instruction class");
556 /// outranks - Indicates whether, if an instruction has two different applicable
557 /// classes, which class should be preferred when performing decode. This
558 /// imposes a total ordering (ties are resolved toward "lower")
560 /// @param upper - The class that may be preferable
561 /// @param lower - The class that may be less preferable
562 /// @return - True if upper is to be preferred, false otherwise.
563 static inline bool outranks(InstructionContext upper,
564 InstructionContext lower) {
565 assert(upper < IC_max);
566 assert(lower < IC_max);
568 #define ENUM_ENTRY(n, r, d) r,
569 #define ENUM_ENTRY_K_B(n, r, d) ENUM_ENTRY(n, r, d) \
570 ENUM_ENTRY(n##_K_B, r, d) ENUM_ENTRY(n##_KZ_B, r, d) \
571 ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) ENUM_ENTRY(n##_B, r, d)
572 static int ranks[IC_max] = {
576 #undef ENUM_ENTRY_K_B
578 return (ranks[upper] > ranks[lower]);
581 /// getDecisionType - Determines whether a ModRM decision with 255 entries can
582 /// be compacted by eliminating redundant information.
584 /// @param decision - The decision to be compacted.
585 /// @return - The compactest available representation for the decision.
586 static ModRMDecisionType getDecisionType(ModRMDecision &decision) {
587 bool satisfiesOneEntry = true;
588 bool satisfiesSplitRM = true;
589 bool satisfiesSplitReg = true;
590 bool satisfiesSplitMisc = true;
592 for (unsigned index = 0; index < 256; ++index) {
593 if (decision.instructionIDs[index] != decision.instructionIDs[0])
594 satisfiesOneEntry = false;
596 if (((index & 0xc0) == 0xc0) &&
597 (decision.instructionIDs[index] != decision.instructionIDs[0xc0]))
598 satisfiesSplitRM = false;
600 if (((index & 0xc0) != 0xc0) &&
601 (decision.instructionIDs[index] != decision.instructionIDs[0x00]))
602 satisfiesSplitRM = false;
604 if (((index & 0xc0) == 0xc0) &&
605 (decision.instructionIDs[index] != decision.instructionIDs[index&0xf8]))
606 satisfiesSplitReg = false;
608 if (((index & 0xc0) != 0xc0) &&
609 (decision.instructionIDs[index] != decision.instructionIDs[index&0x38]))
610 satisfiesSplitMisc = false;
613 if (satisfiesOneEntry)
614 return MODRM_ONEENTRY;
616 if (satisfiesSplitRM)
617 return MODRM_SPLITRM;
619 if (satisfiesSplitReg && satisfiesSplitMisc)
620 return MODRM_SPLITREG;
622 if (satisfiesSplitMisc)
623 return MODRM_SPLITMISC;
628 /// stringForDecisionType - Returns a statically-allocated string corresponding
629 /// to a particular decision type.
631 /// @param dt - The decision type.
632 /// @return - A pointer to the statically-allocated string (e.g.,
633 /// "MODRM_ONEENTRY" for MODRM_ONEENTRY).
634 static const char* stringForDecisionType(ModRMDecisionType dt) {
635 #define ENUM_ENTRY(n) case n: return #n;
638 llvm_unreachable("Unknown decision type");
644 DisassemblerTables::DisassemblerTables() {
647 for (i = 0; i < array_lengthof(Tables); i++) {
648 Tables[i] = new ContextDecision;
649 memset(Tables[i], 0, sizeof(ContextDecision));
652 HasConflicts = false;
655 DisassemblerTables::~DisassemblerTables() {
658 for (i = 0; i < array_lengthof(Tables); i++)
662 void DisassemblerTables::emitModRMDecision(raw_ostream &o1, raw_ostream &o2,
663 unsigned &i1, unsigned &i2,
664 unsigned &ModRMTableNum,
665 ModRMDecision &decision) const {
666 static uint32_t sTableNumber = 0;
667 static uint32_t sEntryNumber = 1;
668 ModRMDecisionType dt = getDecisionType(decision);
670 if (dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0)
672 o2.indent(i2) << "{ /* ModRMDecision */" << "\n";
675 o2.indent(i2) << stringForDecisionType(dt) << "," << "\n";
676 o2.indent(i2) << 0 << " /* EmptyTable */\n";
679 o2.indent(i2) << "}";
683 std::vector<unsigned> ModRMDecision;
687 llvm_unreachable("Unknown decision type");
689 ModRMDecision.push_back(decision.instructionIDs[0]);
692 ModRMDecision.push_back(decision.instructionIDs[0x00]);
693 ModRMDecision.push_back(decision.instructionIDs[0xc0]);
696 for (unsigned index = 0; index < 64; index += 8)
697 ModRMDecision.push_back(decision.instructionIDs[index]);
698 for (unsigned index = 0xc0; index < 256; index += 8)
699 ModRMDecision.push_back(decision.instructionIDs[index]);
701 case MODRM_SPLITMISC:
702 for (unsigned index = 0; index < 64; index += 8)
703 ModRMDecision.push_back(decision.instructionIDs[index]);
704 for (unsigned index = 0xc0; index < 256; ++index)
705 ModRMDecision.push_back(decision.instructionIDs[index]);
708 for (unsigned index = 0; index < 256; ++index)
709 ModRMDecision.push_back(decision.instructionIDs[index]);
713 unsigned &EntryNumber = ModRMTable[ModRMDecision];
714 if (EntryNumber == 0) {
715 EntryNumber = ModRMTableNum;
717 ModRMTableNum += ModRMDecision.size();
718 o1 << "/* Table" << EntryNumber << " */\n";
720 for (std::vector<unsigned>::const_iterator I = ModRMDecision.begin(),
721 E = ModRMDecision.end(); I != E; ++I) {
722 o1.indent(i1 * 2) << format("0x%hx", *I) << ", /* "
723 << InstructionSpecifiers[*I].name << " */\n";
728 o2.indent(i2) << "{ /* struct ModRMDecision */" << "\n";
731 o2.indent(i2) << stringForDecisionType(dt) << "," << "\n";
732 o2.indent(i2) << EntryNumber << " /* Table" << EntryNumber << " */\n";
735 o2.indent(i2) << "}";
739 llvm_unreachable("Unknown decision type");
749 case MODRM_SPLITMISC:
750 sEntryNumber += 8 + 64;
757 // We assume that the index can fit into uint16_t.
758 assert(sEntryNumber < 65536U &&
759 "Index into ModRMDecision is too large for uint16_t!");
764 void DisassemblerTables::emitOpcodeDecision(raw_ostream &o1, raw_ostream &o2,
765 unsigned &i1, unsigned &i2,
766 unsigned &ModRMTableNum,
767 OpcodeDecision &decision) const {
768 o2.indent(i2) << "{ /* struct OpcodeDecision */" << "\n";
770 o2.indent(i2) << "{" << "\n";
773 for (unsigned index = 0; index < 256; ++index) {
776 o2 << "/* 0x" << format("%02hhx", index) << " */" << "\n";
778 emitModRMDecision(o1, o2, i1, i2, ModRMTableNum,
779 decision.modRMDecisions[index]);
788 o2.indent(i2) << "}" << "\n";
790 o2.indent(i2) << "}" << "\n";
793 void DisassemblerTables::emitContextDecision(raw_ostream &o1, raw_ostream &o2,
794 unsigned &i1, unsigned &i2,
795 unsigned &ModRMTableNum,
796 ContextDecision &decision,
797 const char* name) const {
798 o2.indent(i2) << "static const struct ContextDecision " << name << " = {\n";
800 o2.indent(i2) << "{ /* opcodeDecisions */" << "\n";
803 for (unsigned index = 0; index < IC_max; ++index) {
804 o2.indent(i2) << "/* ";
805 o2 << stringForContext((InstructionContext)index);
809 emitOpcodeDecision(o1, o2, i1, i2, ModRMTableNum,
810 decision.opcodeDecisions[index]);
812 if (index + 1 < IC_max)
817 o2.indent(i2) << "}" << "\n";
819 o2.indent(i2) << "};" << "\n";
822 void DisassemblerTables::emitInstructionInfo(raw_ostream &o,
824 unsigned NumInstructions = InstructionSpecifiers.size();
826 o << "static const struct OperandSpecifier x86OperandSets[]["
827 << X86_MAX_OPERANDS << "] = {\n";
829 typedef SmallVector<std::pair<OperandEncoding, OperandType>,
830 X86_MAX_OPERANDS> OperandListTy;
831 std::map<OperandListTy, unsigned> OperandSets;
833 unsigned OperandSetNum = 0;
834 for (unsigned Index = 0; Index < NumInstructions; ++Index) {
835 OperandListTy OperandList;
837 for (unsigned OperandIndex = 0; OperandIndex < X86_MAX_OPERANDS;
839 OperandEncoding Encoding = (OperandEncoding)InstructionSpecifiers[Index]
840 .operands[OperandIndex].encoding;
841 OperandType Type = (OperandType)InstructionSpecifiers[Index]
842 .operands[OperandIndex].type;
843 OperandList.push_back(std::make_pair(Encoding, Type));
845 unsigned &N = OperandSets[OperandList];
846 if (N != 0) continue;
850 o << " { /* " << (OperandSetNum - 1) << " */\n";
851 for (unsigned i = 0, e = OperandList.size(); i != e; ++i) {
852 const char *Encoding = stringForOperandEncoding(OperandList[i].first);
853 const char *Type = stringForOperandType(OperandList[i].second);
854 o << " { " << Encoding << ", " << Type << " },\n";
860 o.indent(i * 2) << "static const struct InstructionSpecifier ";
861 o << INSTRUCTIONS_STR "[" << InstructionSpecifiers.size() << "] = {\n";
865 for (unsigned index = 0; index < NumInstructions; ++index) {
866 o.indent(i * 2) << "{ /* " << index << " */\n";
869 OperandListTy OperandList;
870 for (unsigned OperandIndex = 0; OperandIndex < X86_MAX_OPERANDS;
872 OperandEncoding Encoding = (OperandEncoding)InstructionSpecifiers[index]
873 .operands[OperandIndex].encoding;
874 OperandType Type = (OperandType)InstructionSpecifiers[index]
875 .operands[OperandIndex].type;
876 OperandList.push_back(std::make_pair(Encoding, Type));
878 o.indent(i * 2) << (OperandSets[OperandList] - 1) << ",\n";
880 o.indent(i * 2) << "/* " << InstructionSpecifiers[index].name << " */\n";
883 o.indent(i * 2) << "},\n";
887 o.indent(i * 2) << "};" << "\n";
890 void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const {
891 const unsigned int tableSize = 16384;
892 o.indent(i * 2) << "static const uint8_t " CONTEXTS_STR
893 "[" << tableSize << "] = {\n";
896 for (unsigned index = 0; index < tableSize; ++index) {
899 if (index & ATTR_EVEX) {
901 if (index & ATTR_EVEXL2)
903 else if (index & ATTR_EVEXL)
905 if (index & ATTR_REXW)
907 if (index & ATTR_OPSIZE)
909 else if (index & ATTR_XD)
911 else if (index & ATTR_XS)
913 if (index & ATTR_EVEXKZ)
915 else if (index & ATTR_EVEXK)
917 if (index & ATTR_EVEXB)
920 else if ((index & ATTR_VEXL) && (index & ATTR_REXW) && (index & ATTR_OPSIZE))
921 o << "IC_VEX_L_W_OPSIZE";
922 else if ((index & ATTR_VEXL) && (index & ATTR_REXW) && (index & ATTR_XD))
923 o << "IC_VEX_L_W_XD";
924 else if ((index & ATTR_VEXL) && (index & ATTR_REXW) && (index & ATTR_XS))
925 o << "IC_VEX_L_W_XS";
926 else if ((index & ATTR_VEXL) && (index & ATTR_REXW))
928 else if ((index & ATTR_VEXL) && (index & ATTR_OPSIZE))
929 o << "IC_VEX_L_OPSIZE";
930 else if ((index & ATTR_VEXL) && (index & ATTR_XD))
932 else if ((index & ATTR_VEXL) && (index & ATTR_XS))
934 else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_OPSIZE))
935 o << "IC_VEX_W_OPSIZE";
936 else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_XD))
938 else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_XS))
940 else if (index & ATTR_VEXL)
942 else if ((index & ATTR_VEX) && (index & ATTR_REXW))
944 else if ((index & ATTR_VEX) && (index & ATTR_OPSIZE))
945 o << "IC_VEX_OPSIZE";
946 else if ((index & ATTR_VEX) && (index & ATTR_XD))
948 else if ((index & ATTR_VEX) && (index & ATTR_XS))
950 else if (index & ATTR_VEX)
952 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XS))
953 o << "IC_64BIT_REXW_XS";
954 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XD))
955 o << "IC_64BIT_REXW_XD";
956 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
957 (index & ATTR_OPSIZE))
958 o << "IC_64BIT_REXW_OPSIZE";
959 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
960 (index & ATTR_ADSIZE))
961 o << "IC_64BIT_REXW_ADSIZE";
962 else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_OPSIZE))
963 o << "IC_64BIT_XD_OPSIZE";
964 else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_OPSIZE))
965 o << "IC_64BIT_XS_OPSIZE";
966 else if ((index & ATTR_64BIT) && (index & ATTR_XS))
968 else if ((index & ATTR_64BIT) && (index & ATTR_XD))
970 else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE) &&
971 (index & ATTR_ADSIZE))
972 o << "IC_64BIT_OPSIZE_ADSIZE";
973 else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE))
974 o << "IC_64BIT_OPSIZE";
975 else if ((index & ATTR_64BIT) && (index & ATTR_ADSIZE))
976 o << "IC_64BIT_ADSIZE";
977 else if ((index & ATTR_64BIT) && (index & ATTR_REXW))
978 o << "IC_64BIT_REXW";
979 else if ((index & ATTR_64BIT))
981 else if ((index & ATTR_XS) && (index & ATTR_OPSIZE))
983 else if ((index & ATTR_XD) && (index & ATTR_OPSIZE))
985 else if (index & ATTR_XS)
987 else if (index & ATTR_XD)
989 else if ((index & ATTR_OPSIZE) && (index & ATTR_ADSIZE))
990 o << "IC_OPSIZE_ADSIZE";
991 else if (index & ATTR_OPSIZE)
993 else if (index & ATTR_ADSIZE)
998 if (index < tableSize - 1)
1003 o << " /* " << index << " */";
1009 o.indent(i * 2) << "};" << "\n";
1012 void DisassemblerTables::emitContextDecisions(raw_ostream &o1, raw_ostream &o2,
1013 unsigned &i1, unsigned &i2,
1014 unsigned &ModRMTableNum) const {
1015 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[0], ONEBYTE_STR);
1016 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[1], TWOBYTE_STR);
1017 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[2], THREEBYTE38_STR);
1018 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[3], THREEBYTE3A_STR);
1019 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[4], XOP8_MAP_STR);
1020 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[5], XOP9_MAP_STR);
1021 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[6], XOPA_MAP_STR);
1024 void DisassemblerTables::emit(raw_ostream &o) const {
1031 raw_string_ostream o1(s1);
1032 raw_string_ostream o2(s2);
1034 emitInstructionInfo(o, i2);
1037 emitContextTable(o, i2);
1040 unsigned ModRMTableNum = 0;
1042 o << "static const InstrUID modRMTable[] = {\n";
1044 std::vector<unsigned> EmptyTable(1, 0);
1045 ModRMTable[EmptyTable] = ModRMTableNum;
1046 ModRMTableNum += EmptyTable.size();
1047 o1 << "/* EmptyTable */\n";
1048 o1.indent(i1 * 2) << "0x0,\n";
1050 emitContextDecisions(o1, o2, i1, i2, ModRMTableNum);
1061 void DisassemblerTables::setTableFields(ModRMDecision &decision,
1062 const ModRMFilter &filter,
1065 for (unsigned index = 0; index < 256; ++index) {
1066 if (filter.accepts(index)) {
1067 if (decision.instructionIDs[index] == uid)
1070 if (decision.instructionIDs[index] != 0) {
1071 InstructionSpecifier &newInfo =
1072 InstructionSpecifiers[uid];
1073 InstructionSpecifier &previousInfo =
1074 InstructionSpecifiers[decision.instructionIDs[index]];
1076 if(previousInfo.name == "NOOP" && (newInfo.name == "XCHG16ar" ||
1077 newInfo.name == "XCHG32ar" ||
1078 newInfo.name == "XCHG32ar64" ||
1079 newInfo.name == "XCHG64ar"))
1080 continue; // special case for XCHG*ar and NOOP
1082 if (previousInfo.name == "DATA16_PREFIX" &&
1083 newInfo.name == "DATA32_PREFIX")
1084 continue; // special case for data16 and data32
1086 if (outranks(previousInfo.insnContext, newInfo.insnContext))
1089 if (previousInfo.insnContext == newInfo.insnContext) {
1090 errs() << "Error: Primary decode conflict: ";
1091 errs() << newInfo.name << " would overwrite " << previousInfo.name;
1093 errs() << "ModRM " << index << "\n";
1094 errs() << "Opcode " << (uint16_t)opcode << "\n";
1095 errs() << "Context " << stringForContext(newInfo.insnContext) << "\n";
1096 HasConflicts = true;
1100 decision.instructionIDs[index] = uid;
1105 void DisassemblerTables::setTableFields(OpcodeType type,
1106 InstructionContext insnContext,
1108 const ModRMFilter &filter,
1114 unsigned addressSize) {
1115 ContextDecision &decision = *Tables[type];
1117 for (unsigned index = 0; index < IC_max; ++index) {
1118 if ((is32bit || addressSize == 16) &&
1119 inheritsFrom((InstructionContext)index, IC_64BIT))
1122 bool adSize64 = addressSize == 64;
1123 if (inheritsFrom((InstructionContext)index,
1124 InstructionSpecifiers[uid].insnContext, noPrefix,
1125 ignoresVEX_L, ignoresVEX_W, adSize64))
1126 setTableFields(decision.opcodeDecisions[index].modRMDecisions[opcode],