1 /*===---- emmintrin.h - SSE2 intrinsics ------------------------------------===
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
13 #include <xmmintrin.h>
15 typedef double __m128d __attribute__((__vector_size__(16), __aligned__(16)));
16 typedef long long __m128i __attribute__((__vector_size__(16), __aligned__(16)));
18 typedef double __m128d_u __attribute__((__vector_size__(16), __aligned__(1)));
19 typedef long long __m128i_u __attribute__((__vector_size__(16), __aligned__(1)));
22 typedef double __v2df __attribute__ ((__vector_size__ (16)));
23 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
24 typedef short __v8hi __attribute__((__vector_size__(16)));
25 typedef char __v16qi __attribute__((__vector_size__(16)));
28 typedef unsigned long long __v2du __attribute__ ((__vector_size__ (16)));
29 typedef unsigned short __v8hu __attribute__((__vector_size__(16)));
30 typedef unsigned char __v16qu __attribute__((__vector_size__(16)));
32 /* We need an explicitly signed variant for char. Note that this shouldn't
33 * appear in the interface though. */
34 typedef signed char __v16qs __attribute__((__vector_size__(16)));
36 /* Define the default attributes for the functions in this file. */
37 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse2"), __min_vector_width__(128)))
38 #define __DEFAULT_FN_ATTRS_MMX __attribute__((__always_inline__, __nodebug__, __target__("mmx,sse2"), __min_vector_width__(64)))
40 /// Adds lower double-precision values in both operands and returns the
41 /// sum in the lower 64 bits of the result. The upper 64 bits of the result
42 /// are copied from the upper double-precision value of the first operand.
44 /// \headerfile <x86intrin.h>
46 /// This intrinsic corresponds to the <c> VADDSD / ADDSD </c> instruction.
49 /// A 128-bit vector of [2 x double] containing one of the source operands.
51 /// A 128-bit vector of [2 x double] containing one of the source operands.
52 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
53 /// sum of the lower 64 bits of both operands. The upper 64 bits are copied
54 /// from the upper 64 bits of the first source operand.
55 static __inline__ __m128d __DEFAULT_FN_ATTRS
56 _mm_add_sd(__m128d __a, __m128d __b)
62 /// Adds two 128-bit vectors of [2 x double].
64 /// \headerfile <x86intrin.h>
66 /// This intrinsic corresponds to the <c> VADDPD / ADDPD </c> instruction.
69 /// A 128-bit vector of [2 x double] containing one of the source operands.
71 /// A 128-bit vector of [2 x double] containing one of the source operands.
72 /// \returns A 128-bit vector of [2 x double] containing the sums of both
74 static __inline__ __m128d __DEFAULT_FN_ATTRS
75 _mm_add_pd(__m128d __a, __m128d __b)
77 return (__m128d)((__v2df)__a + (__v2df)__b);
80 /// Subtracts the lower double-precision value of the second operand
81 /// from the lower double-precision value of the first operand and returns
82 /// the difference in the lower 64 bits of the result. The upper 64 bits of
83 /// the result are copied from the upper double-precision value of the first
86 /// \headerfile <x86intrin.h>
88 /// This intrinsic corresponds to the <c> VSUBSD / SUBSD </c> instruction.
91 /// A 128-bit vector of [2 x double] containing the minuend.
93 /// A 128-bit vector of [2 x double] containing the subtrahend.
94 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
95 /// difference of the lower 64 bits of both operands. The upper 64 bits are
96 /// copied from the upper 64 bits of the first source operand.
97 static __inline__ __m128d __DEFAULT_FN_ATTRS
98 _mm_sub_sd(__m128d __a, __m128d __b)
104 /// Subtracts two 128-bit vectors of [2 x double].
106 /// \headerfile <x86intrin.h>
108 /// This intrinsic corresponds to the <c> VSUBPD / SUBPD </c> instruction.
111 /// A 128-bit vector of [2 x double] containing the minuend.
113 /// A 128-bit vector of [2 x double] containing the subtrahend.
114 /// \returns A 128-bit vector of [2 x double] containing the differences between
116 static __inline__ __m128d __DEFAULT_FN_ATTRS
117 _mm_sub_pd(__m128d __a, __m128d __b)
119 return (__m128d)((__v2df)__a - (__v2df)__b);
122 /// Multiplies lower double-precision values in both operands and returns
123 /// the product in the lower 64 bits of the result. The upper 64 bits of the
124 /// result are copied from the upper double-precision value of the first
127 /// \headerfile <x86intrin.h>
129 /// This intrinsic corresponds to the <c> VMULSD / MULSD </c> instruction.
132 /// A 128-bit vector of [2 x double] containing one of the source operands.
134 /// A 128-bit vector of [2 x double] containing one of the source operands.
135 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
136 /// product of the lower 64 bits of both operands. The upper 64 bits are
137 /// copied from the upper 64 bits of the first source operand.
138 static __inline__ __m128d __DEFAULT_FN_ATTRS
139 _mm_mul_sd(__m128d __a, __m128d __b)
145 /// Multiplies two 128-bit vectors of [2 x double].
147 /// \headerfile <x86intrin.h>
149 /// This intrinsic corresponds to the <c> VMULPD / MULPD </c> instruction.
152 /// A 128-bit vector of [2 x double] containing one of the operands.
154 /// A 128-bit vector of [2 x double] containing one of the operands.
155 /// \returns A 128-bit vector of [2 x double] containing the products of both
157 static __inline__ __m128d __DEFAULT_FN_ATTRS
158 _mm_mul_pd(__m128d __a, __m128d __b)
160 return (__m128d)((__v2df)__a * (__v2df)__b);
163 /// Divides the lower double-precision value of the first operand by the
164 /// lower double-precision value of the second operand and returns the
165 /// quotient in the lower 64 bits of the result. The upper 64 bits of the
166 /// result are copied from the upper double-precision value of the first
169 /// \headerfile <x86intrin.h>
171 /// This intrinsic corresponds to the <c> VDIVSD / DIVSD </c> instruction.
174 /// A 128-bit vector of [2 x double] containing the dividend.
176 /// A 128-bit vector of [2 x double] containing divisor.
177 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
178 /// quotient of the lower 64 bits of both operands. The upper 64 bits are
179 /// copied from the upper 64 bits of the first source operand.
180 static __inline__ __m128d __DEFAULT_FN_ATTRS
181 _mm_div_sd(__m128d __a, __m128d __b)
187 /// Performs an element-by-element division of two 128-bit vectors of
190 /// \headerfile <x86intrin.h>
192 /// This intrinsic corresponds to the <c> VDIVPD / DIVPD </c> instruction.
195 /// A 128-bit vector of [2 x double] containing the dividend.
197 /// A 128-bit vector of [2 x double] containing the divisor.
198 /// \returns A 128-bit vector of [2 x double] containing the quotients of both
200 static __inline__ __m128d __DEFAULT_FN_ATTRS
201 _mm_div_pd(__m128d __a, __m128d __b)
203 return (__m128d)((__v2df)__a / (__v2df)__b);
206 /// Calculates the square root of the lower double-precision value of
207 /// the second operand and returns it in the lower 64 bits of the result.
208 /// The upper 64 bits of the result are copied from the upper
209 /// double-precision value of the first operand.
211 /// \headerfile <x86intrin.h>
213 /// This intrinsic corresponds to the <c> VSQRTSD / SQRTSD </c> instruction.
216 /// A 128-bit vector of [2 x double] containing one of the operands. The
217 /// upper 64 bits of this operand are copied to the upper 64 bits of the
220 /// A 128-bit vector of [2 x double] containing one of the operands. The
221 /// square root is calculated using the lower 64 bits of this operand.
222 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
223 /// square root of the lower 64 bits of operand \a __b, and whose upper 64
224 /// bits are copied from the upper 64 bits of operand \a __a.
225 static __inline__ __m128d __DEFAULT_FN_ATTRS
226 _mm_sqrt_sd(__m128d __a, __m128d __b)
228 __m128d __c = __builtin_ia32_sqrtsd((__v2df)__b);
229 return __extension__ (__m128d) { __c[0], __a[1] };
232 /// Calculates the square root of the each of two values stored in a
233 /// 128-bit vector of [2 x double].
235 /// \headerfile <x86intrin.h>
237 /// This intrinsic corresponds to the <c> VSQRTPD / SQRTPD </c> instruction.
240 /// A 128-bit vector of [2 x double].
241 /// \returns A 128-bit vector of [2 x double] containing the square roots of the
242 /// values in the operand.
243 static __inline__ __m128d __DEFAULT_FN_ATTRS
244 _mm_sqrt_pd(__m128d __a)
246 return __builtin_ia32_sqrtpd((__v2df)__a);
249 /// Compares lower 64-bit double-precision values of both operands, and
250 /// returns the lesser of the pair of values in the lower 64-bits of the
251 /// result. The upper 64 bits of the result are copied from the upper
252 /// double-precision value of the first operand.
254 /// \headerfile <x86intrin.h>
256 /// This intrinsic corresponds to the <c> VMINSD / MINSD </c> instruction.
259 /// A 128-bit vector of [2 x double] containing one of the operands. The
260 /// lower 64 bits of this operand are used in the comparison.
262 /// A 128-bit vector of [2 x double] containing one of the operands. The
263 /// lower 64 bits of this operand are used in the comparison.
264 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
265 /// minimum value between both operands. The upper 64 bits are copied from
266 /// the upper 64 bits of the first source operand.
267 static __inline__ __m128d __DEFAULT_FN_ATTRS
268 _mm_min_sd(__m128d __a, __m128d __b)
270 return __builtin_ia32_minsd((__v2df)__a, (__v2df)__b);
273 /// Performs element-by-element comparison of the two 128-bit vectors of
274 /// [2 x double] and returns the vector containing the lesser of each pair of
277 /// \headerfile <x86intrin.h>
279 /// This intrinsic corresponds to the <c> VMINPD / MINPD </c> instruction.
282 /// A 128-bit vector of [2 x double] containing one of the operands.
284 /// A 128-bit vector of [2 x double] containing one of the operands.
285 /// \returns A 128-bit vector of [2 x double] containing the minimum values
286 /// between both operands.
287 static __inline__ __m128d __DEFAULT_FN_ATTRS
288 _mm_min_pd(__m128d __a, __m128d __b)
290 return __builtin_ia32_minpd((__v2df)__a, (__v2df)__b);
293 /// Compares lower 64-bit double-precision values of both operands, and
294 /// returns the greater of the pair of values in the lower 64-bits of the
295 /// result. The upper 64 bits of the result are copied from the upper
296 /// double-precision value of the first operand.
298 /// \headerfile <x86intrin.h>
300 /// This intrinsic corresponds to the <c> VMAXSD / MAXSD </c> instruction.
303 /// A 128-bit vector of [2 x double] containing one of the operands. The
304 /// lower 64 bits of this operand are used in the comparison.
306 /// A 128-bit vector of [2 x double] containing one of the operands. The
307 /// lower 64 bits of this operand are used in the comparison.
308 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
309 /// maximum value between both operands. The upper 64 bits are copied from
310 /// the upper 64 bits of the first source operand.
311 static __inline__ __m128d __DEFAULT_FN_ATTRS
312 _mm_max_sd(__m128d __a, __m128d __b)
314 return __builtin_ia32_maxsd((__v2df)__a, (__v2df)__b);
317 /// Performs element-by-element comparison of the two 128-bit vectors of
318 /// [2 x double] and returns the vector containing the greater of each pair
321 /// \headerfile <x86intrin.h>
323 /// This intrinsic corresponds to the <c> VMAXPD / MAXPD </c> instruction.
326 /// A 128-bit vector of [2 x double] containing one of the operands.
328 /// A 128-bit vector of [2 x double] containing one of the operands.
329 /// \returns A 128-bit vector of [2 x double] containing the maximum values
330 /// between both operands.
331 static __inline__ __m128d __DEFAULT_FN_ATTRS
332 _mm_max_pd(__m128d __a, __m128d __b)
334 return __builtin_ia32_maxpd((__v2df)__a, (__v2df)__b);
337 /// Performs a bitwise AND of two 128-bit vectors of [2 x double].
339 /// \headerfile <x86intrin.h>
341 /// This intrinsic corresponds to the <c> VPAND / PAND </c> instruction.
344 /// A 128-bit vector of [2 x double] containing one of the source operands.
346 /// A 128-bit vector of [2 x double] containing one of the source operands.
347 /// \returns A 128-bit vector of [2 x double] containing the bitwise AND of the
348 /// values between both operands.
349 static __inline__ __m128d __DEFAULT_FN_ATTRS
350 _mm_and_pd(__m128d __a, __m128d __b)
352 return (__m128d)((__v2du)__a & (__v2du)__b);
355 /// Performs a bitwise AND of two 128-bit vectors of [2 x double], using
356 /// the one's complement of the values contained in the first source operand.
358 /// \headerfile <x86intrin.h>
360 /// This intrinsic corresponds to the <c> VPANDN / PANDN </c> instruction.
363 /// A 128-bit vector of [2 x double] containing the left source operand. The
364 /// one's complement of this value is used in the bitwise AND.
366 /// A 128-bit vector of [2 x double] containing the right source operand.
367 /// \returns A 128-bit vector of [2 x double] containing the bitwise AND of the
368 /// values in the second operand and the one's complement of the first
370 static __inline__ __m128d __DEFAULT_FN_ATTRS
371 _mm_andnot_pd(__m128d __a, __m128d __b)
373 return (__m128d)(~(__v2du)__a & (__v2du)__b);
376 /// Performs a bitwise OR of two 128-bit vectors of [2 x double].
378 /// \headerfile <x86intrin.h>
380 /// This intrinsic corresponds to the <c> VPOR / POR </c> instruction.
383 /// A 128-bit vector of [2 x double] containing one of the source operands.
385 /// A 128-bit vector of [2 x double] containing one of the source operands.
386 /// \returns A 128-bit vector of [2 x double] containing the bitwise OR of the
387 /// values between both operands.
388 static __inline__ __m128d __DEFAULT_FN_ATTRS
389 _mm_or_pd(__m128d __a, __m128d __b)
391 return (__m128d)((__v2du)__a | (__v2du)__b);
394 /// Performs a bitwise XOR of two 128-bit vectors of [2 x double].
396 /// \headerfile <x86intrin.h>
398 /// This intrinsic corresponds to the <c> VPXOR / PXOR </c> instruction.
401 /// A 128-bit vector of [2 x double] containing one of the source operands.
403 /// A 128-bit vector of [2 x double] containing one of the source operands.
404 /// \returns A 128-bit vector of [2 x double] containing the bitwise XOR of the
405 /// values between both operands.
406 static __inline__ __m128d __DEFAULT_FN_ATTRS
407 _mm_xor_pd(__m128d __a, __m128d __b)
409 return (__m128d)((__v2du)__a ^ (__v2du)__b);
412 /// Compares each of the corresponding double-precision values of the
413 /// 128-bit vectors of [2 x double] for equality. Each comparison yields 0x0
414 /// for false, 0xFFFFFFFFFFFFFFFF for true.
416 /// \headerfile <x86intrin.h>
418 /// This intrinsic corresponds to the <c> VCMPEQPD / CMPEQPD </c> instruction.
421 /// A 128-bit vector of [2 x double].
423 /// A 128-bit vector of [2 x double].
424 /// \returns A 128-bit vector containing the comparison results.
425 static __inline__ __m128d __DEFAULT_FN_ATTRS
426 _mm_cmpeq_pd(__m128d __a, __m128d __b)
428 return (__m128d)__builtin_ia32_cmpeqpd((__v2df)__a, (__v2df)__b);
431 /// Compares each of the corresponding double-precision values of the
432 /// 128-bit vectors of [2 x double] to determine if the values in the first
433 /// operand are less than those in the second operand. Each comparison
434 /// yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
436 /// \headerfile <x86intrin.h>
438 /// This intrinsic corresponds to the <c> VCMPLTPD / CMPLTPD </c> instruction.
441 /// A 128-bit vector of [2 x double].
443 /// A 128-bit vector of [2 x double].
444 /// \returns A 128-bit vector containing the comparison results.
445 static __inline__ __m128d __DEFAULT_FN_ATTRS
446 _mm_cmplt_pd(__m128d __a, __m128d __b)
448 return (__m128d)__builtin_ia32_cmpltpd((__v2df)__a, (__v2df)__b);
451 /// Compares each of the corresponding double-precision values of the
452 /// 128-bit vectors of [2 x double] to determine if the values in the first
453 /// operand are less than or equal to those in the second operand.
455 /// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
457 /// \headerfile <x86intrin.h>
459 /// This intrinsic corresponds to the <c> VCMPLEPD / CMPLEPD </c> instruction.
462 /// A 128-bit vector of [2 x double].
464 /// A 128-bit vector of [2 x double].
465 /// \returns A 128-bit vector containing the comparison results.
466 static __inline__ __m128d __DEFAULT_FN_ATTRS
467 _mm_cmple_pd(__m128d __a, __m128d __b)
469 return (__m128d)__builtin_ia32_cmplepd((__v2df)__a, (__v2df)__b);
472 /// Compares each of the corresponding double-precision values of the
473 /// 128-bit vectors of [2 x double] to determine if the values in the first
474 /// operand are greater than those in the second operand.
476 /// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
478 /// \headerfile <x86intrin.h>
480 /// This intrinsic corresponds to the <c> VCMPLTPD / CMPLTPD </c> instruction.
483 /// A 128-bit vector of [2 x double].
485 /// A 128-bit vector of [2 x double].
486 /// \returns A 128-bit vector containing the comparison results.
487 static __inline__ __m128d __DEFAULT_FN_ATTRS
488 _mm_cmpgt_pd(__m128d __a, __m128d __b)
490 return (__m128d)__builtin_ia32_cmpltpd((__v2df)__b, (__v2df)__a);
493 /// Compares each of the corresponding double-precision values of the
494 /// 128-bit vectors of [2 x double] to determine if the values in the first
495 /// operand are greater than or equal to those in the second operand.
497 /// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
499 /// \headerfile <x86intrin.h>
501 /// This intrinsic corresponds to the <c> VCMPLEPD / CMPLEPD </c> instruction.
504 /// A 128-bit vector of [2 x double].
506 /// A 128-bit vector of [2 x double].
507 /// \returns A 128-bit vector containing the comparison results.
508 static __inline__ __m128d __DEFAULT_FN_ATTRS
509 _mm_cmpge_pd(__m128d __a, __m128d __b)
511 return (__m128d)__builtin_ia32_cmplepd((__v2df)__b, (__v2df)__a);
514 /// Compares each of the corresponding double-precision values of the
515 /// 128-bit vectors of [2 x double] to determine if the values in the first
516 /// operand are ordered with respect to those in the second operand.
518 /// A pair of double-precision values are "ordered" with respect to each
519 /// other if neither value is a NaN. Each comparison yields 0x0 for false,
520 /// 0xFFFFFFFFFFFFFFFF for true.
522 /// \headerfile <x86intrin.h>
524 /// This intrinsic corresponds to the <c> VCMPORDPD / CMPORDPD </c> instruction.
527 /// A 128-bit vector of [2 x double].
529 /// A 128-bit vector of [2 x double].
530 /// \returns A 128-bit vector containing the comparison results.
531 static __inline__ __m128d __DEFAULT_FN_ATTRS
532 _mm_cmpord_pd(__m128d __a, __m128d __b)
534 return (__m128d)__builtin_ia32_cmpordpd((__v2df)__a, (__v2df)__b);
537 /// Compares each of the corresponding double-precision values of the
538 /// 128-bit vectors of [2 x double] to determine if the values in the first
539 /// operand are unordered with respect to those in the second operand.
541 /// A pair of double-precision values are "unordered" with respect to each
542 /// other if one or both values are NaN. Each comparison yields 0x0 for
543 /// false, 0xFFFFFFFFFFFFFFFF for true.
545 /// \headerfile <x86intrin.h>
547 /// This intrinsic corresponds to the <c> VCMPUNORDPD / CMPUNORDPD </c>
551 /// A 128-bit vector of [2 x double].
553 /// A 128-bit vector of [2 x double].
554 /// \returns A 128-bit vector containing the comparison results.
555 static __inline__ __m128d __DEFAULT_FN_ATTRS
556 _mm_cmpunord_pd(__m128d __a, __m128d __b)
558 return (__m128d)__builtin_ia32_cmpunordpd((__v2df)__a, (__v2df)__b);
561 /// Compares each of the corresponding double-precision values of the
562 /// 128-bit vectors of [2 x double] to determine if the values in the first
563 /// operand are unequal to those in the second operand.
565 /// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
567 /// \headerfile <x86intrin.h>
569 /// This intrinsic corresponds to the <c> VCMPNEQPD / CMPNEQPD </c> instruction.
572 /// A 128-bit vector of [2 x double].
574 /// A 128-bit vector of [2 x double].
575 /// \returns A 128-bit vector containing the comparison results.
576 static __inline__ __m128d __DEFAULT_FN_ATTRS
577 _mm_cmpneq_pd(__m128d __a, __m128d __b)
579 return (__m128d)__builtin_ia32_cmpneqpd((__v2df)__a, (__v2df)__b);
582 /// Compares each of the corresponding double-precision values of the
583 /// 128-bit vectors of [2 x double] to determine if the values in the first
584 /// operand are not less than those in the second operand.
586 /// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
588 /// \headerfile <x86intrin.h>
590 /// This intrinsic corresponds to the <c> VCMPNLTPD / CMPNLTPD </c> instruction.
593 /// A 128-bit vector of [2 x double].
595 /// A 128-bit vector of [2 x double].
596 /// \returns A 128-bit vector containing the comparison results.
597 static __inline__ __m128d __DEFAULT_FN_ATTRS
598 _mm_cmpnlt_pd(__m128d __a, __m128d __b)
600 return (__m128d)__builtin_ia32_cmpnltpd((__v2df)__a, (__v2df)__b);
603 /// Compares each of the corresponding double-precision values of the
604 /// 128-bit vectors of [2 x double] to determine if the values in the first
605 /// operand are not less than or equal to those in the second operand.
607 /// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
609 /// \headerfile <x86intrin.h>
611 /// This intrinsic corresponds to the <c> VCMPNLEPD / CMPNLEPD </c> instruction.
614 /// A 128-bit vector of [2 x double].
616 /// A 128-bit vector of [2 x double].
617 /// \returns A 128-bit vector containing the comparison results.
618 static __inline__ __m128d __DEFAULT_FN_ATTRS
619 _mm_cmpnle_pd(__m128d __a, __m128d __b)
621 return (__m128d)__builtin_ia32_cmpnlepd((__v2df)__a, (__v2df)__b);
624 /// Compares each of the corresponding double-precision values of the
625 /// 128-bit vectors of [2 x double] to determine if the values in the first
626 /// operand are not greater than those in the second operand.
628 /// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
630 /// \headerfile <x86intrin.h>
632 /// This intrinsic corresponds to the <c> VCMPNLTPD / CMPNLTPD </c> instruction.
635 /// A 128-bit vector of [2 x double].
637 /// A 128-bit vector of [2 x double].
638 /// \returns A 128-bit vector containing the comparison results.
639 static __inline__ __m128d __DEFAULT_FN_ATTRS
640 _mm_cmpngt_pd(__m128d __a, __m128d __b)
642 return (__m128d)__builtin_ia32_cmpnltpd((__v2df)__b, (__v2df)__a);
645 /// Compares each of the corresponding double-precision values of the
646 /// 128-bit vectors of [2 x double] to determine if the values in the first
647 /// operand are not greater than or equal to those in the second operand.
649 /// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
651 /// \headerfile <x86intrin.h>
653 /// This intrinsic corresponds to the <c> VCMPNLEPD / CMPNLEPD </c> instruction.
656 /// A 128-bit vector of [2 x double].
658 /// A 128-bit vector of [2 x double].
659 /// \returns A 128-bit vector containing the comparison results.
660 static __inline__ __m128d __DEFAULT_FN_ATTRS
661 _mm_cmpnge_pd(__m128d __a, __m128d __b)
663 return (__m128d)__builtin_ia32_cmpnlepd((__v2df)__b, (__v2df)__a);
666 /// Compares the lower double-precision floating-point values in each of
667 /// the two 128-bit floating-point vectors of [2 x double] for equality.
669 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
671 /// \headerfile <x86intrin.h>
673 /// This intrinsic corresponds to the <c> VCMPEQSD / CMPEQSD </c> instruction.
676 /// A 128-bit vector of [2 x double]. The lower double-precision value is
677 /// compared to the lower double-precision value of \a __b.
679 /// A 128-bit vector of [2 x double]. The lower double-precision value is
680 /// compared to the lower double-precision value of \a __a.
681 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
682 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
683 static __inline__ __m128d __DEFAULT_FN_ATTRS
684 _mm_cmpeq_sd(__m128d __a, __m128d __b)
686 return (__m128d)__builtin_ia32_cmpeqsd((__v2df)__a, (__v2df)__b);
689 /// Compares the lower double-precision floating-point values in each of
690 /// the two 128-bit floating-point vectors of [2 x double] to determine if
691 /// the value in the first parameter is less than the corresponding value in
692 /// the second parameter.
694 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
696 /// \headerfile <x86intrin.h>
698 /// This intrinsic corresponds to the <c> VCMPLTSD / CMPLTSD </c> instruction.
701 /// A 128-bit vector of [2 x double]. The lower double-precision value is
702 /// compared to the lower double-precision value of \a __b.
704 /// A 128-bit vector of [2 x double]. The lower double-precision value is
705 /// compared to the lower double-precision value of \a __a.
706 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
707 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
708 static __inline__ __m128d __DEFAULT_FN_ATTRS
709 _mm_cmplt_sd(__m128d __a, __m128d __b)
711 return (__m128d)__builtin_ia32_cmpltsd((__v2df)__a, (__v2df)__b);
714 /// Compares the lower double-precision floating-point values in each of
715 /// the two 128-bit floating-point vectors of [2 x double] to determine if
716 /// the value in the first parameter is less than or equal to the
717 /// corresponding value in the second parameter.
719 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
721 /// \headerfile <x86intrin.h>
723 /// This intrinsic corresponds to the <c> VCMPLESD / CMPLESD </c> instruction.
726 /// A 128-bit vector of [2 x double]. The lower double-precision value is
727 /// compared to the lower double-precision value of \a __b.
729 /// A 128-bit vector of [2 x double]. The lower double-precision value is
730 /// compared to the lower double-precision value of \a __a.
731 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
732 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
733 static __inline__ __m128d __DEFAULT_FN_ATTRS
734 _mm_cmple_sd(__m128d __a, __m128d __b)
736 return (__m128d)__builtin_ia32_cmplesd((__v2df)__a, (__v2df)__b);
739 /// Compares the lower double-precision floating-point values in each of
740 /// the two 128-bit floating-point vectors of [2 x double] to determine if
741 /// the value in the first parameter is greater than the corresponding value
742 /// in the second parameter.
744 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
746 /// \headerfile <x86intrin.h>
748 /// This intrinsic corresponds to the <c> VCMPLTSD / CMPLTSD </c> instruction.
751 /// A 128-bit vector of [2 x double]. The lower double-precision value is
752 /// compared to the lower double-precision value of \a __b.
754 /// A 128-bit vector of [2 x double]. The lower double-precision value is
755 /// compared to the lower double-precision value of \a __a.
756 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
757 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
758 static __inline__ __m128d __DEFAULT_FN_ATTRS
759 _mm_cmpgt_sd(__m128d __a, __m128d __b)
761 __m128d __c = __builtin_ia32_cmpltsd((__v2df)__b, (__v2df)__a);
762 return __extension__ (__m128d) { __c[0], __a[1] };
765 /// Compares the lower double-precision floating-point values in each of
766 /// the two 128-bit floating-point vectors of [2 x double] to determine if
767 /// the value in the first parameter is greater than or equal to the
768 /// corresponding value in the second parameter.
770 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
772 /// \headerfile <x86intrin.h>
774 /// This intrinsic corresponds to the <c> VCMPLESD / CMPLESD </c> instruction.
777 /// A 128-bit vector of [2 x double]. The lower double-precision value is
778 /// compared to the lower double-precision value of \a __b.
780 /// A 128-bit vector of [2 x double]. The lower double-precision value is
781 /// compared to the lower double-precision value of \a __a.
782 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
783 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
784 static __inline__ __m128d __DEFAULT_FN_ATTRS
785 _mm_cmpge_sd(__m128d __a, __m128d __b)
787 __m128d __c = __builtin_ia32_cmplesd((__v2df)__b, (__v2df)__a);
788 return __extension__ (__m128d) { __c[0], __a[1] };
791 /// Compares the lower double-precision floating-point values in each of
792 /// the two 128-bit floating-point vectors of [2 x double] to determine if
793 /// the value in the first parameter is "ordered" with respect to the
794 /// corresponding value in the second parameter.
796 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. A pair
797 /// of double-precision values are "ordered" with respect to each other if
798 /// neither value is a NaN.
800 /// \headerfile <x86intrin.h>
802 /// This intrinsic corresponds to the <c> VCMPORDSD / CMPORDSD </c> instruction.
805 /// A 128-bit vector of [2 x double]. The lower double-precision value is
806 /// compared to the lower double-precision value of \a __b.
808 /// A 128-bit vector of [2 x double]. The lower double-precision value is
809 /// compared to the lower double-precision value of \a __a.
810 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
811 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
812 static __inline__ __m128d __DEFAULT_FN_ATTRS
813 _mm_cmpord_sd(__m128d __a, __m128d __b)
815 return (__m128d)__builtin_ia32_cmpordsd((__v2df)__a, (__v2df)__b);
818 /// Compares the lower double-precision floating-point values in each of
819 /// the two 128-bit floating-point vectors of [2 x double] to determine if
820 /// the value in the first parameter is "unordered" with respect to the
821 /// corresponding value in the second parameter.
823 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. A pair
824 /// of double-precision values are "unordered" with respect to each other if
825 /// one or both values are NaN.
827 /// \headerfile <x86intrin.h>
829 /// This intrinsic corresponds to the <c> VCMPUNORDSD / CMPUNORDSD </c>
833 /// A 128-bit vector of [2 x double]. The lower double-precision value is
834 /// compared to the lower double-precision value of \a __b.
836 /// A 128-bit vector of [2 x double]. The lower double-precision value is
837 /// compared to the lower double-precision value of \a __a.
838 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
839 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
840 static __inline__ __m128d __DEFAULT_FN_ATTRS
841 _mm_cmpunord_sd(__m128d __a, __m128d __b)
843 return (__m128d)__builtin_ia32_cmpunordsd((__v2df)__a, (__v2df)__b);
846 /// Compares the lower double-precision floating-point values in each of
847 /// the two 128-bit floating-point vectors of [2 x double] to determine if
848 /// the value in the first parameter is unequal to the corresponding value in
849 /// the second parameter.
851 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
853 /// \headerfile <x86intrin.h>
855 /// This intrinsic corresponds to the <c> VCMPNEQSD / CMPNEQSD </c> instruction.
858 /// A 128-bit vector of [2 x double]. The lower double-precision value is
859 /// compared to the lower double-precision value of \a __b.
861 /// A 128-bit vector of [2 x double]. The lower double-precision value is
862 /// compared to the lower double-precision value of \a __a.
863 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
864 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
865 static __inline__ __m128d __DEFAULT_FN_ATTRS
866 _mm_cmpneq_sd(__m128d __a, __m128d __b)
868 return (__m128d)__builtin_ia32_cmpneqsd((__v2df)__a, (__v2df)__b);
871 /// Compares the lower double-precision floating-point values in each of
872 /// the two 128-bit floating-point vectors of [2 x double] to determine if
873 /// the value in the first parameter is not less than the corresponding
874 /// value in the second parameter.
876 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
878 /// \headerfile <x86intrin.h>
880 /// This intrinsic corresponds to the <c> VCMPNLTSD / CMPNLTSD </c> instruction.
883 /// A 128-bit vector of [2 x double]. The lower double-precision value is
884 /// compared to the lower double-precision value of \a __b.
886 /// A 128-bit vector of [2 x double]. The lower double-precision value is
887 /// compared to the lower double-precision value of \a __a.
888 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
889 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
890 static __inline__ __m128d __DEFAULT_FN_ATTRS
891 _mm_cmpnlt_sd(__m128d __a, __m128d __b)
893 return (__m128d)__builtin_ia32_cmpnltsd((__v2df)__a, (__v2df)__b);
896 /// Compares the lower double-precision floating-point values in each of
897 /// the two 128-bit floating-point vectors of [2 x double] to determine if
898 /// the value in the first parameter is not less than or equal to the
899 /// corresponding value in the second parameter.
901 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
903 /// \headerfile <x86intrin.h>
905 /// This intrinsic corresponds to the <c> VCMPNLESD / CMPNLESD </c> instruction.
908 /// A 128-bit vector of [2 x double]. The lower double-precision value is
909 /// compared to the lower double-precision value of \a __b.
911 /// A 128-bit vector of [2 x double]. The lower double-precision value is
912 /// compared to the lower double-precision value of \a __a.
913 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
914 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
915 static __inline__ __m128d __DEFAULT_FN_ATTRS
916 _mm_cmpnle_sd(__m128d __a, __m128d __b)
918 return (__m128d)__builtin_ia32_cmpnlesd((__v2df)__a, (__v2df)__b);
921 /// Compares the lower double-precision floating-point values in each of
922 /// the two 128-bit floating-point vectors of [2 x double] to determine if
923 /// the value in the first parameter is not greater than the corresponding
924 /// value in the second parameter.
926 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
928 /// \headerfile <x86intrin.h>
930 /// This intrinsic corresponds to the <c> VCMPNLTSD / CMPNLTSD </c> instruction.
933 /// A 128-bit vector of [2 x double]. The lower double-precision value is
934 /// compared to the lower double-precision value of \a __b.
936 /// A 128-bit vector of [2 x double]. The lower double-precision value is
937 /// compared to the lower double-precision value of \a __a.
938 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
939 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
940 static __inline__ __m128d __DEFAULT_FN_ATTRS
941 _mm_cmpngt_sd(__m128d __a, __m128d __b)
943 __m128d __c = __builtin_ia32_cmpnltsd((__v2df)__b, (__v2df)__a);
944 return __extension__ (__m128d) { __c[0], __a[1] };
947 /// Compares the lower double-precision floating-point values in each of
948 /// the two 128-bit floating-point vectors of [2 x double] to determine if
949 /// the value in the first parameter is not greater than or equal to the
950 /// corresponding value in the second parameter.
952 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
954 /// \headerfile <x86intrin.h>
956 /// This intrinsic corresponds to the <c> VCMPNLESD / CMPNLESD </c> instruction.
959 /// A 128-bit vector of [2 x double]. The lower double-precision value is
960 /// compared to the lower double-precision value of \a __b.
962 /// A 128-bit vector of [2 x double]. The lower double-precision value is
963 /// compared to the lower double-precision value of \a __a.
964 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
965 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
966 static __inline__ __m128d __DEFAULT_FN_ATTRS
967 _mm_cmpnge_sd(__m128d __a, __m128d __b)
969 __m128d __c = __builtin_ia32_cmpnlesd((__v2df)__b, (__v2df)__a);
970 return __extension__ (__m128d) { __c[0], __a[1] };
973 /// Compares the lower double-precision floating-point values in each of
974 /// the two 128-bit floating-point vectors of [2 x double] for equality.
976 /// The comparison yields 0 for false, 1 for true. If either of the two
977 /// lower double-precision values is NaN, 0 is returned.
979 /// \headerfile <x86intrin.h>
981 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
984 /// A 128-bit vector of [2 x double]. The lower double-precision value is
985 /// compared to the lower double-precision value of \a __b.
987 /// A 128-bit vector of [2 x double]. The lower double-precision value is
988 /// compared to the lower double-precision value of \a __a.
989 /// \returns An integer containing the comparison results. If either of the two
990 /// lower double-precision values is NaN, 0 is returned.
991 static __inline__ int __DEFAULT_FN_ATTRS
992 _mm_comieq_sd(__m128d __a, __m128d __b)
994 return __builtin_ia32_comisdeq((__v2df)__a, (__v2df)__b);
997 /// Compares the lower double-precision floating-point values in each of
998 /// the two 128-bit floating-point vectors of [2 x double] to determine if
999 /// the value in the first parameter is less than the corresponding value in
1000 /// the second parameter.
1002 /// The comparison yields 0 for false, 1 for true. If either of the two
1003 /// lower double-precision values is NaN, 0 is returned.
1005 /// \headerfile <x86intrin.h>
1007 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
1010 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1011 /// compared to the lower double-precision value of \a __b.
1013 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1014 /// compared to the lower double-precision value of \a __a.
1015 /// \returns An integer containing the comparison results. If either of the two
1016 /// lower double-precision values is NaN, 0 is returned.
1017 static __inline__ int __DEFAULT_FN_ATTRS
1018 _mm_comilt_sd(__m128d __a, __m128d __b)
1020 return __builtin_ia32_comisdlt((__v2df)__a, (__v2df)__b);
1023 /// Compares the lower double-precision floating-point values in each of
1024 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1025 /// the value in the first parameter is less than or equal to the
1026 /// corresponding value in the second parameter.
1028 /// The comparison yields 0 for false, 1 for true. If either of the two
1029 /// lower double-precision values is NaN, 0 is returned.
1031 /// \headerfile <x86intrin.h>
1033 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
1036 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1037 /// compared to the lower double-precision value of \a __b.
1039 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1040 /// compared to the lower double-precision value of \a __a.
1041 /// \returns An integer containing the comparison results. If either of the two
1042 /// lower double-precision values is NaN, 0 is returned.
1043 static __inline__ int __DEFAULT_FN_ATTRS
1044 _mm_comile_sd(__m128d __a, __m128d __b)
1046 return __builtin_ia32_comisdle((__v2df)__a, (__v2df)__b);
1049 /// Compares the lower double-precision floating-point values in each of
1050 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1051 /// the value in the first parameter is greater than the corresponding value
1052 /// in the second parameter.
1054 /// The comparison yields 0 for false, 1 for true. If either of the two
1055 /// lower double-precision values is NaN, 0 is returned.
1057 /// \headerfile <x86intrin.h>
1059 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
1062 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1063 /// compared to the lower double-precision value of \a __b.
1065 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1066 /// compared to the lower double-precision value of \a __a.
1067 /// \returns An integer containing the comparison results. If either of the two
1068 /// lower double-precision values is NaN, 0 is returned.
1069 static __inline__ int __DEFAULT_FN_ATTRS
1070 _mm_comigt_sd(__m128d __a, __m128d __b)
1072 return __builtin_ia32_comisdgt((__v2df)__a, (__v2df)__b);
1075 /// Compares the lower double-precision floating-point values in each of
1076 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1077 /// the value in the first parameter is greater than or equal to the
1078 /// corresponding value in the second parameter.
1080 /// The comparison yields 0 for false, 1 for true. If either of the two
1081 /// lower double-precision values is NaN, 0 is returned.
1083 /// \headerfile <x86intrin.h>
1085 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
1088 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1089 /// compared to the lower double-precision value of \a __b.
1091 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1092 /// compared to the lower double-precision value of \a __a.
1093 /// \returns An integer containing the comparison results. If either of the two
1094 /// lower double-precision values is NaN, 0 is returned.
1095 static __inline__ int __DEFAULT_FN_ATTRS
1096 _mm_comige_sd(__m128d __a, __m128d __b)
1098 return __builtin_ia32_comisdge((__v2df)__a, (__v2df)__b);
1101 /// Compares the lower double-precision floating-point values in each of
1102 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1103 /// the value in the first parameter is unequal to the corresponding value in
1104 /// the second parameter.
1106 /// The comparison yields 0 for false, 1 for true. If either of the two
1107 /// lower double-precision values is NaN, 1 is returned.
1109 /// \headerfile <x86intrin.h>
1111 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
1114 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1115 /// compared to the lower double-precision value of \a __b.
1117 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1118 /// compared to the lower double-precision value of \a __a.
1119 /// \returns An integer containing the comparison results. If either of the two
1120 /// lower double-precision values is NaN, 1 is returned.
1121 static __inline__ int __DEFAULT_FN_ATTRS
1122 _mm_comineq_sd(__m128d __a, __m128d __b)
1124 return __builtin_ia32_comisdneq((__v2df)__a, (__v2df)__b);
1127 /// Compares the lower double-precision floating-point values in each of
1128 /// the two 128-bit floating-point vectors of [2 x double] for equality. The
1129 /// comparison yields 0 for false, 1 for true.
1131 /// If either of the two lower double-precision values is NaN, 0 is returned.
1133 /// \headerfile <x86intrin.h>
1135 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1138 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1139 /// compared to the lower double-precision value of \a __b.
1141 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1142 /// compared to the lower double-precision value of \a __a.
1143 /// \returns An integer containing the comparison results. If either of the two
1144 /// lower double-precision values is NaN, 0 is returned.
1145 static __inline__ int __DEFAULT_FN_ATTRS
1146 _mm_ucomieq_sd(__m128d __a, __m128d __b)
1148 return __builtin_ia32_ucomisdeq((__v2df)__a, (__v2df)__b);
1151 /// Compares the lower double-precision floating-point values in each of
1152 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1153 /// the value in the first parameter is less than the corresponding value in
1154 /// the second parameter.
1156 /// The comparison yields 0 for false, 1 for true. If either of the two lower
1157 /// double-precision values is NaN, 0 is returned.
1159 /// \headerfile <x86intrin.h>
1161 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1164 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1165 /// compared to the lower double-precision value of \a __b.
1167 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1168 /// compared to the lower double-precision value of \a __a.
1169 /// \returns An integer containing the comparison results. If either of the two
1170 /// lower double-precision values is NaN, 0 is returned.
1171 static __inline__ int __DEFAULT_FN_ATTRS
1172 _mm_ucomilt_sd(__m128d __a, __m128d __b)
1174 return __builtin_ia32_ucomisdlt((__v2df)__a, (__v2df)__b);
1177 /// Compares the lower double-precision floating-point values in each of
1178 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1179 /// the value in the first parameter is less than or equal to the
1180 /// corresponding value in the second parameter.
1182 /// The comparison yields 0 for false, 1 for true. If either of the two lower
1183 /// double-precision values is NaN, 0 is returned.
1185 /// \headerfile <x86intrin.h>
1187 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1190 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1191 /// compared to the lower double-precision value of \a __b.
1193 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1194 /// compared to the lower double-precision value of \a __a.
1195 /// \returns An integer containing the comparison results. If either of the two
1196 /// lower double-precision values is NaN, 0 is returned.
1197 static __inline__ int __DEFAULT_FN_ATTRS
1198 _mm_ucomile_sd(__m128d __a, __m128d __b)
1200 return __builtin_ia32_ucomisdle((__v2df)__a, (__v2df)__b);
1203 /// Compares the lower double-precision floating-point values in each of
1204 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1205 /// the value in the first parameter is greater than the corresponding value
1206 /// in the second parameter.
1208 /// The comparison yields 0 for false, 1 for true. If either of the two lower
1209 /// double-precision values is NaN, 0 is returned.
1211 /// \headerfile <x86intrin.h>
1213 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1216 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1217 /// compared to the lower double-precision value of \a __b.
1219 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1220 /// compared to the lower double-precision value of \a __a.
1221 /// \returns An integer containing the comparison results. If either of the two
1222 /// lower double-precision values is NaN, 0 is returned.
1223 static __inline__ int __DEFAULT_FN_ATTRS
1224 _mm_ucomigt_sd(__m128d __a, __m128d __b)
1226 return __builtin_ia32_ucomisdgt((__v2df)__a, (__v2df)__b);
1229 /// Compares the lower double-precision floating-point values in each of
1230 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1231 /// the value in the first parameter is greater than or equal to the
1232 /// corresponding value in the second parameter.
1234 /// The comparison yields 0 for false, 1 for true. If either of the two
1235 /// lower double-precision values is NaN, 0 is returned.
1237 /// \headerfile <x86intrin.h>
1239 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1242 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1243 /// compared to the lower double-precision value of \a __b.
1245 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1246 /// compared to the lower double-precision value of \a __a.
1247 /// \returns An integer containing the comparison results. If either of the two
1248 /// lower double-precision values is NaN, 0 is returned.
1249 static __inline__ int __DEFAULT_FN_ATTRS
1250 _mm_ucomige_sd(__m128d __a, __m128d __b)
1252 return __builtin_ia32_ucomisdge((__v2df)__a, (__v2df)__b);
1255 /// Compares the lower double-precision floating-point values in each of
1256 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1257 /// the value in the first parameter is unequal to the corresponding value in
1258 /// the second parameter.
1260 /// The comparison yields 0 for false, 1 for true. If either of the two lower
1261 /// double-precision values is NaN, 1 is returned.
1263 /// \headerfile <x86intrin.h>
1265 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1268 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1269 /// compared to the lower double-precision value of \a __b.
1271 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1272 /// compared to the lower double-precision value of \a __a.
1273 /// \returns An integer containing the comparison result. If either of the two
1274 /// lower double-precision values is NaN, 1 is returned.
1275 static __inline__ int __DEFAULT_FN_ATTRS
1276 _mm_ucomineq_sd(__m128d __a, __m128d __b)
1278 return __builtin_ia32_ucomisdneq((__v2df)__a, (__v2df)__b);
1281 /// Converts the two double-precision floating-point elements of a
1282 /// 128-bit vector of [2 x double] into two single-precision floating-point
1283 /// values, returned in the lower 64 bits of a 128-bit vector of [4 x float].
1284 /// The upper 64 bits of the result vector are set to zero.
1286 /// \headerfile <x86intrin.h>
1288 /// This intrinsic corresponds to the <c> VCVTPD2PS / CVTPD2PS </c> instruction.
1291 /// A 128-bit vector of [2 x double].
1292 /// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the
1293 /// converted values. The upper 64 bits are set to zero.
1294 static __inline__ __m128 __DEFAULT_FN_ATTRS
1295 _mm_cvtpd_ps(__m128d __a)
1297 return __builtin_ia32_cvtpd2ps((__v2df)__a);
1300 /// Converts the lower two single-precision floating-point elements of a
1301 /// 128-bit vector of [4 x float] into two double-precision floating-point
1302 /// values, returned in a 128-bit vector of [2 x double]. The upper two
1303 /// elements of the input vector are unused.
1305 /// \headerfile <x86intrin.h>
1307 /// This intrinsic corresponds to the <c> VCVTPS2PD / CVTPS2PD </c> instruction.
1310 /// A 128-bit vector of [4 x float]. The lower two single-precision
1311 /// floating-point elements are converted to double-precision values. The
1312 /// upper two elements are unused.
1313 /// \returns A 128-bit vector of [2 x double] containing the converted values.
1314 static __inline__ __m128d __DEFAULT_FN_ATTRS
1315 _mm_cvtps_pd(__m128 __a)
1317 return (__m128d) __builtin_convertvector(
1318 __builtin_shufflevector((__v4sf)__a, (__v4sf)__a, 0, 1), __v2df);
1321 /// Converts the lower two integer elements of a 128-bit vector of
1322 /// [4 x i32] into two double-precision floating-point values, returned in a
1323 /// 128-bit vector of [2 x double].
1325 /// The upper two elements of the input vector are unused.
1327 /// \headerfile <x86intrin.h>
1329 /// This intrinsic corresponds to the <c> VCVTDQ2PD / CVTDQ2PD </c> instruction.
1332 /// A 128-bit integer vector of [4 x i32]. The lower two integer elements are
1333 /// converted to double-precision values.
1335 /// The upper two elements are unused.
1336 /// \returns A 128-bit vector of [2 x double] containing the converted values.
1337 static __inline__ __m128d __DEFAULT_FN_ATTRS
1338 _mm_cvtepi32_pd(__m128i __a)
1340 return (__m128d) __builtin_convertvector(
1341 __builtin_shufflevector((__v4si)__a, (__v4si)__a, 0, 1), __v2df);
1344 /// Converts the two double-precision floating-point elements of a
1345 /// 128-bit vector of [2 x double] into two signed 32-bit integer values,
1346 /// returned in the lower 64 bits of a 128-bit vector of [4 x i32]. The upper
1347 /// 64 bits of the result vector are set to zero.
1349 /// \headerfile <x86intrin.h>
1351 /// This intrinsic corresponds to the <c> VCVTPD2DQ / CVTPD2DQ </c> instruction.
1354 /// A 128-bit vector of [2 x double].
1355 /// \returns A 128-bit vector of [4 x i32] whose lower 64 bits contain the
1356 /// converted values. The upper 64 bits are set to zero.
1357 static __inline__ __m128i __DEFAULT_FN_ATTRS
1358 _mm_cvtpd_epi32(__m128d __a)
1360 return __builtin_ia32_cvtpd2dq((__v2df)__a);
1363 /// Converts the low-order element of a 128-bit vector of [2 x double]
1364 /// into a 32-bit signed integer value.
1366 /// \headerfile <x86intrin.h>
1368 /// This intrinsic corresponds to the <c> VCVTSD2SI / CVTSD2SI </c> instruction.
1371 /// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
1373 /// \returns A 32-bit signed integer containing the converted value.
1374 static __inline__ int __DEFAULT_FN_ATTRS
1375 _mm_cvtsd_si32(__m128d __a)
1377 return __builtin_ia32_cvtsd2si((__v2df)__a);
1380 /// Converts the lower double-precision floating-point element of a
1381 /// 128-bit vector of [2 x double], in the second parameter, into a
1382 /// single-precision floating-point value, returned in the lower 32 bits of a
1383 /// 128-bit vector of [4 x float]. The upper 96 bits of the result vector are
1384 /// copied from the upper 96 bits of the first parameter.
1386 /// \headerfile <x86intrin.h>
1388 /// This intrinsic corresponds to the <c> VCVTSD2SS / CVTSD2SS </c> instruction.
1391 /// A 128-bit vector of [4 x float]. The upper 96 bits of this parameter are
1392 /// copied to the upper 96 bits of the result.
1394 /// A 128-bit vector of [2 x double]. The lower double-precision
1395 /// floating-point element is used in the conversion.
1396 /// \returns A 128-bit vector of [4 x float]. The lower 32 bits contain the
1397 /// converted value from the second parameter. The upper 96 bits are copied
1398 /// from the upper 96 bits of the first parameter.
1399 static __inline__ __m128 __DEFAULT_FN_ATTRS
1400 _mm_cvtsd_ss(__m128 __a, __m128d __b)
1402 return (__m128)__builtin_ia32_cvtsd2ss((__v4sf)__a, (__v2df)__b);
1405 /// Converts a 32-bit signed integer value, in the second parameter, into
1406 /// a double-precision floating-point value, returned in the lower 64 bits of
1407 /// a 128-bit vector of [2 x double]. The upper 64 bits of the result vector
1408 /// are copied from the upper 64 bits of the first parameter.
1410 /// \headerfile <x86intrin.h>
1412 /// This intrinsic corresponds to the <c> VCVTSI2SD / CVTSI2SD </c> instruction.
1415 /// A 128-bit vector of [2 x double]. The upper 64 bits of this parameter are
1416 /// copied to the upper 64 bits of the result.
1418 /// A 32-bit signed integer containing the value to be converted.
1419 /// \returns A 128-bit vector of [2 x double]. The lower 64 bits contain the
1420 /// converted value from the second parameter. The upper 64 bits are copied
1421 /// from the upper 64 bits of the first parameter.
1422 static __inline__ __m128d __DEFAULT_FN_ATTRS
1423 _mm_cvtsi32_sd(__m128d __a, int __b)
1429 /// Converts the lower single-precision floating-point element of a
1430 /// 128-bit vector of [4 x float], in the second parameter, into a
1431 /// double-precision floating-point value, returned in the lower 64 bits of
1432 /// a 128-bit vector of [2 x double]. The upper 64 bits of the result vector
1433 /// are copied from the upper 64 bits of the first parameter.
1435 /// \headerfile <x86intrin.h>
1437 /// This intrinsic corresponds to the <c> VCVTSS2SD / CVTSS2SD </c> instruction.
1440 /// A 128-bit vector of [2 x double]. The upper 64 bits of this parameter are
1441 /// copied to the upper 64 bits of the result.
1443 /// A 128-bit vector of [4 x float]. The lower single-precision
1444 /// floating-point element is used in the conversion.
1445 /// \returns A 128-bit vector of [2 x double]. The lower 64 bits contain the
1446 /// converted value from the second parameter. The upper 64 bits are copied
1447 /// from the upper 64 bits of the first parameter.
1448 static __inline__ __m128d __DEFAULT_FN_ATTRS
1449 _mm_cvtss_sd(__m128d __a, __m128 __b)
1455 /// Converts the two double-precision floating-point elements of a
1456 /// 128-bit vector of [2 x double] into two signed 32-bit integer values,
1457 /// returned in the lower 64 bits of a 128-bit vector of [4 x i32].
1459 /// If the result of either conversion is inexact, the result is truncated
1460 /// (rounded towards zero) regardless of the current MXCSR setting. The upper
1461 /// 64 bits of the result vector are set to zero.
1463 /// \headerfile <x86intrin.h>
1465 /// This intrinsic corresponds to the <c> VCVTTPD2DQ / CVTTPD2DQ </c>
1469 /// A 128-bit vector of [2 x double].
1470 /// \returns A 128-bit vector of [4 x i32] whose lower 64 bits contain the
1471 /// converted values. The upper 64 bits are set to zero.
1472 static __inline__ __m128i __DEFAULT_FN_ATTRS
1473 _mm_cvttpd_epi32(__m128d __a)
1475 return (__m128i)__builtin_ia32_cvttpd2dq((__v2df)__a);
1478 /// Converts the low-order element of a [2 x double] vector into a 32-bit
1479 /// signed integer value, truncating the result when it is inexact.
1481 /// \headerfile <x86intrin.h>
1483 /// This intrinsic corresponds to the <c> VCVTTSD2SI / CVTTSD2SI </c>
1487 /// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
1489 /// \returns A 32-bit signed integer containing the converted value.
1490 static __inline__ int __DEFAULT_FN_ATTRS
1491 _mm_cvttsd_si32(__m128d __a)
1493 return __builtin_ia32_cvttsd2si((__v2df)__a);
1496 /// Converts the two double-precision floating-point elements of a
1497 /// 128-bit vector of [2 x double] into two signed 32-bit integer values,
1498 /// returned in a 64-bit vector of [2 x i32].
1500 /// \headerfile <x86intrin.h>
1502 /// This intrinsic corresponds to the <c> CVTPD2PI </c> instruction.
1505 /// A 128-bit vector of [2 x double].
1506 /// \returns A 64-bit vector of [2 x i32] containing the converted values.
1507 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
1508 _mm_cvtpd_pi32(__m128d __a)
1510 return (__m64)__builtin_ia32_cvtpd2pi((__v2df)__a);
1513 /// Converts the two double-precision floating-point elements of a
1514 /// 128-bit vector of [2 x double] into two signed 32-bit integer values,
1515 /// returned in a 64-bit vector of [2 x i32].
1517 /// If the result of either conversion is inexact, the result is truncated
1518 /// (rounded towards zero) regardless of the current MXCSR setting.
1520 /// \headerfile <x86intrin.h>
1522 /// This intrinsic corresponds to the <c> CVTTPD2PI </c> instruction.
1525 /// A 128-bit vector of [2 x double].
1526 /// \returns A 64-bit vector of [2 x i32] containing the converted values.
1527 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
1528 _mm_cvttpd_pi32(__m128d __a)
1530 return (__m64)__builtin_ia32_cvttpd2pi((__v2df)__a);
1533 /// Converts the two signed 32-bit integer elements of a 64-bit vector of
1534 /// [2 x i32] into two double-precision floating-point values, returned in a
1535 /// 128-bit vector of [2 x double].
1537 /// \headerfile <x86intrin.h>
1539 /// This intrinsic corresponds to the <c> CVTPI2PD </c> instruction.
1542 /// A 64-bit vector of [2 x i32].
1543 /// \returns A 128-bit vector of [2 x double] containing the converted values.
1544 static __inline__ __m128d __DEFAULT_FN_ATTRS_MMX
1545 _mm_cvtpi32_pd(__m64 __a)
1547 return __builtin_ia32_cvtpi2pd((__v2si)__a);
1550 /// Returns the low-order element of a 128-bit vector of [2 x double] as
1551 /// a double-precision floating-point value.
1553 /// \headerfile <x86intrin.h>
1555 /// This intrinsic has no corresponding instruction.
1558 /// A 128-bit vector of [2 x double]. The lower 64 bits are returned.
1559 /// \returns A double-precision floating-point value copied from the lower 64
1561 static __inline__ double __DEFAULT_FN_ATTRS
1562 _mm_cvtsd_f64(__m128d __a)
1567 /// Loads a 128-bit floating-point vector of [2 x double] from an aligned
1568 /// memory location.
1570 /// \headerfile <x86intrin.h>
1572 /// This intrinsic corresponds to the <c> VMOVAPD / MOVAPD </c> instruction.
1575 /// A pointer to a 128-bit memory location. The address of the memory
1576 /// location has to be 16-byte aligned.
1577 /// \returns A 128-bit vector of [2 x double] containing the loaded values.
1578 static __inline__ __m128d __DEFAULT_FN_ATTRS
1579 _mm_load_pd(double const *__dp)
1581 return *(const __m128d*)__dp;
1584 /// Loads a double-precision floating-point value from a specified memory
1585 /// location and duplicates it to both vector elements of a 128-bit vector of
1588 /// \headerfile <x86intrin.h>
1590 /// This intrinsic corresponds to the <c> VMOVDDUP / MOVDDUP </c> instruction.
1593 /// A pointer to a memory location containing a double-precision value.
1594 /// \returns A 128-bit vector of [2 x double] containing the loaded and
1595 /// duplicated values.
1596 static __inline__ __m128d __DEFAULT_FN_ATTRS
1597 _mm_load1_pd(double const *__dp)
1599 struct __mm_load1_pd_struct {
1601 } __attribute__((__packed__, __may_alias__));
1602 double __u = ((const struct __mm_load1_pd_struct*)__dp)->__u;
1603 return __extension__ (__m128d){ __u, __u };
1606 #define _mm_load_pd1(dp) _mm_load1_pd(dp)
1608 /// Loads two double-precision values, in reverse order, from an aligned
1609 /// memory location into a 128-bit vector of [2 x double].
1611 /// \headerfile <x86intrin.h>
1613 /// This intrinsic corresponds to the <c> VMOVAPD / MOVAPD </c> instruction +
1614 /// needed shuffling instructions. In AVX mode, the shuffling may be combined
1615 /// with the \c VMOVAPD, resulting in only a \c VPERMILPD instruction.
1618 /// A 16-byte aligned pointer to an array of double-precision values to be
1619 /// loaded in reverse order.
1620 /// \returns A 128-bit vector of [2 x double] containing the reversed loaded
1622 static __inline__ __m128d __DEFAULT_FN_ATTRS
1623 _mm_loadr_pd(double const *__dp)
1625 __m128d __u = *(const __m128d*)__dp;
1626 return __builtin_shufflevector((__v2df)__u, (__v2df)__u, 1, 0);
1629 /// Loads a 128-bit floating-point vector of [2 x double] from an
1630 /// unaligned memory location.
1632 /// \headerfile <x86intrin.h>
1634 /// This intrinsic corresponds to the <c> VMOVUPD / MOVUPD </c> instruction.
1637 /// A pointer to a 128-bit memory location. The address of the memory
1638 /// location does not have to be aligned.
1639 /// \returns A 128-bit vector of [2 x double] containing the loaded values.
1640 static __inline__ __m128d __DEFAULT_FN_ATTRS
1641 _mm_loadu_pd(double const *__dp)
1645 } __attribute__((__packed__, __may_alias__));
1646 return ((const struct __loadu_pd*)__dp)->__v;
1649 /// Loads a 64-bit integer value to the low element of a 128-bit integer
1650 /// vector and clears the upper element.
1652 /// \headerfile <x86intrin.h>
1654 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
1657 /// A pointer to a 64-bit memory location. The address of the memory
1658 /// location does not have to be aligned.
1659 /// \returns A 128-bit vector of [2 x i64] containing the loaded value.
1660 static __inline__ __m128i __DEFAULT_FN_ATTRS
1661 _mm_loadu_si64(void const *__a)
1663 struct __loadu_si64 {
1665 } __attribute__((__packed__, __may_alias__));
1666 long long __u = ((const struct __loadu_si64*)__a)->__v;
1667 return __extension__ (__m128i)(__v2di){__u, 0LL};
1670 /// Loads a 32-bit integer value to the low element of a 128-bit integer
1671 /// vector and clears the upper element.
1673 /// \headerfile <x86intrin.h>
1675 /// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
1678 /// A pointer to a 32-bit memory location. The address of the memory
1679 /// location does not have to be aligned.
1680 /// \returns A 128-bit vector of [4 x i32] containing the loaded value.
1681 static __inline__ __m128i __DEFAULT_FN_ATTRS
1682 _mm_loadu_si32(void const *__a)
1684 struct __loadu_si32 {
1686 } __attribute__((__packed__, __may_alias__));
1687 int __u = ((const struct __loadu_si32*)__a)->__v;
1688 return __extension__ (__m128i)(__v4si){__u, 0, 0, 0};
1691 /// Loads a 16-bit integer value to the low element of a 128-bit integer
1692 /// vector and clears the upper element.
1694 /// \headerfile <x86intrin.h>
1696 /// This intrinsic does not correspond to a specific instruction.
1699 /// A pointer to a 16-bit memory location. The address of the memory
1700 /// location does not have to be aligned.
1701 /// \returns A 128-bit vector of [8 x i16] containing the loaded value.
1702 static __inline__ __m128i __DEFAULT_FN_ATTRS
1703 _mm_loadu_si16(void const *__a)
1705 struct __loadu_si16 {
1707 } __attribute__((__packed__, __may_alias__));
1708 short __u = ((const struct __loadu_si16*)__a)->__v;
1709 return __extension__ (__m128i)(__v8hi){__u, 0, 0, 0, 0, 0, 0, 0};
1712 /// Loads a 64-bit double-precision value to the low element of a
1713 /// 128-bit integer vector and clears the upper element.
1715 /// \headerfile <x86intrin.h>
1717 /// This intrinsic corresponds to the <c> VMOVSD / MOVSD </c> instruction.
1720 /// A pointer to a memory location containing a double-precision value.
1721 /// The address of the memory location does not have to be aligned.
1722 /// \returns A 128-bit vector of [2 x double] containing the loaded value.
1723 static __inline__ __m128d __DEFAULT_FN_ATTRS
1724 _mm_load_sd(double const *__dp)
1726 struct __mm_load_sd_struct {
1728 } __attribute__((__packed__, __may_alias__));
1729 double __u = ((const struct __mm_load_sd_struct*)__dp)->__u;
1730 return __extension__ (__m128d){ __u, 0 };
1733 /// Loads a double-precision value into the high-order bits of a 128-bit
1734 /// vector of [2 x double]. The low-order bits are copied from the low-order
1735 /// bits of the first operand.
1737 /// \headerfile <x86intrin.h>
1739 /// This intrinsic corresponds to the <c> VMOVHPD / MOVHPD </c> instruction.
1742 /// A 128-bit vector of [2 x double]. \n
1743 /// Bits [63:0] are written to bits [63:0] of the result.
1745 /// A pointer to a 64-bit memory location containing a double-precision
1746 /// floating-point value that is loaded. The loaded value is written to bits
1747 /// [127:64] of the result. The address of the memory location does not have
1749 /// \returns A 128-bit vector of [2 x double] containing the moved values.
1750 static __inline__ __m128d __DEFAULT_FN_ATTRS
1751 _mm_loadh_pd(__m128d __a, double const *__dp)
1753 struct __mm_loadh_pd_struct {
1755 } __attribute__((__packed__, __may_alias__));
1756 double __u = ((const struct __mm_loadh_pd_struct*)__dp)->__u;
1757 return __extension__ (__m128d){ __a[0], __u };
1760 /// Loads a double-precision value into the low-order bits of a 128-bit
1761 /// vector of [2 x double]. The high-order bits are copied from the
1762 /// high-order bits of the first operand.
1764 /// \headerfile <x86intrin.h>
1766 /// This intrinsic corresponds to the <c> VMOVLPD / MOVLPD </c> instruction.
1769 /// A 128-bit vector of [2 x double]. \n
1770 /// Bits [127:64] are written to bits [127:64] of the result.
1772 /// A pointer to a 64-bit memory location containing a double-precision
1773 /// floating-point value that is loaded. The loaded value is written to bits
1774 /// [63:0] of the result. The address of the memory location does not have to
1776 /// \returns A 128-bit vector of [2 x double] containing the moved values.
1777 static __inline__ __m128d __DEFAULT_FN_ATTRS
1778 _mm_loadl_pd(__m128d __a, double const *__dp)
1780 struct __mm_loadl_pd_struct {
1782 } __attribute__((__packed__, __may_alias__));
1783 double __u = ((const struct __mm_loadl_pd_struct*)__dp)->__u;
1784 return __extension__ (__m128d){ __u, __a[1] };
1787 /// Constructs a 128-bit floating-point vector of [2 x double] with
1788 /// unspecified content. This could be used as an argument to another
1789 /// intrinsic function where the argument is required but the value is not
1792 /// \headerfile <x86intrin.h>
1794 /// This intrinsic has no corresponding instruction.
1796 /// \returns A 128-bit floating-point vector of [2 x double] with unspecified
1798 static __inline__ __m128d __DEFAULT_FN_ATTRS
1799 _mm_undefined_pd(void)
1801 return (__m128d)__builtin_ia32_undef128();
1804 /// Constructs a 128-bit floating-point vector of [2 x double]. The lower
1805 /// 64 bits of the vector are initialized with the specified double-precision
1806 /// floating-point value. The upper 64 bits are set to zero.
1808 /// \headerfile <x86intrin.h>
1810 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
1813 /// A double-precision floating-point value used to initialize the lower 64
1814 /// bits of the result.
1815 /// \returns An initialized 128-bit floating-point vector of [2 x double]. The
1816 /// lower 64 bits contain the value of the parameter. The upper 64 bits are
1818 static __inline__ __m128d __DEFAULT_FN_ATTRS
1819 _mm_set_sd(double __w)
1821 return __extension__ (__m128d){ __w, 0 };
1824 /// Constructs a 128-bit floating-point vector of [2 x double], with each
1825 /// of the two double-precision floating-point vector elements set to the
1826 /// specified double-precision floating-point value.
1828 /// \headerfile <x86intrin.h>
1830 /// This intrinsic corresponds to the <c> VMOVDDUP / MOVLHPS </c> instruction.
1833 /// A double-precision floating-point value used to initialize each vector
1834 /// element of the result.
1835 /// \returns An initialized 128-bit floating-point vector of [2 x double].
1836 static __inline__ __m128d __DEFAULT_FN_ATTRS
1837 _mm_set1_pd(double __w)
1839 return __extension__ (__m128d){ __w, __w };
1842 /// Constructs a 128-bit floating-point vector of [2 x double], with each
1843 /// of the two double-precision floating-point vector elements set to the
1844 /// specified double-precision floating-point value.
1846 /// \headerfile <x86intrin.h>
1848 /// This intrinsic corresponds to the <c> VMOVDDUP / MOVLHPS </c> instruction.
1851 /// A double-precision floating-point value used to initialize each vector
1852 /// element of the result.
1853 /// \returns An initialized 128-bit floating-point vector of [2 x double].
1854 static __inline__ __m128d __DEFAULT_FN_ATTRS
1855 _mm_set_pd1(double __w)
1857 return _mm_set1_pd(__w);
1860 /// Constructs a 128-bit floating-point vector of [2 x double]
1861 /// initialized with the specified double-precision floating-point values.
1863 /// \headerfile <x86intrin.h>
1865 /// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.
1868 /// A double-precision floating-point value used to initialize the upper 64
1869 /// bits of the result.
1871 /// A double-precision floating-point value used to initialize the lower 64
1872 /// bits of the result.
1873 /// \returns An initialized 128-bit floating-point vector of [2 x double].
1874 static __inline__ __m128d __DEFAULT_FN_ATTRS
1875 _mm_set_pd(double __w, double __x)
1877 return __extension__ (__m128d){ __x, __w };
1880 /// Constructs a 128-bit floating-point vector of [2 x double],
1881 /// initialized in reverse order with the specified double-precision
1882 /// floating-point values.
1884 /// \headerfile <x86intrin.h>
1886 /// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.
1889 /// A double-precision floating-point value used to initialize the lower 64
1890 /// bits of the result.
1892 /// A double-precision floating-point value used to initialize the upper 64
1893 /// bits of the result.
1894 /// \returns An initialized 128-bit floating-point vector of [2 x double].
1895 static __inline__ __m128d __DEFAULT_FN_ATTRS
1896 _mm_setr_pd(double __w, double __x)
1898 return __extension__ (__m128d){ __w, __x };
1901 /// Constructs a 128-bit floating-point vector of [2 x double]
1902 /// initialized to zero.
1904 /// \headerfile <x86intrin.h>
1906 /// This intrinsic corresponds to the <c> VXORPS / XORPS </c> instruction.
1908 /// \returns An initialized 128-bit floating-point vector of [2 x double] with
1909 /// all elements set to zero.
1910 static __inline__ __m128d __DEFAULT_FN_ATTRS
1911 _mm_setzero_pd(void)
1913 return __extension__ (__m128d){ 0, 0 };
1916 /// Constructs a 128-bit floating-point vector of [2 x double]. The lower
1917 /// 64 bits are set to the lower 64 bits of the second parameter. The upper
1918 /// 64 bits are set to the upper 64 bits of the first parameter.
1920 /// \headerfile <x86intrin.h>
1922 /// This intrinsic corresponds to the <c> VBLENDPD / BLENDPD </c> instruction.
1925 /// A 128-bit vector of [2 x double]. The upper 64 bits are written to the
1926 /// upper 64 bits of the result.
1928 /// A 128-bit vector of [2 x double]. The lower 64 bits are written to the
1929 /// lower 64 bits of the result.
1930 /// \returns A 128-bit vector of [2 x double] containing the moved values.
1931 static __inline__ __m128d __DEFAULT_FN_ATTRS
1932 _mm_move_sd(__m128d __a, __m128d __b)
1938 /// Stores the lower 64 bits of a 128-bit vector of [2 x double] to a
1939 /// memory location.
1941 /// \headerfile <x86intrin.h>
1943 /// This intrinsic corresponds to the <c> VMOVSD / MOVSD </c> instruction.
1946 /// A pointer to a 64-bit memory location.
1948 /// A 128-bit vector of [2 x double] containing the value to be stored.
1949 static __inline__ void __DEFAULT_FN_ATTRS
1950 _mm_store_sd(double *__dp, __m128d __a)
1952 struct __mm_store_sd_struct {
1954 } __attribute__((__packed__, __may_alias__));
1955 ((struct __mm_store_sd_struct*)__dp)->__u = __a[0];
1958 /// Moves packed double-precision values from a 128-bit vector of
1959 /// [2 x double] to a memory location.
1961 /// \headerfile <x86intrin.h>
1963 /// This intrinsic corresponds to the <c>VMOVAPD / MOVAPS</c> instruction.
1966 /// A pointer to an aligned memory location that can store two
1967 /// double-precision values.
1969 /// A packed 128-bit vector of [2 x double] containing the values to be
1971 static __inline__ void __DEFAULT_FN_ATTRS
1972 _mm_store_pd(double *__dp, __m128d __a)
1974 *(__m128d*)__dp = __a;
1977 /// Moves the lower 64 bits of a 128-bit vector of [2 x double] twice to
1978 /// the upper and lower 64 bits of a memory location.
1980 /// \headerfile <x86intrin.h>
1982 /// This intrinsic corresponds to the
1983 /// <c> VMOVDDUP + VMOVAPD / MOVLHPS + MOVAPS </c> instruction.
1986 /// A pointer to a memory location that can store two double-precision
1989 /// A 128-bit vector of [2 x double] whose lower 64 bits are copied to each
1990 /// of the values in \a __dp.
1991 static __inline__ void __DEFAULT_FN_ATTRS
1992 _mm_store1_pd(double *__dp, __m128d __a)
1994 __a = __builtin_shufflevector((__v2df)__a, (__v2df)__a, 0, 0);
1995 _mm_store_pd(__dp, __a);
1998 /// Moves the lower 64 bits of a 128-bit vector of [2 x double] twice to
1999 /// the upper and lower 64 bits of a memory location.
2001 /// \headerfile <x86intrin.h>
2003 /// This intrinsic corresponds to the
2004 /// <c> VMOVDDUP + VMOVAPD / MOVLHPS + MOVAPS </c> instruction.
2007 /// A pointer to a memory location that can store two double-precision
2010 /// A 128-bit vector of [2 x double] whose lower 64 bits are copied to each
2011 /// of the values in \a __dp.
2012 static __inline__ void __DEFAULT_FN_ATTRS
2013 _mm_store_pd1(double *__dp, __m128d __a)
2015 _mm_store1_pd(__dp, __a);
2018 /// Stores a 128-bit vector of [2 x double] into an unaligned memory
2021 /// \headerfile <x86intrin.h>
2023 /// This intrinsic corresponds to the <c> VMOVUPD / MOVUPD </c> instruction.
2026 /// A pointer to a 128-bit memory location. The address of the memory
2027 /// location does not have to be aligned.
2029 /// A 128-bit vector of [2 x double] containing the values to be stored.
2030 static __inline__ void __DEFAULT_FN_ATTRS
2031 _mm_storeu_pd(double *__dp, __m128d __a)
2033 struct __storeu_pd {
2035 } __attribute__((__packed__, __may_alias__));
2036 ((struct __storeu_pd*)__dp)->__v = __a;
2039 /// Stores two double-precision values, in reverse order, from a 128-bit
2040 /// vector of [2 x double] to a 16-byte aligned memory location.
2042 /// \headerfile <x86intrin.h>
2044 /// This intrinsic corresponds to a shuffling instruction followed by a
2045 /// <c> VMOVAPD / MOVAPD </c> instruction.
2048 /// A pointer to a 16-byte aligned memory location that can store two
2049 /// double-precision values.
2051 /// A 128-bit vector of [2 x double] containing the values to be reversed and
2053 static __inline__ void __DEFAULT_FN_ATTRS
2054 _mm_storer_pd(double *__dp, __m128d __a)
2056 __a = __builtin_shufflevector((__v2df)__a, (__v2df)__a, 1, 0);
2057 *(__m128d *)__dp = __a;
2060 /// Stores the upper 64 bits of a 128-bit vector of [2 x double] to a
2061 /// memory location.
2063 /// \headerfile <x86intrin.h>
2065 /// This intrinsic corresponds to the <c> VMOVHPD / MOVHPD </c> instruction.
2068 /// A pointer to a 64-bit memory location.
2070 /// A 128-bit vector of [2 x double] containing the value to be stored.
2071 static __inline__ void __DEFAULT_FN_ATTRS
2072 _mm_storeh_pd(double *__dp, __m128d __a)
2074 struct __mm_storeh_pd_struct {
2076 } __attribute__((__packed__, __may_alias__));
2077 ((struct __mm_storeh_pd_struct*)__dp)->__u = __a[1];
2080 /// Stores the lower 64 bits of a 128-bit vector of [2 x double] to a
2081 /// memory location.
2083 /// \headerfile <x86intrin.h>
2085 /// This intrinsic corresponds to the <c> VMOVLPD / MOVLPD </c> instruction.
2088 /// A pointer to a 64-bit memory location.
2090 /// A 128-bit vector of [2 x double] containing the value to be stored.
2091 static __inline__ void __DEFAULT_FN_ATTRS
2092 _mm_storel_pd(double *__dp, __m128d __a)
2094 struct __mm_storeh_pd_struct {
2096 } __attribute__((__packed__, __may_alias__));
2097 ((struct __mm_storeh_pd_struct*)__dp)->__u = __a[0];
2100 /// Adds the corresponding elements of two 128-bit vectors of [16 x i8],
2101 /// saving the lower 8 bits of each sum in the corresponding element of a
2102 /// 128-bit result vector of [16 x i8].
2104 /// The integer elements of both parameters can be either signed or unsigned.
2106 /// \headerfile <x86intrin.h>
2108 /// This intrinsic corresponds to the <c> VPADDB / PADDB </c> instruction.
2111 /// A 128-bit vector of [16 x i8].
2113 /// A 128-bit vector of [16 x i8].
2114 /// \returns A 128-bit vector of [16 x i8] containing the sums of both
2116 static __inline__ __m128i __DEFAULT_FN_ATTRS
2117 _mm_add_epi8(__m128i __a, __m128i __b)
2119 return (__m128i)((__v16qu)__a + (__v16qu)__b);
2122 /// Adds the corresponding elements of two 128-bit vectors of [8 x i16],
2123 /// saving the lower 16 bits of each sum in the corresponding element of a
2124 /// 128-bit result vector of [8 x i16].
2126 /// The integer elements of both parameters can be either signed or unsigned.
2128 /// \headerfile <x86intrin.h>
2130 /// This intrinsic corresponds to the <c> VPADDW / PADDW </c> instruction.
2133 /// A 128-bit vector of [8 x i16].
2135 /// A 128-bit vector of [8 x i16].
2136 /// \returns A 128-bit vector of [8 x i16] containing the sums of both
2138 static __inline__ __m128i __DEFAULT_FN_ATTRS
2139 _mm_add_epi16(__m128i __a, __m128i __b)
2141 return (__m128i)((__v8hu)__a + (__v8hu)__b);
2144 /// Adds the corresponding elements of two 128-bit vectors of [4 x i32],
2145 /// saving the lower 32 bits of each sum in the corresponding element of a
2146 /// 128-bit result vector of [4 x i32].
2148 /// The integer elements of both parameters can be either signed or unsigned.
2150 /// \headerfile <x86intrin.h>
2152 /// This intrinsic corresponds to the <c> VPADDD / PADDD </c> instruction.
2155 /// A 128-bit vector of [4 x i32].
2157 /// A 128-bit vector of [4 x i32].
2158 /// \returns A 128-bit vector of [4 x i32] containing the sums of both
2160 static __inline__ __m128i __DEFAULT_FN_ATTRS
2161 _mm_add_epi32(__m128i __a, __m128i __b)
2163 return (__m128i)((__v4su)__a + (__v4su)__b);
2166 /// Adds two signed or unsigned 64-bit integer values, returning the
2167 /// lower 64 bits of the sum.
2169 /// \headerfile <x86intrin.h>
2171 /// This intrinsic corresponds to the <c> PADDQ </c> instruction.
2174 /// A 64-bit integer.
2176 /// A 64-bit integer.
2177 /// \returns A 64-bit integer containing the sum of both parameters.
2178 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
2179 _mm_add_si64(__m64 __a, __m64 __b)
2181 return (__m64)__builtin_ia32_paddq((__v1di)__a, (__v1di)__b);
2184 /// Adds the corresponding elements of two 128-bit vectors of [2 x i64],
2185 /// saving the lower 64 bits of each sum in the corresponding element of a
2186 /// 128-bit result vector of [2 x i64].
2188 /// The integer elements of both parameters can be either signed or unsigned.
2190 /// \headerfile <x86intrin.h>
2192 /// This intrinsic corresponds to the <c> VPADDQ / PADDQ </c> instruction.
2195 /// A 128-bit vector of [2 x i64].
2197 /// A 128-bit vector of [2 x i64].
2198 /// \returns A 128-bit vector of [2 x i64] containing the sums of both
2200 static __inline__ __m128i __DEFAULT_FN_ATTRS
2201 _mm_add_epi64(__m128i __a, __m128i __b)
2203 return (__m128i)((__v2du)__a + (__v2du)__b);
2206 /// Adds, with saturation, the corresponding elements of two 128-bit
2207 /// signed [16 x i8] vectors, saving each sum in the corresponding element of
2208 /// a 128-bit result vector of [16 x i8]. Positive sums greater than 0x7F are
2209 /// saturated to 0x7F. Negative sums less than 0x80 are saturated to 0x80.
2211 /// \headerfile <x86intrin.h>
2213 /// This intrinsic corresponds to the <c> VPADDSB / PADDSB </c> instruction.
2216 /// A 128-bit signed [16 x i8] vector.
2218 /// A 128-bit signed [16 x i8] vector.
2219 /// \returns A 128-bit signed [16 x i8] vector containing the saturated sums of
2220 /// both parameters.
2221 static __inline__ __m128i __DEFAULT_FN_ATTRS
2222 _mm_adds_epi8(__m128i __a, __m128i __b)
2224 return (__m128i)__builtin_ia32_paddsb128((__v16qi)__a, (__v16qi)__b);
2227 /// Adds, with saturation, the corresponding elements of two 128-bit
2228 /// signed [8 x i16] vectors, saving each sum in the corresponding element of
2229 /// a 128-bit result vector of [8 x i16]. Positive sums greater than 0x7FFF
2230 /// are saturated to 0x7FFF. Negative sums less than 0x8000 are saturated to
2233 /// \headerfile <x86intrin.h>
2235 /// This intrinsic corresponds to the <c> VPADDSW / PADDSW </c> instruction.
2238 /// A 128-bit signed [8 x i16] vector.
2240 /// A 128-bit signed [8 x i16] vector.
2241 /// \returns A 128-bit signed [8 x i16] vector containing the saturated sums of
2242 /// both parameters.
2243 static __inline__ __m128i __DEFAULT_FN_ATTRS
2244 _mm_adds_epi16(__m128i __a, __m128i __b)
2246 return (__m128i)__builtin_ia32_paddsw128((__v8hi)__a, (__v8hi)__b);
2249 /// Adds, with saturation, the corresponding elements of two 128-bit
2250 /// unsigned [16 x i8] vectors, saving each sum in the corresponding element
2251 /// of a 128-bit result vector of [16 x i8]. Positive sums greater than 0xFF
2252 /// are saturated to 0xFF. Negative sums are saturated to 0x00.
2254 /// \headerfile <x86intrin.h>
2256 /// This intrinsic corresponds to the <c> VPADDUSB / PADDUSB </c> instruction.
2259 /// A 128-bit unsigned [16 x i8] vector.
2261 /// A 128-bit unsigned [16 x i8] vector.
2262 /// \returns A 128-bit unsigned [16 x i8] vector containing the saturated sums
2263 /// of both parameters.
2264 static __inline__ __m128i __DEFAULT_FN_ATTRS
2265 _mm_adds_epu8(__m128i __a, __m128i __b)
2267 return (__m128i)__builtin_ia32_paddusb128((__v16qi)__a, (__v16qi)__b);
2270 /// Adds, with saturation, the corresponding elements of two 128-bit
2271 /// unsigned [8 x i16] vectors, saving each sum in the corresponding element
2272 /// of a 128-bit result vector of [8 x i16]. Positive sums greater than
2273 /// 0xFFFF are saturated to 0xFFFF. Negative sums are saturated to 0x0000.
2275 /// \headerfile <x86intrin.h>
2277 /// This intrinsic corresponds to the <c> VPADDUSB / PADDUSB </c> instruction.
2280 /// A 128-bit unsigned [8 x i16] vector.
2282 /// A 128-bit unsigned [8 x i16] vector.
2283 /// \returns A 128-bit unsigned [8 x i16] vector containing the saturated sums
2284 /// of both parameters.
2285 static __inline__ __m128i __DEFAULT_FN_ATTRS
2286 _mm_adds_epu16(__m128i __a, __m128i __b)
2288 return (__m128i)__builtin_ia32_paddusw128((__v8hi)__a, (__v8hi)__b);
2291 /// Computes the rounded averages of corresponding elements of two
2292 /// 128-bit unsigned [16 x i8] vectors, saving each result in the
2293 /// corresponding element of a 128-bit result vector of [16 x i8].
2295 /// \headerfile <x86intrin.h>
2297 /// This intrinsic corresponds to the <c> VPAVGB / PAVGB </c> instruction.
2300 /// A 128-bit unsigned [16 x i8] vector.
2302 /// A 128-bit unsigned [16 x i8] vector.
2303 /// \returns A 128-bit unsigned [16 x i8] vector containing the rounded
2304 /// averages of both parameters.
2305 static __inline__ __m128i __DEFAULT_FN_ATTRS
2306 _mm_avg_epu8(__m128i __a, __m128i __b)
2308 return (__m128i)__builtin_ia32_pavgb128((__v16qi)__a, (__v16qi)__b);
2311 /// Computes the rounded averages of corresponding elements of two
2312 /// 128-bit unsigned [8 x i16] vectors, saving each result in the
2313 /// corresponding element of a 128-bit result vector of [8 x i16].
2315 /// \headerfile <x86intrin.h>
2317 /// This intrinsic corresponds to the <c> VPAVGW / PAVGW </c> instruction.
2320 /// A 128-bit unsigned [8 x i16] vector.
2322 /// A 128-bit unsigned [8 x i16] vector.
2323 /// \returns A 128-bit unsigned [8 x i16] vector containing the rounded
2324 /// averages of both parameters.
2325 static __inline__ __m128i __DEFAULT_FN_ATTRS
2326 _mm_avg_epu16(__m128i __a, __m128i __b)
2328 return (__m128i)__builtin_ia32_pavgw128((__v8hi)__a, (__v8hi)__b);
2331 /// Multiplies the corresponding elements of two 128-bit signed [8 x i16]
2332 /// vectors, producing eight intermediate 32-bit signed integer products, and
2333 /// adds the consecutive pairs of 32-bit products to form a 128-bit signed
2334 /// [4 x i32] vector.
2336 /// For example, bits [15:0] of both parameters are multiplied producing a
2337 /// 32-bit product, bits [31:16] of both parameters are multiplied producing
2338 /// a 32-bit product, and the sum of those two products becomes bits [31:0]
2341 /// \headerfile <x86intrin.h>
2343 /// This intrinsic corresponds to the <c> VPMADDWD / PMADDWD </c> instruction.
2346 /// A 128-bit signed [8 x i16] vector.
2348 /// A 128-bit signed [8 x i16] vector.
2349 /// \returns A 128-bit signed [4 x i32] vector containing the sums of products
2350 /// of both parameters.
2351 static __inline__ __m128i __DEFAULT_FN_ATTRS
2352 _mm_madd_epi16(__m128i __a, __m128i __b)
2354 return (__m128i)__builtin_ia32_pmaddwd128((__v8hi)__a, (__v8hi)__b);
2357 /// Compares corresponding elements of two 128-bit signed [8 x i16]
2358 /// vectors, saving the greater value from each comparison in the
2359 /// corresponding element of a 128-bit result vector of [8 x i16].
2361 /// \headerfile <x86intrin.h>
2363 /// This intrinsic corresponds to the <c> VPMAXSW / PMAXSW </c> instruction.
2366 /// A 128-bit signed [8 x i16] vector.
2368 /// A 128-bit signed [8 x i16] vector.
2369 /// \returns A 128-bit signed [8 x i16] vector containing the greater value of
2370 /// each comparison.
2371 static __inline__ __m128i __DEFAULT_FN_ATTRS
2372 _mm_max_epi16(__m128i __a, __m128i __b)
2374 return (__m128i)__builtin_ia32_pmaxsw128((__v8hi)__a, (__v8hi)__b);
2377 /// Compares corresponding elements of two 128-bit unsigned [16 x i8]
2378 /// vectors, saving the greater value from each comparison in the
2379 /// corresponding element of a 128-bit result vector of [16 x i8].
2381 /// \headerfile <x86intrin.h>
2383 /// This intrinsic corresponds to the <c> VPMAXUB / PMAXUB </c> instruction.
2386 /// A 128-bit unsigned [16 x i8] vector.
2388 /// A 128-bit unsigned [16 x i8] vector.
2389 /// \returns A 128-bit unsigned [16 x i8] vector containing the greater value of
2390 /// each comparison.
2391 static __inline__ __m128i __DEFAULT_FN_ATTRS
2392 _mm_max_epu8(__m128i __a, __m128i __b)
2394 return (__m128i)__builtin_ia32_pmaxub128((__v16qi)__a, (__v16qi)__b);
2397 /// Compares corresponding elements of two 128-bit signed [8 x i16]
2398 /// vectors, saving the smaller value from each comparison in the
2399 /// corresponding element of a 128-bit result vector of [8 x i16].
2401 /// \headerfile <x86intrin.h>
2403 /// This intrinsic corresponds to the <c> VPMINSW / PMINSW </c> instruction.
2406 /// A 128-bit signed [8 x i16] vector.
2408 /// A 128-bit signed [8 x i16] vector.
2409 /// \returns A 128-bit signed [8 x i16] vector containing the smaller value of
2410 /// each comparison.
2411 static __inline__ __m128i __DEFAULT_FN_ATTRS
2412 _mm_min_epi16(__m128i __a, __m128i __b)
2414 return (__m128i)__builtin_ia32_pminsw128((__v8hi)__a, (__v8hi)__b);
2417 /// Compares corresponding elements of two 128-bit unsigned [16 x i8]
2418 /// vectors, saving the smaller value from each comparison in the
2419 /// corresponding element of a 128-bit result vector of [16 x i8].
2421 /// \headerfile <x86intrin.h>
2423 /// This intrinsic corresponds to the <c> VPMINUB / PMINUB </c> instruction.
2426 /// A 128-bit unsigned [16 x i8] vector.
2428 /// A 128-bit unsigned [16 x i8] vector.
2429 /// \returns A 128-bit unsigned [16 x i8] vector containing the smaller value of
2430 /// each comparison.
2431 static __inline__ __m128i __DEFAULT_FN_ATTRS
2432 _mm_min_epu8(__m128i __a, __m128i __b)
2434 return (__m128i)__builtin_ia32_pminub128((__v16qi)__a, (__v16qi)__b);
2437 /// Multiplies the corresponding elements of two signed [8 x i16]
2438 /// vectors, saving the upper 16 bits of each 32-bit product in the
2439 /// corresponding element of a 128-bit signed [8 x i16] result vector.
2441 /// \headerfile <x86intrin.h>
2443 /// This intrinsic corresponds to the <c> VPMULHW / PMULHW </c> instruction.
2446 /// A 128-bit signed [8 x i16] vector.
2448 /// A 128-bit signed [8 x i16] vector.
2449 /// \returns A 128-bit signed [8 x i16] vector containing the upper 16 bits of
2450 /// each of the eight 32-bit products.
2451 static __inline__ __m128i __DEFAULT_FN_ATTRS
2452 _mm_mulhi_epi16(__m128i __a, __m128i __b)
2454 return (__m128i)__builtin_ia32_pmulhw128((__v8hi)__a, (__v8hi)__b);
2457 /// Multiplies the corresponding elements of two unsigned [8 x i16]
2458 /// vectors, saving the upper 16 bits of each 32-bit product in the
2459 /// corresponding element of a 128-bit unsigned [8 x i16] result vector.
2461 /// \headerfile <x86intrin.h>
2463 /// This intrinsic corresponds to the <c> VPMULHUW / PMULHUW </c> instruction.
2466 /// A 128-bit unsigned [8 x i16] vector.
2468 /// A 128-bit unsigned [8 x i16] vector.
2469 /// \returns A 128-bit unsigned [8 x i16] vector containing the upper 16 bits
2470 /// of each of the eight 32-bit products.
2471 static __inline__ __m128i __DEFAULT_FN_ATTRS
2472 _mm_mulhi_epu16(__m128i __a, __m128i __b)
2474 return (__m128i)__builtin_ia32_pmulhuw128((__v8hi)__a, (__v8hi)__b);
2477 /// Multiplies the corresponding elements of two signed [8 x i16]
2478 /// vectors, saving the lower 16 bits of each 32-bit product in the
2479 /// corresponding element of a 128-bit signed [8 x i16] result vector.
2481 /// \headerfile <x86intrin.h>
2483 /// This intrinsic corresponds to the <c> VPMULLW / PMULLW </c> instruction.
2486 /// A 128-bit signed [8 x i16] vector.
2488 /// A 128-bit signed [8 x i16] vector.
2489 /// \returns A 128-bit signed [8 x i16] vector containing the lower 16 bits of
2490 /// each of the eight 32-bit products.
2491 static __inline__ __m128i __DEFAULT_FN_ATTRS
2492 _mm_mullo_epi16(__m128i __a, __m128i __b)
2494 return (__m128i)((__v8hu)__a * (__v8hu)__b);
2497 /// Multiplies 32-bit unsigned integer values contained in the lower bits
2498 /// of the two 64-bit integer vectors and returns the 64-bit unsigned
2501 /// \headerfile <x86intrin.h>
2503 /// This intrinsic corresponds to the <c> PMULUDQ </c> instruction.
2506 /// A 64-bit integer containing one of the source operands.
2508 /// A 64-bit integer containing one of the source operands.
2509 /// \returns A 64-bit integer vector containing the product of both operands.
2510 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
2511 _mm_mul_su32(__m64 __a, __m64 __b)
2513 return __builtin_ia32_pmuludq((__v2si)__a, (__v2si)__b);
2516 /// Multiplies 32-bit unsigned integer values contained in the lower
2517 /// bits of the corresponding elements of two [2 x i64] vectors, and returns
2518 /// the 64-bit products in the corresponding elements of a [2 x i64] vector.
2520 /// \headerfile <x86intrin.h>
2522 /// This intrinsic corresponds to the <c> VPMULUDQ / PMULUDQ </c> instruction.
2525 /// A [2 x i64] vector containing one of the source operands.
2527 /// A [2 x i64] vector containing one of the source operands.
2528 /// \returns A [2 x i64] vector containing the product of both operands.
2529 static __inline__ __m128i __DEFAULT_FN_ATTRS
2530 _mm_mul_epu32(__m128i __a, __m128i __b)
2532 return __builtin_ia32_pmuludq128((__v4si)__a, (__v4si)__b);
2535 /// Computes the absolute differences of corresponding 8-bit integer
2536 /// values in two 128-bit vectors. Sums the first 8 absolute differences, and
2537 /// separately sums the second 8 absolute differences. Packs these two
2538 /// unsigned 16-bit integer sums into the upper and lower elements of a
2539 /// [2 x i64] vector.
2541 /// \headerfile <x86intrin.h>
2543 /// This intrinsic corresponds to the <c> VPSADBW / PSADBW </c> instruction.
2546 /// A 128-bit integer vector containing one of the source operands.
2548 /// A 128-bit integer vector containing one of the source operands.
2549 /// \returns A [2 x i64] vector containing the sums of the sets of absolute
2550 /// differences between both operands.
2551 static __inline__ __m128i __DEFAULT_FN_ATTRS
2552 _mm_sad_epu8(__m128i __a, __m128i __b)
2554 return __builtin_ia32_psadbw128((__v16qi)__a, (__v16qi)__b);
2557 /// Subtracts the corresponding 8-bit integer values in the operands.
2559 /// \headerfile <x86intrin.h>
2561 /// This intrinsic corresponds to the <c> VPSUBB / PSUBB </c> instruction.
2564 /// A 128-bit integer vector containing the minuends.
2566 /// A 128-bit integer vector containing the subtrahends.
2567 /// \returns A 128-bit integer vector containing the differences of the values
2568 /// in the operands.
2569 static __inline__ __m128i __DEFAULT_FN_ATTRS
2570 _mm_sub_epi8(__m128i __a, __m128i __b)
2572 return (__m128i)((__v16qu)__a - (__v16qu)__b);
2575 /// Subtracts the corresponding 16-bit integer values in the operands.
2577 /// \headerfile <x86intrin.h>
2579 /// This intrinsic corresponds to the <c> VPSUBW / PSUBW </c> instruction.
2582 /// A 128-bit integer vector containing the minuends.
2584 /// A 128-bit integer vector containing the subtrahends.
2585 /// \returns A 128-bit integer vector containing the differences of the values
2586 /// in the operands.
2587 static __inline__ __m128i __DEFAULT_FN_ATTRS
2588 _mm_sub_epi16(__m128i __a, __m128i __b)
2590 return (__m128i)((__v8hu)__a - (__v8hu)__b);
2593 /// Subtracts the corresponding 32-bit integer values in the operands.
2595 /// \headerfile <x86intrin.h>
2597 /// This intrinsic corresponds to the <c> VPSUBD / PSUBD </c> instruction.
2600 /// A 128-bit integer vector containing the minuends.
2602 /// A 128-bit integer vector containing the subtrahends.
2603 /// \returns A 128-bit integer vector containing the differences of the values
2604 /// in the operands.
2605 static __inline__ __m128i __DEFAULT_FN_ATTRS
2606 _mm_sub_epi32(__m128i __a, __m128i __b)
2608 return (__m128i)((__v4su)__a - (__v4su)__b);
2611 /// Subtracts signed or unsigned 64-bit integer values and writes the
2612 /// difference to the corresponding bits in the destination.
2614 /// \headerfile <x86intrin.h>
2616 /// This intrinsic corresponds to the <c> PSUBQ </c> instruction.
2619 /// A 64-bit integer vector containing the minuend.
2621 /// A 64-bit integer vector containing the subtrahend.
2622 /// \returns A 64-bit integer vector containing the difference of the values in
2624 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
2625 _mm_sub_si64(__m64 __a, __m64 __b)
2627 return (__m64)__builtin_ia32_psubq((__v1di)__a, (__v1di)__b);
2630 /// Subtracts the corresponding elements of two [2 x i64] vectors.
2632 /// \headerfile <x86intrin.h>
2634 /// This intrinsic corresponds to the <c> VPSUBQ / PSUBQ </c> instruction.
2637 /// A 128-bit integer vector containing the minuends.
2639 /// A 128-bit integer vector containing the subtrahends.
2640 /// \returns A 128-bit integer vector containing the differences of the values
2641 /// in the operands.
2642 static __inline__ __m128i __DEFAULT_FN_ATTRS
2643 _mm_sub_epi64(__m128i __a, __m128i __b)
2645 return (__m128i)((__v2du)__a - (__v2du)__b);
2648 /// Subtracts corresponding 8-bit signed integer values in the input and
2649 /// returns the differences in the corresponding bytes in the destination.
2650 /// Differences greater than 0x7F are saturated to 0x7F, and differences less
2651 /// than 0x80 are saturated to 0x80.
2653 /// \headerfile <x86intrin.h>
2655 /// This intrinsic corresponds to the <c> VPSUBSB / PSUBSB </c> instruction.
2658 /// A 128-bit integer vector containing the minuends.
2660 /// A 128-bit integer vector containing the subtrahends.
2661 /// \returns A 128-bit integer vector containing the differences of the values
2662 /// in the operands.
2663 static __inline__ __m128i __DEFAULT_FN_ATTRS
2664 _mm_subs_epi8(__m128i __a, __m128i __b)
2666 return (__m128i)__builtin_ia32_psubsb128((__v16qi)__a, (__v16qi)__b);
2669 /// Subtracts corresponding 16-bit signed integer values in the input and
2670 /// returns the differences in the corresponding bytes in the destination.
2671 /// Differences greater than 0x7FFF are saturated to 0x7FFF, and values less
2672 /// than 0x8000 are saturated to 0x8000.
2674 /// \headerfile <x86intrin.h>
2676 /// This intrinsic corresponds to the <c> VPSUBSW / PSUBSW </c> instruction.
2679 /// A 128-bit integer vector containing the minuends.
2681 /// A 128-bit integer vector containing the subtrahends.
2682 /// \returns A 128-bit integer vector containing the differences of the values
2683 /// in the operands.
2684 static __inline__ __m128i __DEFAULT_FN_ATTRS
2685 _mm_subs_epi16(__m128i __a, __m128i __b)
2687 return (__m128i)__builtin_ia32_psubsw128((__v8hi)__a, (__v8hi)__b);
2690 /// Subtracts corresponding 8-bit unsigned integer values in the input
2691 /// and returns the differences in the corresponding bytes in the
2692 /// destination. Differences less than 0x00 are saturated to 0x00.
2694 /// \headerfile <x86intrin.h>
2696 /// This intrinsic corresponds to the <c> VPSUBUSB / PSUBUSB </c> instruction.
2699 /// A 128-bit integer vector containing the minuends.
2701 /// A 128-bit integer vector containing the subtrahends.
2702 /// \returns A 128-bit integer vector containing the unsigned integer
2703 /// differences of the values in the operands.
2704 static __inline__ __m128i __DEFAULT_FN_ATTRS
2705 _mm_subs_epu8(__m128i __a, __m128i __b)
2707 return (__m128i)__builtin_ia32_psubusb128((__v16qi)__a, (__v16qi)__b);
2710 /// Subtracts corresponding 16-bit unsigned integer values in the input
2711 /// and returns the differences in the corresponding bytes in the
2712 /// destination. Differences less than 0x0000 are saturated to 0x0000.
2714 /// \headerfile <x86intrin.h>
2716 /// This intrinsic corresponds to the <c> VPSUBUSW / PSUBUSW </c> instruction.
2719 /// A 128-bit integer vector containing the minuends.
2721 /// A 128-bit integer vector containing the subtrahends.
2722 /// \returns A 128-bit integer vector containing the unsigned integer
2723 /// differences of the values in the operands.
2724 static __inline__ __m128i __DEFAULT_FN_ATTRS
2725 _mm_subs_epu16(__m128i __a, __m128i __b)
2727 return (__m128i)__builtin_ia32_psubusw128((__v8hi)__a, (__v8hi)__b);
2730 /// Performs a bitwise AND of two 128-bit integer vectors.
2732 /// \headerfile <x86intrin.h>
2734 /// This intrinsic corresponds to the <c> VPAND / PAND </c> instruction.
2737 /// A 128-bit integer vector containing one of the source operands.
2739 /// A 128-bit integer vector containing one of the source operands.
2740 /// \returns A 128-bit integer vector containing the bitwise AND of the values
2741 /// in both operands.
2742 static __inline__ __m128i __DEFAULT_FN_ATTRS
2743 _mm_and_si128(__m128i __a, __m128i __b)
2745 return (__m128i)((__v2du)__a & (__v2du)__b);
2748 /// Performs a bitwise AND of two 128-bit integer vectors, using the
2749 /// one's complement of the values contained in the first source operand.
2751 /// \headerfile <x86intrin.h>
2753 /// This intrinsic corresponds to the <c> VPANDN / PANDN </c> instruction.
2756 /// A 128-bit vector containing the left source operand. The one's complement
2757 /// of this value is used in the bitwise AND.
2759 /// A 128-bit vector containing the right source operand.
2760 /// \returns A 128-bit integer vector containing the bitwise AND of the one's
2761 /// complement of the first operand and the values in the second operand.
2762 static __inline__ __m128i __DEFAULT_FN_ATTRS
2763 _mm_andnot_si128(__m128i __a, __m128i __b)
2765 return (__m128i)(~(__v2du)__a & (__v2du)__b);
2767 /// Performs a bitwise OR of two 128-bit integer vectors.
2769 /// \headerfile <x86intrin.h>
2771 /// This intrinsic corresponds to the <c> VPOR / POR </c> instruction.
2774 /// A 128-bit integer vector containing one of the source operands.
2776 /// A 128-bit integer vector containing one of the source operands.
2777 /// \returns A 128-bit integer vector containing the bitwise OR of the values
2778 /// in both operands.
2779 static __inline__ __m128i __DEFAULT_FN_ATTRS
2780 _mm_or_si128(__m128i __a, __m128i __b)
2782 return (__m128i)((__v2du)__a | (__v2du)__b);
2785 /// Performs a bitwise exclusive OR of two 128-bit integer vectors.
2787 /// \headerfile <x86intrin.h>
2789 /// This intrinsic corresponds to the <c> VPXOR / PXOR </c> instruction.
2792 /// A 128-bit integer vector containing one of the source operands.
2794 /// A 128-bit integer vector containing one of the source operands.
2795 /// \returns A 128-bit integer vector containing the bitwise exclusive OR of the
2796 /// values in both operands.
2797 static __inline__ __m128i __DEFAULT_FN_ATTRS
2798 _mm_xor_si128(__m128i __a, __m128i __b)
2800 return (__m128i)((__v2du)__a ^ (__v2du)__b);
2803 /// Left-shifts the 128-bit integer vector operand by the specified
2804 /// number of bytes. Low-order bits are cleared.
2806 /// \headerfile <x86intrin.h>
2809 /// __m128i _mm_slli_si128(__m128i a, const int imm);
2812 /// This intrinsic corresponds to the <c> VPSLLDQ / PSLLDQ </c> instruction.
2815 /// A 128-bit integer vector containing the source operand.
2817 /// An immediate value specifying the number of bytes to left-shift operand
2819 /// \returns A 128-bit integer vector containing the left-shifted value.
2820 #define _mm_slli_si128(a, imm) \
2821 (__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a), (int)(imm))
2823 #define _mm_bslli_si128(a, imm) \
2824 (__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a), (int)(imm))
2826 /// Left-shifts each 16-bit value in the 128-bit integer vector operand
2827 /// by the specified number of bits. Low-order bits are cleared.
2829 /// \headerfile <x86intrin.h>
2831 /// This intrinsic corresponds to the <c> VPSLLW / PSLLW </c> instruction.
2834 /// A 128-bit integer vector containing the source operand.
2836 /// An integer value specifying the number of bits to left-shift each value
2837 /// in operand \a __a.
2838 /// \returns A 128-bit integer vector containing the left-shifted values.
2839 static __inline__ __m128i __DEFAULT_FN_ATTRS
2840 _mm_slli_epi16(__m128i __a, int __count)
2842 return (__m128i)__builtin_ia32_psllwi128((__v8hi)__a, __count);
2845 /// Left-shifts each 16-bit value in the 128-bit integer vector operand
2846 /// by the specified number of bits. Low-order bits are cleared.
2848 /// \headerfile <x86intrin.h>
2850 /// This intrinsic corresponds to the <c> VPSLLW / PSLLW </c> instruction.
2853 /// A 128-bit integer vector containing the source operand.
2855 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
2856 /// to left-shift each value in operand \a __a.
2857 /// \returns A 128-bit integer vector containing the left-shifted values.
2858 static __inline__ __m128i __DEFAULT_FN_ATTRS
2859 _mm_sll_epi16(__m128i __a, __m128i __count)
2861 return (__m128i)__builtin_ia32_psllw128((__v8hi)__a, (__v8hi)__count);
2864 /// Left-shifts each 32-bit value in the 128-bit integer vector operand
2865 /// by the specified number of bits. Low-order bits are cleared.
2867 /// \headerfile <x86intrin.h>
2869 /// This intrinsic corresponds to the <c> VPSLLD / PSLLD </c> instruction.
2872 /// A 128-bit integer vector containing the source operand.
2874 /// An integer value specifying the number of bits to left-shift each value
2875 /// in operand \a __a.
2876 /// \returns A 128-bit integer vector containing the left-shifted values.
2877 static __inline__ __m128i __DEFAULT_FN_ATTRS
2878 _mm_slli_epi32(__m128i __a, int __count)
2880 return (__m128i)__builtin_ia32_pslldi128((__v4si)__a, __count);
2883 /// Left-shifts each 32-bit value in the 128-bit integer vector operand
2884 /// by the specified number of bits. Low-order bits are cleared.
2886 /// \headerfile <x86intrin.h>
2888 /// This intrinsic corresponds to the <c> VPSLLD / PSLLD </c> instruction.
2891 /// A 128-bit integer vector containing the source operand.
2893 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
2894 /// to left-shift each value in operand \a __a.
2895 /// \returns A 128-bit integer vector containing the left-shifted values.
2896 static __inline__ __m128i __DEFAULT_FN_ATTRS
2897 _mm_sll_epi32(__m128i __a, __m128i __count)
2899 return (__m128i)__builtin_ia32_pslld128((__v4si)__a, (__v4si)__count);
2902 /// Left-shifts each 64-bit value in the 128-bit integer vector operand
2903 /// by the specified number of bits. Low-order bits are cleared.
2905 /// \headerfile <x86intrin.h>
2907 /// This intrinsic corresponds to the <c> VPSLLQ / PSLLQ </c> instruction.
2910 /// A 128-bit integer vector containing the source operand.
2912 /// An integer value specifying the number of bits to left-shift each value
2913 /// in operand \a __a.
2914 /// \returns A 128-bit integer vector containing the left-shifted values.
2915 static __inline__ __m128i __DEFAULT_FN_ATTRS
2916 _mm_slli_epi64(__m128i __a, int __count)
2918 return __builtin_ia32_psllqi128((__v2di)__a, __count);
2921 /// Left-shifts each 64-bit value in the 128-bit integer vector operand
2922 /// by the specified number of bits. Low-order bits are cleared.
2924 /// \headerfile <x86intrin.h>
2926 /// This intrinsic corresponds to the <c> VPSLLQ / PSLLQ </c> instruction.
2929 /// A 128-bit integer vector containing the source operand.
2931 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
2932 /// to left-shift each value in operand \a __a.
2933 /// \returns A 128-bit integer vector containing the left-shifted values.
2934 static __inline__ __m128i __DEFAULT_FN_ATTRS
2935 _mm_sll_epi64(__m128i __a, __m128i __count)
2937 return __builtin_ia32_psllq128((__v2di)__a, (__v2di)__count);
2940 /// Right-shifts each 16-bit value in the 128-bit integer vector operand
2941 /// by the specified number of bits. High-order bits are filled with the sign
2942 /// bit of the initial value.
2944 /// \headerfile <x86intrin.h>
2946 /// This intrinsic corresponds to the <c> VPSRAW / PSRAW </c> instruction.
2949 /// A 128-bit integer vector containing the source operand.
2951 /// An integer value specifying the number of bits to right-shift each value
2952 /// in operand \a __a.
2953 /// \returns A 128-bit integer vector containing the right-shifted values.
2954 static __inline__ __m128i __DEFAULT_FN_ATTRS
2955 _mm_srai_epi16(__m128i __a, int __count)
2957 return (__m128i)__builtin_ia32_psrawi128((__v8hi)__a, __count);
2960 /// Right-shifts each 16-bit value in the 128-bit integer vector operand
2961 /// by the specified number of bits. High-order bits are filled with the sign
2962 /// bit of the initial value.
2964 /// \headerfile <x86intrin.h>
2966 /// This intrinsic corresponds to the <c> VPSRAW / PSRAW </c> instruction.
2969 /// A 128-bit integer vector containing the source operand.
2971 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
2972 /// to right-shift each value in operand \a __a.
2973 /// \returns A 128-bit integer vector containing the right-shifted values.
2974 static __inline__ __m128i __DEFAULT_FN_ATTRS
2975 _mm_sra_epi16(__m128i __a, __m128i __count)
2977 return (__m128i)__builtin_ia32_psraw128((__v8hi)__a, (__v8hi)__count);
2980 /// Right-shifts each 32-bit value in the 128-bit integer vector operand
2981 /// by the specified number of bits. High-order bits are filled with the sign
2982 /// bit of the initial value.
2984 /// \headerfile <x86intrin.h>
2986 /// This intrinsic corresponds to the <c> VPSRAD / PSRAD </c> instruction.
2989 /// A 128-bit integer vector containing the source operand.
2991 /// An integer value specifying the number of bits to right-shift each value
2992 /// in operand \a __a.
2993 /// \returns A 128-bit integer vector containing the right-shifted values.
2994 static __inline__ __m128i __DEFAULT_FN_ATTRS
2995 _mm_srai_epi32(__m128i __a, int __count)
2997 return (__m128i)__builtin_ia32_psradi128((__v4si)__a, __count);
3000 /// Right-shifts each 32-bit value in the 128-bit integer vector operand
3001 /// by the specified number of bits. High-order bits are filled with the sign
3002 /// bit of the initial value.
3004 /// \headerfile <x86intrin.h>
3006 /// This intrinsic corresponds to the <c> VPSRAD / PSRAD </c> instruction.
3009 /// A 128-bit integer vector containing the source operand.
3011 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
3012 /// to right-shift each value in operand \a __a.
3013 /// \returns A 128-bit integer vector containing the right-shifted values.
3014 static __inline__ __m128i __DEFAULT_FN_ATTRS
3015 _mm_sra_epi32(__m128i __a, __m128i __count)
3017 return (__m128i)__builtin_ia32_psrad128((__v4si)__a, (__v4si)__count);
3020 /// Right-shifts the 128-bit integer vector operand by the specified
3021 /// number of bytes. High-order bits are cleared.
3023 /// \headerfile <x86intrin.h>
3026 /// __m128i _mm_srli_si128(__m128i a, const int imm);
3029 /// This intrinsic corresponds to the <c> VPSRLDQ / PSRLDQ </c> instruction.
3032 /// A 128-bit integer vector containing the source operand.
3034 /// An immediate value specifying the number of bytes to right-shift operand
3036 /// \returns A 128-bit integer vector containing the right-shifted value.
3037 #define _mm_srli_si128(a, imm) \
3038 (__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a), (int)(imm))
3040 #define _mm_bsrli_si128(a, imm) \
3041 (__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a), (int)(imm))
3043 /// Right-shifts each of 16-bit values in the 128-bit integer vector
3044 /// operand by the specified number of bits. High-order bits are cleared.
3046 /// \headerfile <x86intrin.h>
3048 /// This intrinsic corresponds to the <c> VPSRLW / PSRLW </c> instruction.
3051 /// A 128-bit integer vector containing the source operand.
3053 /// An integer value specifying the number of bits to right-shift each value
3054 /// in operand \a __a.
3055 /// \returns A 128-bit integer vector containing the right-shifted values.
3056 static __inline__ __m128i __DEFAULT_FN_ATTRS
3057 _mm_srli_epi16(__m128i __a, int __count)
3059 return (__m128i)__builtin_ia32_psrlwi128((__v8hi)__a, __count);
3062 /// Right-shifts each of 16-bit values in the 128-bit integer vector
3063 /// operand by the specified number of bits. High-order bits are cleared.
3065 /// \headerfile <x86intrin.h>
3067 /// This intrinsic corresponds to the <c> VPSRLW / PSRLW </c> instruction.
3070 /// A 128-bit integer vector containing the source operand.
3072 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
3073 /// to right-shift each value in operand \a __a.
3074 /// \returns A 128-bit integer vector containing the right-shifted values.
3075 static __inline__ __m128i __DEFAULT_FN_ATTRS
3076 _mm_srl_epi16(__m128i __a, __m128i __count)
3078 return (__m128i)__builtin_ia32_psrlw128((__v8hi)__a, (__v8hi)__count);
3081 /// Right-shifts each of 32-bit values in the 128-bit integer vector
3082 /// operand by the specified number of bits. High-order bits are cleared.
3084 /// \headerfile <x86intrin.h>
3086 /// This intrinsic corresponds to the <c> VPSRLD / PSRLD </c> instruction.
3089 /// A 128-bit integer vector containing the source operand.
3091 /// An integer value specifying the number of bits to right-shift each value
3092 /// in operand \a __a.
3093 /// \returns A 128-bit integer vector containing the right-shifted values.
3094 static __inline__ __m128i __DEFAULT_FN_ATTRS
3095 _mm_srli_epi32(__m128i __a, int __count)
3097 return (__m128i)__builtin_ia32_psrldi128((__v4si)__a, __count);
3100 /// Right-shifts each of 32-bit values in the 128-bit integer vector
3101 /// operand by the specified number of bits. High-order bits are cleared.
3103 /// \headerfile <x86intrin.h>
3105 /// This intrinsic corresponds to the <c> VPSRLD / PSRLD </c> instruction.
3108 /// A 128-bit integer vector containing the source operand.
3110 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
3111 /// to right-shift each value in operand \a __a.
3112 /// \returns A 128-bit integer vector containing the right-shifted values.
3113 static __inline__ __m128i __DEFAULT_FN_ATTRS
3114 _mm_srl_epi32(__m128i __a, __m128i __count)
3116 return (__m128i)__builtin_ia32_psrld128((__v4si)__a, (__v4si)__count);
3119 /// Right-shifts each of 64-bit values in the 128-bit integer vector
3120 /// operand by the specified number of bits. High-order bits are cleared.
3122 /// \headerfile <x86intrin.h>
3124 /// This intrinsic corresponds to the <c> VPSRLQ / PSRLQ </c> instruction.
3127 /// A 128-bit integer vector containing the source operand.
3129 /// An integer value specifying the number of bits to right-shift each value
3130 /// in operand \a __a.
3131 /// \returns A 128-bit integer vector containing the right-shifted values.
3132 static __inline__ __m128i __DEFAULT_FN_ATTRS
3133 _mm_srli_epi64(__m128i __a, int __count)
3135 return __builtin_ia32_psrlqi128((__v2di)__a, __count);
3138 /// Right-shifts each of 64-bit values in the 128-bit integer vector
3139 /// operand by the specified number of bits. High-order bits are cleared.
3141 /// \headerfile <x86intrin.h>
3143 /// This intrinsic corresponds to the <c> VPSRLQ / PSRLQ </c> instruction.
3146 /// A 128-bit integer vector containing the source operand.
3148 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
3149 /// to right-shift each value in operand \a __a.
3150 /// \returns A 128-bit integer vector containing the right-shifted values.
3151 static __inline__ __m128i __DEFAULT_FN_ATTRS
3152 _mm_srl_epi64(__m128i __a, __m128i __count)
3154 return __builtin_ia32_psrlq128((__v2di)__a, (__v2di)__count);
3157 /// Compares each of the corresponding 8-bit values of the 128-bit
3158 /// integer vectors for equality. Each comparison yields 0x0 for false, 0xFF
3161 /// \headerfile <x86intrin.h>
3163 /// This intrinsic corresponds to the <c> VPCMPEQB / PCMPEQB </c> instruction.
3166 /// A 128-bit integer vector.
3168 /// A 128-bit integer vector.
3169 /// \returns A 128-bit integer vector containing the comparison results.
3170 static __inline__ __m128i __DEFAULT_FN_ATTRS
3171 _mm_cmpeq_epi8(__m128i __a, __m128i __b)
3173 return (__m128i)((__v16qi)__a == (__v16qi)__b);
3176 /// Compares each of the corresponding 16-bit values of the 128-bit
3177 /// integer vectors for equality. Each comparison yields 0x0 for false,
3178 /// 0xFFFF for true.
3180 /// \headerfile <x86intrin.h>
3182 /// This intrinsic corresponds to the <c> VPCMPEQW / PCMPEQW </c> instruction.
3185 /// A 128-bit integer vector.
3187 /// A 128-bit integer vector.
3188 /// \returns A 128-bit integer vector containing the comparison results.
3189 static __inline__ __m128i __DEFAULT_FN_ATTRS
3190 _mm_cmpeq_epi16(__m128i __a, __m128i __b)
3192 return (__m128i)((__v8hi)__a == (__v8hi)__b);
3195 /// Compares each of the corresponding 32-bit values of the 128-bit
3196 /// integer vectors for equality. Each comparison yields 0x0 for false,
3197 /// 0xFFFFFFFF for true.
3199 /// \headerfile <x86intrin.h>
3201 /// This intrinsic corresponds to the <c> VPCMPEQD / PCMPEQD </c> instruction.
3204 /// A 128-bit integer vector.
3206 /// A 128-bit integer vector.
3207 /// \returns A 128-bit integer vector containing the comparison results.
3208 static __inline__ __m128i __DEFAULT_FN_ATTRS
3209 _mm_cmpeq_epi32(__m128i __a, __m128i __b)
3211 return (__m128i)((__v4si)__a == (__v4si)__b);
3214 /// Compares each of the corresponding signed 8-bit values of the 128-bit
3215 /// integer vectors to determine if the values in the first operand are
3216 /// greater than those in the second operand. Each comparison yields 0x0 for
3217 /// false, 0xFF for true.
3219 /// \headerfile <x86intrin.h>
3221 /// This intrinsic corresponds to the <c> VPCMPGTB / PCMPGTB </c> instruction.
3224 /// A 128-bit integer vector.
3226 /// A 128-bit integer vector.
3227 /// \returns A 128-bit integer vector containing the comparison results.
3228 static __inline__ __m128i __DEFAULT_FN_ATTRS
3229 _mm_cmpgt_epi8(__m128i __a, __m128i __b)
3231 /* This function always performs a signed comparison, but __v16qi is a char
3232 which may be signed or unsigned, so use __v16qs. */
3233 return (__m128i)((__v16qs)__a > (__v16qs)__b);
3236 /// Compares each of the corresponding signed 16-bit values of the
3237 /// 128-bit integer vectors to determine if the values in the first operand
3238 /// are greater than those in the second operand.
3240 /// Each comparison yields 0x0 for false, 0xFFFF for true.
3242 /// \headerfile <x86intrin.h>
3244 /// This intrinsic corresponds to the <c> VPCMPGTW / PCMPGTW </c> instruction.
3247 /// A 128-bit integer vector.
3249 /// A 128-bit integer vector.
3250 /// \returns A 128-bit integer vector containing the comparison results.
3251 static __inline__ __m128i __DEFAULT_FN_ATTRS
3252 _mm_cmpgt_epi16(__m128i __a, __m128i __b)
3254 return (__m128i)((__v8hi)__a > (__v8hi)__b);
3257 /// Compares each of the corresponding signed 32-bit values of the
3258 /// 128-bit integer vectors to determine if the values in the first operand
3259 /// are greater than those in the second operand.
3261 /// Each comparison yields 0x0 for false, 0xFFFFFFFF for true.
3263 /// \headerfile <x86intrin.h>
3265 /// This intrinsic corresponds to the <c> VPCMPGTD / PCMPGTD </c> instruction.
3268 /// A 128-bit integer vector.
3270 /// A 128-bit integer vector.
3271 /// \returns A 128-bit integer vector containing the comparison results.
3272 static __inline__ __m128i __DEFAULT_FN_ATTRS
3273 _mm_cmpgt_epi32(__m128i __a, __m128i __b)
3275 return (__m128i)((__v4si)__a > (__v4si)__b);
3278 /// Compares each of the corresponding signed 8-bit values of the 128-bit
3279 /// integer vectors to determine if the values in the first operand are less
3280 /// than those in the second operand.
3282 /// Each comparison yields 0x0 for false, 0xFF for true.
3284 /// \headerfile <x86intrin.h>
3286 /// This intrinsic corresponds to the <c> VPCMPGTB / PCMPGTB </c> instruction.
3289 /// A 128-bit integer vector.
3291 /// A 128-bit integer vector.
3292 /// \returns A 128-bit integer vector containing the comparison results.
3293 static __inline__ __m128i __DEFAULT_FN_ATTRS
3294 _mm_cmplt_epi8(__m128i __a, __m128i __b)
3296 return _mm_cmpgt_epi8(__b, __a);
3299 /// Compares each of the corresponding signed 16-bit values of the
3300 /// 128-bit integer vectors to determine if the values in the first operand
3301 /// are less than those in the second operand.
3303 /// Each comparison yields 0x0 for false, 0xFFFF for true.
3305 /// \headerfile <x86intrin.h>
3307 /// This intrinsic corresponds to the <c> VPCMPGTW / PCMPGTW </c> instruction.
3310 /// A 128-bit integer vector.
3312 /// A 128-bit integer vector.
3313 /// \returns A 128-bit integer vector containing the comparison results.
3314 static __inline__ __m128i __DEFAULT_FN_ATTRS
3315 _mm_cmplt_epi16(__m128i __a, __m128i __b)
3317 return _mm_cmpgt_epi16(__b, __a);
3320 /// Compares each of the corresponding signed 32-bit values of the
3321 /// 128-bit integer vectors to determine if the values in the first operand
3322 /// are less than those in the second operand.
3324 /// Each comparison yields 0x0 for false, 0xFFFFFFFF for true.
3326 /// \headerfile <x86intrin.h>
3328 /// This intrinsic corresponds to the <c> VPCMPGTD / PCMPGTD </c> instruction.
3331 /// A 128-bit integer vector.
3333 /// A 128-bit integer vector.
3334 /// \returns A 128-bit integer vector containing the comparison results.
3335 static __inline__ __m128i __DEFAULT_FN_ATTRS
3336 _mm_cmplt_epi32(__m128i __a, __m128i __b)
3338 return _mm_cmpgt_epi32(__b, __a);
3342 /// Converts a 64-bit signed integer value from the second operand into a
3343 /// double-precision value and returns it in the lower element of a [2 x
3344 /// double] vector; the upper element of the returned vector is copied from
3345 /// the upper element of the first operand.
3347 /// \headerfile <x86intrin.h>
3349 /// This intrinsic corresponds to the <c> VCVTSI2SD / CVTSI2SD </c> instruction.
3352 /// A 128-bit vector of [2 x double]. The upper 64 bits of this operand are
3353 /// copied to the upper 64 bits of the destination.
3355 /// A 64-bit signed integer operand containing the value to be converted.
3356 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
3357 /// converted value of the second operand. The upper 64 bits are copied from
3358 /// the upper 64 bits of the first operand.
3359 static __inline__ __m128d __DEFAULT_FN_ATTRS
3360 _mm_cvtsi64_sd(__m128d __a, long long __b)
3366 /// Converts the first (lower) element of a vector of [2 x double] into a
3367 /// 64-bit signed integer value, according to the current rounding mode.
3369 /// \headerfile <x86intrin.h>
3371 /// This intrinsic corresponds to the <c> VCVTSD2SI / CVTSD2SI </c> instruction.
3374 /// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
3376 /// \returns A 64-bit signed integer containing the converted value.
3377 static __inline__ long long __DEFAULT_FN_ATTRS
3378 _mm_cvtsd_si64(__m128d __a)
3380 return __builtin_ia32_cvtsd2si64((__v2df)__a);
3383 /// Converts the first (lower) element of a vector of [2 x double] into a
3384 /// 64-bit signed integer value, truncating the result when it is inexact.
3386 /// \headerfile <x86intrin.h>
3388 /// This intrinsic corresponds to the <c> VCVTTSD2SI / CVTTSD2SI </c>
3392 /// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
3394 /// \returns A 64-bit signed integer containing the converted value.
3395 static __inline__ long long __DEFAULT_FN_ATTRS
3396 _mm_cvttsd_si64(__m128d __a)
3398 return __builtin_ia32_cvttsd2si64((__v2df)__a);
3402 /// Converts a vector of [4 x i32] into a vector of [4 x float].
3404 /// \headerfile <x86intrin.h>
3406 /// This intrinsic corresponds to the <c> VCVTDQ2PS / CVTDQ2PS </c> instruction.
3409 /// A 128-bit integer vector.
3410 /// \returns A 128-bit vector of [4 x float] containing the converted values.
3411 static __inline__ __m128 __DEFAULT_FN_ATTRS
3412 _mm_cvtepi32_ps(__m128i __a)
3414 return (__m128)__builtin_convertvector((__v4si)__a, __v4sf);
3417 /// Converts a vector of [4 x float] into a vector of [4 x i32].
3419 /// \headerfile <x86intrin.h>
3421 /// This intrinsic corresponds to the <c> VCVTPS2DQ / CVTPS2DQ </c> instruction.
3424 /// A 128-bit vector of [4 x float].
3425 /// \returns A 128-bit integer vector of [4 x i32] containing the converted
3427 static __inline__ __m128i __DEFAULT_FN_ATTRS
3428 _mm_cvtps_epi32(__m128 __a)
3430 return (__m128i)__builtin_ia32_cvtps2dq((__v4sf)__a);
3433 /// Converts a vector of [4 x float] into a vector of [4 x i32],
3434 /// truncating the result when it is inexact.
3436 /// \headerfile <x86intrin.h>
3438 /// This intrinsic corresponds to the <c> VCVTTPS2DQ / CVTTPS2DQ </c>
3442 /// A 128-bit vector of [4 x float].
3443 /// \returns A 128-bit vector of [4 x i32] containing the converted values.
3444 static __inline__ __m128i __DEFAULT_FN_ATTRS
3445 _mm_cvttps_epi32(__m128 __a)
3447 return (__m128i)__builtin_ia32_cvttps2dq((__v4sf)__a);
3450 /// Returns a vector of [4 x i32] where the lowest element is the input
3451 /// operand and the remaining elements are zero.
3453 /// \headerfile <x86intrin.h>
3455 /// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
3458 /// A 32-bit signed integer operand.
3459 /// \returns A 128-bit vector of [4 x i32].
3460 static __inline__ __m128i __DEFAULT_FN_ATTRS
3461 _mm_cvtsi32_si128(int __a)
3463 return __extension__ (__m128i)(__v4si){ __a, 0, 0, 0 };
3467 /// Returns a vector of [2 x i64] where the lower element is the input
3468 /// operand and the upper element is zero.
3470 /// \headerfile <x86intrin.h>
3472 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
3475 /// A 64-bit signed integer operand containing the value to be converted.
3476 /// \returns A 128-bit vector of [2 x i64] containing the converted value.
3477 static __inline__ __m128i __DEFAULT_FN_ATTRS
3478 _mm_cvtsi64_si128(long long __a)
3480 return __extension__ (__m128i)(__v2di){ __a, 0 };
3484 /// Moves the least significant 32 bits of a vector of [4 x i32] to a
3485 /// 32-bit signed integer value.
3487 /// \headerfile <x86intrin.h>
3489 /// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
3492 /// A vector of [4 x i32]. The least significant 32 bits are moved to the
3494 /// \returns A 32-bit signed integer containing the moved value.
3495 static __inline__ int __DEFAULT_FN_ATTRS
3496 _mm_cvtsi128_si32(__m128i __a)
3498 __v4si __b = (__v4si)__a;
3503 /// Moves the least significant 64 bits of a vector of [2 x i64] to a
3504 /// 64-bit signed integer value.
3506 /// \headerfile <x86intrin.h>
3508 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
3511 /// A vector of [2 x i64]. The least significant 64 bits are moved to the
3513 /// \returns A 64-bit signed integer containing the moved value.
3514 static __inline__ long long __DEFAULT_FN_ATTRS
3515 _mm_cvtsi128_si64(__m128i __a)
3521 /// Moves packed integer values from an aligned 128-bit memory location
3522 /// to elements in a 128-bit integer vector.
3524 /// \headerfile <x86intrin.h>
3526 /// This intrinsic corresponds to the <c> VMOVDQA / MOVDQA </c> instruction.
3529 /// An aligned pointer to a memory location containing integer values.
3530 /// \returns A 128-bit integer vector containing the moved values.
3531 static __inline__ __m128i __DEFAULT_FN_ATTRS
3532 _mm_load_si128(__m128i const *__p)
3537 /// Moves packed integer values from an unaligned 128-bit memory location
3538 /// to elements in a 128-bit integer vector.
3540 /// \headerfile <x86intrin.h>
3542 /// This intrinsic corresponds to the <c> VMOVDQU / MOVDQU </c> instruction.
3545 /// A pointer to a memory location containing integer values.
3546 /// \returns A 128-bit integer vector containing the moved values.
3547 static __inline__ __m128i __DEFAULT_FN_ATTRS
3548 _mm_loadu_si128(__m128i_u const *__p)
3550 struct __loadu_si128 {
3552 } __attribute__((__packed__, __may_alias__));
3553 return ((const struct __loadu_si128*)__p)->__v;
3556 /// Returns a vector of [2 x i64] where the lower element is taken from
3557 /// the lower element of the operand, and the upper element is zero.
3559 /// \headerfile <x86intrin.h>
3561 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
3564 /// A 128-bit vector of [2 x i64]. Bits [63:0] are written to bits [63:0] of
3565 /// the destination.
3566 /// \returns A 128-bit vector of [2 x i64]. The lower order bits contain the
3567 /// moved value. The higher order bits are cleared.
3568 static __inline__ __m128i __DEFAULT_FN_ATTRS
3569 _mm_loadl_epi64(__m128i_u const *__p)
3571 struct __mm_loadl_epi64_struct {
3573 } __attribute__((__packed__, __may_alias__));
3574 return __extension__ (__m128i) { ((const struct __mm_loadl_epi64_struct*)__p)->__u, 0};
3577 /// Generates a 128-bit vector of [4 x i32] with unspecified content.
3578 /// This could be used as an argument to another intrinsic function where the
3579 /// argument is required but the value is not actually used.
3581 /// \headerfile <x86intrin.h>
3583 /// This intrinsic has no corresponding instruction.
3585 /// \returns A 128-bit vector of [4 x i32] with unspecified content.
3586 static __inline__ __m128i __DEFAULT_FN_ATTRS
3587 _mm_undefined_si128(void)
3589 return (__m128i)__builtin_ia32_undef128();
3592 /// Initializes both 64-bit values in a 128-bit vector of [2 x i64] with
3593 /// the specified 64-bit integer values.
3595 /// \headerfile <x86intrin.h>
3597 /// This intrinsic is a utility function and does not correspond to a specific
3601 /// A 64-bit integer value used to initialize the upper 64 bits of the
3602 /// destination vector of [2 x i64].
3604 /// A 64-bit integer value used to initialize the lower 64 bits of the
3605 /// destination vector of [2 x i64].
3606 /// \returns An initialized 128-bit vector of [2 x i64] containing the values
3607 /// provided in the operands.
3608 static __inline__ __m128i __DEFAULT_FN_ATTRS
3609 _mm_set_epi64x(long long __q1, long long __q0)
3611 return __extension__ (__m128i)(__v2di){ __q0, __q1 };
3614 /// Initializes both 64-bit values in a 128-bit vector of [2 x i64] with
3615 /// the specified 64-bit integer values.
3617 /// \headerfile <x86intrin.h>
3619 /// This intrinsic is a utility function and does not correspond to a specific
3623 /// A 64-bit integer value used to initialize the upper 64 bits of the
3624 /// destination vector of [2 x i64].
3626 /// A 64-bit integer value used to initialize the lower 64 bits of the
3627 /// destination vector of [2 x i64].
3628 /// \returns An initialized 128-bit vector of [2 x i64] containing the values
3629 /// provided in the operands.
3630 static __inline__ __m128i __DEFAULT_FN_ATTRS
3631 _mm_set_epi64(__m64 __q1, __m64 __q0)
3633 return _mm_set_epi64x((long long)__q1, (long long)__q0);
3636 /// Initializes the 32-bit values in a 128-bit vector of [4 x i32] with
3637 /// the specified 32-bit integer values.
3639 /// \headerfile <x86intrin.h>
3641 /// This intrinsic is a utility function and does not correspond to a specific
3645 /// A 32-bit integer value used to initialize bits [127:96] of the
3646 /// destination vector.
3648 /// A 32-bit integer value used to initialize bits [95:64] of the destination
3651 /// A 32-bit integer value used to initialize bits [63:32] of the destination
3654 /// A 32-bit integer value used to initialize bits [31:0] of the destination
3656 /// \returns An initialized 128-bit vector of [4 x i32] containing the values
3657 /// provided in the operands.
3658 static __inline__ __m128i __DEFAULT_FN_ATTRS
3659 _mm_set_epi32(int __i3, int __i2, int __i1, int __i0)
3661 return __extension__ (__m128i)(__v4si){ __i0, __i1, __i2, __i3};
3664 /// Initializes the 16-bit values in a 128-bit vector of [8 x i16] with
3665 /// the specified 16-bit integer values.
3667 /// \headerfile <x86intrin.h>
3669 /// This intrinsic is a utility function and does not correspond to a specific
3673 /// A 16-bit integer value used to initialize bits [127:112] of the
3674 /// destination vector.
3676 /// A 16-bit integer value used to initialize bits [111:96] of the
3677 /// destination vector.
3679 /// A 16-bit integer value used to initialize bits [95:80] of the destination
3682 /// A 16-bit integer value used to initialize bits [79:64] of the destination
3685 /// A 16-bit integer value used to initialize bits [63:48] of the destination
3688 /// A 16-bit integer value used to initialize bits [47:32] of the destination
3691 /// A 16-bit integer value used to initialize bits [31:16] of the destination
3694 /// A 16-bit integer value used to initialize bits [15:0] of the destination
3696 /// \returns An initialized 128-bit vector of [8 x i16] containing the values
3697 /// provided in the operands.
3698 static __inline__ __m128i __DEFAULT_FN_ATTRS
3699 _mm_set_epi16(short __w7, short __w6, short __w5, short __w4, short __w3, short __w2, short __w1, short __w0)
3701 return __extension__ (__m128i)(__v8hi){ __w0, __w1, __w2, __w3, __w4, __w5, __w6, __w7 };
3704 /// Initializes the 8-bit values in a 128-bit vector of [16 x i8] with
3705 /// the specified 8-bit integer values.
3707 /// \headerfile <x86intrin.h>
3709 /// This intrinsic is a utility function and does not correspond to a specific
3713 /// Initializes bits [127:120] of the destination vector.
3715 /// Initializes bits [119:112] of the destination vector.
3717 /// Initializes bits [111:104] of the destination vector.
3719 /// Initializes bits [103:96] of the destination vector.
3721 /// Initializes bits [95:88] of the destination vector.
3723 /// Initializes bits [87:80] of the destination vector.
3725 /// Initializes bits [79:72] of the destination vector.
3727 /// Initializes bits [71:64] of the destination vector.
3729 /// Initializes bits [63:56] of the destination vector.
3731 /// Initializes bits [55:48] of the destination vector.
3733 /// Initializes bits [47:40] of the destination vector.
3735 /// Initializes bits [39:32] of the destination vector.
3737 /// Initializes bits [31:24] of the destination vector.
3739 /// Initializes bits [23:16] of the destination vector.
3741 /// Initializes bits [15:8] of the destination vector.
3743 /// Initializes bits [7:0] of the destination vector.
3744 /// \returns An initialized 128-bit vector of [16 x i8] containing the values
3745 /// provided in the operands.
3746 static __inline__ __m128i __DEFAULT_FN_ATTRS
3747 _mm_set_epi8(char __b15, char __b14, char __b13, char __b12, char __b11, char __b10, char __b9, char __b8, char __b7, char __b6, char __b5, char __b4, char __b3, char __b2, char __b1, char __b0)
3749 return __extension__ (__m128i)(__v16qi){ __b0, __b1, __b2, __b3, __b4, __b5, __b6, __b7, __b8, __b9, __b10, __b11, __b12, __b13, __b14, __b15 };
3752 /// Initializes both values in a 128-bit integer vector with the
3753 /// specified 64-bit integer value.
3755 /// \headerfile <x86intrin.h>
3757 /// This intrinsic is a utility function and does not correspond to a specific
3761 /// Integer value used to initialize the elements of the destination integer
3763 /// \returns An initialized 128-bit integer vector of [2 x i64] with both
3764 /// elements containing the value provided in the operand.
3765 static __inline__ __m128i __DEFAULT_FN_ATTRS
3766 _mm_set1_epi64x(long long __q)
3768 return _mm_set_epi64x(__q, __q);
3771 /// Initializes both values in a 128-bit vector of [2 x i64] with the
3772 /// specified 64-bit value.
3774 /// \headerfile <x86intrin.h>
3776 /// This intrinsic is a utility function and does not correspond to a specific
3780 /// A 64-bit value used to initialize the elements of the destination integer
3782 /// \returns An initialized 128-bit vector of [2 x i64] with all elements
3783 /// containing the value provided in the operand.
3784 static __inline__ __m128i __DEFAULT_FN_ATTRS
3785 _mm_set1_epi64(__m64 __q)
3787 return _mm_set_epi64(__q, __q);
3790 /// Initializes all values in a 128-bit vector of [4 x i32] with the
3791 /// specified 32-bit value.
3793 /// \headerfile <x86intrin.h>
3795 /// This intrinsic is a utility function and does not correspond to a specific
3799 /// A 32-bit value used to initialize the elements of the destination integer
3801 /// \returns An initialized 128-bit vector of [4 x i32] with all elements
3802 /// containing the value provided in the operand.
3803 static __inline__ __m128i __DEFAULT_FN_ATTRS
3804 _mm_set1_epi32(int __i)
3806 return _mm_set_epi32(__i, __i, __i, __i);
3809 /// Initializes all values in a 128-bit vector of [8 x i16] with the
3810 /// specified 16-bit value.
3812 /// \headerfile <x86intrin.h>
3814 /// This intrinsic is a utility function and does not correspond to a specific
3818 /// A 16-bit value used to initialize the elements of the destination integer
3820 /// \returns An initialized 128-bit vector of [8 x i16] with all elements
3821 /// containing the value provided in the operand.
3822 static __inline__ __m128i __DEFAULT_FN_ATTRS
3823 _mm_set1_epi16(short __w)
3825 return _mm_set_epi16(__w, __w, __w, __w, __w, __w, __w, __w);
3828 /// Initializes all values in a 128-bit vector of [16 x i8] with the
3829 /// specified 8-bit value.
3831 /// \headerfile <x86intrin.h>
3833 /// This intrinsic is a utility function and does not correspond to a specific
3837 /// An 8-bit value used to initialize the elements of the destination integer
3839 /// \returns An initialized 128-bit vector of [16 x i8] with all elements
3840 /// containing the value provided in the operand.
3841 static __inline__ __m128i __DEFAULT_FN_ATTRS
3842 _mm_set1_epi8(char __b)
3844 return _mm_set_epi8(__b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b);
3847 /// Constructs a 128-bit integer vector, initialized in reverse order
3848 /// with the specified 64-bit integral values.
3850 /// \headerfile <x86intrin.h>
3852 /// This intrinsic does not correspond to a specific instruction.
3855 /// A 64-bit integral value used to initialize the lower 64 bits of the
3858 /// A 64-bit integral value used to initialize the upper 64 bits of the
3860 /// \returns An initialized 128-bit integer vector.
3861 static __inline__ __m128i __DEFAULT_FN_ATTRS
3862 _mm_setr_epi64(__m64 __q0, __m64 __q1)
3864 return _mm_set_epi64(__q1, __q0);
3867 /// Constructs a 128-bit integer vector, initialized in reverse order
3868 /// with the specified 32-bit integral values.
3870 /// \headerfile <x86intrin.h>
3872 /// This intrinsic is a utility function and does not correspond to a specific
3876 /// A 32-bit integral value used to initialize bits [31:0] of the result.
3878 /// A 32-bit integral value used to initialize bits [63:32] of the result.
3880 /// A 32-bit integral value used to initialize bits [95:64] of the result.
3882 /// A 32-bit integral value used to initialize bits [127:96] of the result.
3883 /// \returns An initialized 128-bit integer vector.
3884 static __inline__ __m128i __DEFAULT_FN_ATTRS
3885 _mm_setr_epi32(int __i0, int __i1, int __i2, int __i3)
3887 return _mm_set_epi32(__i3, __i2, __i1, __i0);
3890 /// Constructs a 128-bit integer vector, initialized in reverse order
3891 /// with the specified 16-bit integral values.
3893 /// \headerfile <x86intrin.h>
3895 /// This intrinsic is a utility function and does not correspond to a specific
3899 /// A 16-bit integral value used to initialize bits [15:0] of the result.
3901 /// A 16-bit integral value used to initialize bits [31:16] of the result.
3903 /// A 16-bit integral value used to initialize bits [47:32] of the result.
3905 /// A 16-bit integral value used to initialize bits [63:48] of the result.
3907 /// A 16-bit integral value used to initialize bits [79:64] of the result.
3909 /// A 16-bit integral value used to initialize bits [95:80] of the result.
3911 /// A 16-bit integral value used to initialize bits [111:96] of the result.
3913 /// A 16-bit integral value used to initialize bits [127:112] of the result.
3914 /// \returns An initialized 128-bit integer vector.
3915 static __inline__ __m128i __DEFAULT_FN_ATTRS
3916 _mm_setr_epi16(short __w0, short __w1, short __w2, short __w3, short __w4, short __w5, short __w6, short __w7)
3918 return _mm_set_epi16(__w7, __w6, __w5, __w4, __w3, __w2, __w1, __w0);
3921 /// Constructs a 128-bit integer vector, initialized in reverse order
3922 /// with the specified 8-bit integral values.
3924 /// \headerfile <x86intrin.h>
3926 /// This intrinsic is a utility function and does not correspond to a specific
3930 /// An 8-bit integral value used to initialize bits [7:0] of the result.
3932 /// An 8-bit integral value used to initialize bits [15:8] of the result.
3934 /// An 8-bit integral value used to initialize bits [23:16] of the result.
3936 /// An 8-bit integral value used to initialize bits [31:24] of the result.
3938 /// An 8-bit integral value used to initialize bits [39:32] of the result.
3940 /// An 8-bit integral value used to initialize bits [47:40] of the result.
3942 /// An 8-bit integral value used to initialize bits [55:48] of the result.
3944 /// An 8-bit integral value used to initialize bits [63:56] of the result.
3946 /// An 8-bit integral value used to initialize bits [71:64] of the result.
3948 /// An 8-bit integral value used to initialize bits [79:72] of the result.
3950 /// An 8-bit integral value used to initialize bits [87:80] of the result.
3952 /// An 8-bit integral value used to initialize bits [95:88] of the result.
3954 /// An 8-bit integral value used to initialize bits [103:96] of the result.
3956 /// An 8-bit integral value used to initialize bits [111:104] of the result.
3958 /// An 8-bit integral value used to initialize bits [119:112] of the result.
3960 /// An 8-bit integral value used to initialize bits [127:120] of the result.
3961 /// \returns An initialized 128-bit integer vector.
3962 static __inline__ __m128i __DEFAULT_FN_ATTRS
3963 _mm_setr_epi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5, char __b6, char __b7, char __b8, char __b9, char __b10, char __b11, char __b12, char __b13, char __b14, char __b15)
3965 return _mm_set_epi8(__b15, __b14, __b13, __b12, __b11, __b10, __b9, __b8, __b7, __b6, __b5, __b4, __b3, __b2, __b1, __b0);
3968 /// Creates a 128-bit integer vector initialized to zero.
3970 /// \headerfile <x86intrin.h>
3972 /// This intrinsic corresponds to the <c> VXORPS / XORPS </c> instruction.
3974 /// \returns An initialized 128-bit integer vector with all elements set to
3976 static __inline__ __m128i __DEFAULT_FN_ATTRS
3977 _mm_setzero_si128(void)
3979 return __extension__ (__m128i)(__v2di){ 0LL, 0LL };
3982 /// Stores a 128-bit integer vector to a memory location aligned on a
3983 /// 128-bit boundary.
3985 /// \headerfile <x86intrin.h>
3987 /// This intrinsic corresponds to the <c> VMOVAPS / MOVAPS </c> instruction.
3990 /// A pointer to an aligned memory location that will receive the integer
3993 /// A 128-bit integer vector containing the values to be moved.
3994 static __inline__ void __DEFAULT_FN_ATTRS
3995 _mm_store_si128(__m128i *__p, __m128i __b)
4000 /// Stores a 128-bit integer vector to an unaligned memory location.
4002 /// \headerfile <x86intrin.h>
4004 /// This intrinsic corresponds to the <c> VMOVUPS / MOVUPS </c> instruction.
4007 /// A pointer to a memory location that will receive the integer values.
4009 /// A 128-bit integer vector containing the values to be moved.
4010 static __inline__ void __DEFAULT_FN_ATTRS
4011 _mm_storeu_si128(__m128i_u *__p, __m128i __b)
4013 struct __storeu_si128 {
4015 } __attribute__((__packed__, __may_alias__));
4016 ((struct __storeu_si128*)__p)->__v = __b;
4019 /// Stores a 64-bit integer value from the low element of a 128-bit integer
4022 /// \headerfile <x86intrin.h>
4024 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
4027 /// A pointer to a 64-bit memory location. The address of the memory
4028 /// location does not have to be algned.
4030 /// A 128-bit integer vector containing the value to be stored.
4031 static __inline__ void __DEFAULT_FN_ATTRS
4032 _mm_storeu_si64(void *__p, __m128i __b)
4034 struct __storeu_si64 {
4036 } __attribute__((__packed__, __may_alias__));
4037 ((struct __storeu_si64*)__p)->__v = ((__v2di)__b)[0];
4040 /// Stores a 32-bit integer value from the low element of a 128-bit integer
4043 /// \headerfile <x86intrin.h>
4045 /// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
4048 /// A pointer to a 32-bit memory location. The address of the memory
4049 /// location does not have to be aligned.
4051 /// A 128-bit integer vector containing the value to be stored.
4052 static __inline__ void __DEFAULT_FN_ATTRS
4053 _mm_storeu_si32(void *__p, __m128i __b)
4055 struct __storeu_si32 {
4057 } __attribute__((__packed__, __may_alias__));
4058 ((struct __storeu_si32*)__p)->__v = ((__v4si)__b)[0];
4061 /// Stores a 16-bit integer value from the low element of a 128-bit integer
4064 /// \headerfile <x86intrin.h>
4066 /// This intrinsic does not correspond to a specific instruction.
4069 /// A pointer to a 16-bit memory location. The address of the memory
4070 /// location does not have to be aligned.
4072 /// A 128-bit integer vector containing the value to be stored.
4073 static __inline__ void __DEFAULT_FN_ATTRS
4074 _mm_storeu_si16(void *__p, __m128i __b)
4076 struct __storeu_si16 {
4078 } __attribute__((__packed__, __may_alias__));
4079 ((struct __storeu_si16*)__p)->__v = ((__v8hi)__b)[0];
4082 /// Moves bytes selected by the mask from the first operand to the
4083 /// specified unaligned memory location. When a mask bit is 1, the
4084 /// corresponding byte is written, otherwise it is not written.
4086 /// To minimize caching, the data is flagged as non-temporal (unlikely to be
4087 /// used again soon). Exception and trap behavior for elements not selected
4088 /// for storage to memory are implementation dependent.
4090 /// \headerfile <x86intrin.h>
4092 /// This intrinsic corresponds to the <c> VMASKMOVDQU / MASKMOVDQU </c>
4096 /// A 128-bit integer vector containing the values to be moved.
4098 /// A 128-bit integer vector containing the mask. The most significant bit of
4099 /// each byte represents the mask bits.
4101 /// A pointer to an unaligned 128-bit memory location where the specified
4102 /// values are moved.
4103 static __inline__ void __DEFAULT_FN_ATTRS
4104 _mm_maskmoveu_si128(__m128i __d, __m128i __n, char *__p)
4106 __builtin_ia32_maskmovdqu((__v16qi)__d, (__v16qi)__n, __p);
4109 /// Stores the lower 64 bits of a 128-bit integer vector of [2 x i64] to
4110 /// a memory location.
4112 /// \headerfile <x86intrin.h>
4114 /// This intrinsic corresponds to the <c> VMOVLPS / MOVLPS </c> instruction.
4117 /// A pointer to a 64-bit memory location that will receive the lower 64 bits
4118 /// of the integer vector parameter.
4120 /// A 128-bit integer vector of [2 x i64]. The lower 64 bits contain the
4121 /// value to be stored.
4122 static __inline__ void __DEFAULT_FN_ATTRS
4123 _mm_storel_epi64(__m128i_u *__p, __m128i __a)
4125 struct __mm_storel_epi64_struct {
4127 } __attribute__((__packed__, __may_alias__));
4128 ((struct __mm_storel_epi64_struct*)__p)->__u = __a[0];
4131 /// Stores a 128-bit floating point vector of [2 x double] to a 128-bit
4132 /// aligned memory location.
4134 /// To minimize caching, the data is flagged as non-temporal (unlikely to be
4135 /// used again soon).
4137 /// \headerfile <x86intrin.h>
4139 /// This intrinsic corresponds to the <c> VMOVNTPS / MOVNTPS </c> instruction.
4142 /// A pointer to the 128-bit aligned memory location used to store the value.
4144 /// A vector of [2 x double] containing the 64-bit values to be stored.
4145 static __inline__ void __DEFAULT_FN_ATTRS
4146 _mm_stream_pd(double *__p, __m128d __a)
4148 __builtin_nontemporal_store((__v2df)__a, (__v2df*)__p);
4151 /// Stores a 128-bit integer vector to a 128-bit aligned memory location.
4153 /// To minimize caching, the data is flagged as non-temporal (unlikely to be
4154 /// used again soon).
4156 /// \headerfile <x86intrin.h>
4158 /// This intrinsic corresponds to the <c> VMOVNTPS / MOVNTPS </c> instruction.
4161 /// A pointer to the 128-bit aligned memory location used to store the value.
4163 /// A 128-bit integer vector containing the values to be stored.
4164 static __inline__ void __DEFAULT_FN_ATTRS
4165 _mm_stream_si128(__m128i *__p, __m128i __a)
4167 __builtin_nontemporal_store((__v2di)__a, (__v2di*)__p);
4170 /// Stores a 32-bit integer value in the specified memory location.
4172 /// To minimize caching, the data is flagged as non-temporal (unlikely to be
4173 /// used again soon).
4175 /// \headerfile <x86intrin.h>
4177 /// This intrinsic corresponds to the <c> MOVNTI </c> instruction.
4180 /// A pointer to the 32-bit memory location used to store the value.
4182 /// A 32-bit integer containing the value to be stored.
4183 static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("sse2")))
4184 _mm_stream_si32(int *__p, int __a)
4186 __builtin_ia32_movnti(__p, __a);
4190 /// Stores a 64-bit integer value in the specified memory location.
4192 /// To minimize caching, the data is flagged as non-temporal (unlikely to be
4193 /// used again soon).
4195 /// \headerfile <x86intrin.h>
4197 /// This intrinsic corresponds to the <c> MOVNTIQ </c> instruction.
4200 /// A pointer to the 64-bit memory location used to store the value.
4202 /// A 64-bit integer containing the value to be stored.
4203 static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("sse2")))
4204 _mm_stream_si64(long long *__p, long long __a)
4206 __builtin_ia32_movnti64(__p, __a);
4210 #if defined(__cplusplus)
4214 /// The cache line containing \a __p is flushed and invalidated from all
4215 /// caches in the coherency domain.
4217 /// \headerfile <x86intrin.h>
4219 /// This intrinsic corresponds to the <c> CLFLUSH </c> instruction.
4222 /// A pointer to the memory location used to identify the cache line to be
4224 void _mm_clflush(void const * __p);
4226 /// Forces strong memory ordering (serialization) between load
4227 /// instructions preceding this instruction and load instructions following
4228 /// this instruction, ensuring the system completes all previous loads before
4229 /// executing subsequent loads.
4231 /// \headerfile <x86intrin.h>
4233 /// This intrinsic corresponds to the <c> LFENCE </c> instruction.
4235 void _mm_lfence(void);
4237 /// Forces strong memory ordering (serialization) between load and store
4238 /// instructions preceding this instruction and load and store instructions
4239 /// following this instruction, ensuring that the system completes all
4240 /// previous memory accesses before executing subsequent memory accesses.
4242 /// \headerfile <x86intrin.h>
4244 /// This intrinsic corresponds to the <c> MFENCE </c> instruction.
4246 void _mm_mfence(void);
4248 #if defined(__cplusplus)
4252 /// Converts 16-bit signed integers from both 128-bit integer vector
4253 /// operands into 8-bit signed integers, and packs the results into the
4254 /// destination. Positive values greater than 0x7F are saturated to 0x7F.
4255 /// Negative values less than 0x80 are saturated to 0x80.
4257 /// \headerfile <x86intrin.h>
4259 /// This intrinsic corresponds to the <c> VPACKSSWB / PACKSSWB </c> instruction.
4262 /// A 128-bit integer vector of [8 x i16]. Each 16-bit element is treated as
4263 /// a signed integer and is converted to a 8-bit signed integer with
4264 /// saturation. Values greater than 0x7F are saturated to 0x7F. Values less
4265 /// than 0x80 are saturated to 0x80. The converted [8 x i8] values are
4266 /// written to the lower 64 bits of the result.
4268 /// A 128-bit integer vector of [8 x i16]. Each 16-bit element is treated as
4269 /// a signed integer and is converted to a 8-bit signed integer with
4270 /// saturation. Values greater than 0x7F are saturated to 0x7F. Values less
4271 /// than 0x80 are saturated to 0x80. The converted [8 x i8] values are
4272 /// written to the higher 64 bits of the result.
4273 /// \returns A 128-bit vector of [16 x i8] containing the converted values.
4274 static __inline__ __m128i __DEFAULT_FN_ATTRS
4275 _mm_packs_epi16(__m128i __a, __m128i __b)
4277 return (__m128i)__builtin_ia32_packsswb128((__v8hi)__a, (__v8hi)__b);
4280 /// Converts 32-bit signed integers from both 128-bit integer vector
4281 /// operands into 16-bit signed integers, and packs the results into the
4282 /// destination. Positive values greater than 0x7FFF are saturated to 0x7FFF.
4283 /// Negative values less than 0x8000 are saturated to 0x8000.
4285 /// \headerfile <x86intrin.h>
4287 /// This intrinsic corresponds to the <c> VPACKSSDW / PACKSSDW </c> instruction.
4290 /// A 128-bit integer vector of [4 x i32]. Each 32-bit element is treated as
4291 /// a signed integer and is converted to a 16-bit signed integer with
4292 /// saturation. Values greater than 0x7FFF are saturated to 0x7FFF. Values
4293 /// less than 0x8000 are saturated to 0x8000. The converted [4 x i16] values
4294 /// are written to the lower 64 bits of the result.
4296 /// A 128-bit integer vector of [4 x i32]. Each 32-bit element is treated as
4297 /// a signed integer and is converted to a 16-bit signed integer with
4298 /// saturation. Values greater than 0x7FFF are saturated to 0x7FFF. Values
4299 /// less than 0x8000 are saturated to 0x8000. The converted [4 x i16] values
4300 /// are written to the higher 64 bits of the result.
4301 /// \returns A 128-bit vector of [8 x i16] containing the converted values.
4302 static __inline__ __m128i __DEFAULT_FN_ATTRS
4303 _mm_packs_epi32(__m128i __a, __m128i __b)
4305 return (__m128i)__builtin_ia32_packssdw128((__v4si)__a, (__v4si)__b);
4308 /// Converts 16-bit signed integers from both 128-bit integer vector
4309 /// operands into 8-bit unsigned integers, and packs the results into the
4310 /// destination. Values greater than 0xFF are saturated to 0xFF. Values less
4311 /// than 0x00 are saturated to 0x00.
4313 /// \headerfile <x86intrin.h>
4315 /// This intrinsic corresponds to the <c> VPACKUSWB / PACKUSWB </c> instruction.
4318 /// A 128-bit integer vector of [8 x i16]. Each 16-bit element is treated as
4319 /// a signed integer and is converted to an 8-bit unsigned integer with
4320 /// saturation. Values greater than 0xFF are saturated to 0xFF. Values less
4321 /// than 0x00 are saturated to 0x00. The converted [8 x i8] values are
4322 /// written to the lower 64 bits of the result.
4324 /// A 128-bit integer vector of [8 x i16]. Each 16-bit element is treated as
4325 /// a signed integer and is converted to an 8-bit unsigned integer with
4326 /// saturation. Values greater than 0xFF are saturated to 0xFF. Values less
4327 /// than 0x00 are saturated to 0x00. The converted [8 x i8] values are
4328 /// written to the higher 64 bits of the result.
4329 /// \returns A 128-bit vector of [16 x i8] containing the converted values.
4330 static __inline__ __m128i __DEFAULT_FN_ATTRS
4331 _mm_packus_epi16(__m128i __a, __m128i __b)
4333 return (__m128i)__builtin_ia32_packuswb128((__v8hi)__a, (__v8hi)__b);
4336 /// Extracts 16 bits from a 128-bit integer vector of [8 x i16], using
4337 /// the immediate-value parameter as a selector.
4339 /// \headerfile <x86intrin.h>
4341 /// This intrinsic corresponds to the <c> VPEXTRW / PEXTRW </c> instruction.
4344 /// A 128-bit integer vector.
4346 /// An immediate value. Bits [2:0] selects values from \a __a to be assigned
4347 /// to bits[15:0] of the result. \n
4348 /// 000: assign values from bits [15:0] of \a __a. \n
4349 /// 001: assign values from bits [31:16] of \a __a. \n
4350 /// 010: assign values from bits [47:32] of \a __a. \n
4351 /// 011: assign values from bits [63:48] of \a __a. \n
4352 /// 100: assign values from bits [79:64] of \a __a. \n
4353 /// 101: assign values from bits [95:80] of \a __a. \n
4354 /// 110: assign values from bits [111:96] of \a __a. \n
4355 /// 111: assign values from bits [127:112] of \a __a.
4356 /// \returns An integer, whose lower 16 bits are selected from the 128-bit
4357 /// integer vector parameter and the remaining bits are assigned zeros.
4358 #define _mm_extract_epi16(a, imm) \
4359 (int)(unsigned short)__builtin_ia32_vec_ext_v8hi((__v8hi)(__m128i)(a), \
4362 /// Constructs a 128-bit integer vector by first making a copy of the
4363 /// 128-bit integer vector parameter, and then inserting the lower 16 bits
4364 /// of an integer parameter into an offset specified by the immediate-value
4367 /// \headerfile <x86intrin.h>
4369 /// This intrinsic corresponds to the <c> VPINSRW / PINSRW </c> instruction.
4372 /// A 128-bit integer vector of [8 x i16]. This vector is copied to the
4373 /// result and then one of the eight elements in the result is replaced by
4374 /// the lower 16 bits of \a __b.
4376 /// An integer. The lower 16 bits of this parameter are written to the
4377 /// result beginning at an offset specified by \a __imm.
4379 /// An immediate value specifying the bit offset in the result at which the
4380 /// lower 16 bits of \a __b are written.
4381 /// \returns A 128-bit integer vector containing the constructed values.
4382 #define _mm_insert_epi16(a, b, imm) \
4383 (__m128i)__builtin_ia32_vec_set_v8hi((__v8hi)(__m128i)(a), (int)(b), \
4386 /// Copies the values of the most significant bits from each 8-bit
4387 /// element in a 128-bit integer vector of [16 x i8] to create a 16-bit mask
4388 /// value, zero-extends the value, and writes it to the destination.
4390 /// \headerfile <x86intrin.h>
4392 /// This intrinsic corresponds to the <c> VPMOVMSKB / PMOVMSKB </c> instruction.
4395 /// A 128-bit integer vector containing the values with bits to be extracted.
4396 /// \returns The most significant bits from each 8-bit element in \a __a,
4397 /// written to bits [15:0]. The other bits are assigned zeros.
4398 static __inline__ int __DEFAULT_FN_ATTRS
4399 _mm_movemask_epi8(__m128i __a)
4401 return __builtin_ia32_pmovmskb128((__v16qi)__a);
4404 /// Constructs a 128-bit integer vector by shuffling four 32-bit
4405 /// elements of a 128-bit integer vector parameter, using the immediate-value
4406 /// parameter as a specifier.
4408 /// \headerfile <x86intrin.h>
4411 /// __m128i _mm_shuffle_epi32(__m128i a, const int imm);
4414 /// This intrinsic corresponds to the <c> VPSHUFD / PSHUFD </c> instruction.
4417 /// A 128-bit integer vector containing the values to be copied.
4419 /// An immediate value containing an 8-bit value specifying which elements to
4420 /// copy from a. The destinations within the 128-bit destination are assigned
4421 /// values as follows: \n
4422 /// Bits [1:0] are used to assign values to bits [31:0] of the result. \n
4423 /// Bits [3:2] are used to assign values to bits [63:32] of the result. \n
4424 /// Bits [5:4] are used to assign values to bits [95:64] of the result. \n
4425 /// Bits [7:6] are used to assign values to bits [127:96] of the result. \n
4426 /// Bit value assignments: \n
4427 /// 00: assign values from bits [31:0] of \a a. \n
4428 /// 01: assign values from bits [63:32] of \a a. \n
4429 /// 10: assign values from bits [95:64] of \a a. \n
4430 /// 11: assign values from bits [127:96] of \a a.
4431 /// \returns A 128-bit integer vector containing the shuffled values.
4432 #define _mm_shuffle_epi32(a, imm) \
4433 (__m128i)__builtin_ia32_pshufd((__v4si)(__m128i)(a), (int)(imm))
4435 /// Constructs a 128-bit integer vector by shuffling four lower 16-bit
4436 /// elements of a 128-bit integer vector of [8 x i16], using the immediate
4437 /// value parameter as a specifier.
4439 /// \headerfile <x86intrin.h>
4442 /// __m128i _mm_shufflelo_epi16(__m128i a, const int imm);
4445 /// This intrinsic corresponds to the <c> VPSHUFLW / PSHUFLW </c> instruction.
4448 /// A 128-bit integer vector of [8 x i16]. Bits [127:64] are copied to bits
4449 /// [127:64] of the result.
4451 /// An 8-bit immediate value specifying which elements to copy from \a a. \n
4452 /// Bits[1:0] are used to assign values to bits [15:0] of the result. \n
4453 /// Bits[3:2] are used to assign values to bits [31:16] of the result. \n
4454 /// Bits[5:4] are used to assign values to bits [47:32] of the result. \n
4455 /// Bits[7:6] are used to assign values to bits [63:48] of the result. \n
4456 /// Bit value assignments: \n
4457 /// 00: assign values from bits [15:0] of \a a. \n
4458 /// 01: assign values from bits [31:16] of \a a. \n
4459 /// 10: assign values from bits [47:32] of \a a. \n
4460 /// 11: assign values from bits [63:48] of \a a. \n
4461 /// \returns A 128-bit integer vector containing the shuffled values.
4462 #define _mm_shufflelo_epi16(a, imm) \
4463 (__m128i)__builtin_ia32_pshuflw((__v8hi)(__m128i)(a), (int)(imm))
4465 /// Constructs a 128-bit integer vector by shuffling four upper 16-bit
4466 /// elements of a 128-bit integer vector of [8 x i16], using the immediate
4467 /// value parameter as a specifier.
4469 /// \headerfile <x86intrin.h>
4472 /// __m128i _mm_shufflehi_epi16(__m128i a, const int imm);
4475 /// This intrinsic corresponds to the <c> VPSHUFHW / PSHUFHW </c> instruction.
4478 /// A 128-bit integer vector of [8 x i16]. Bits [63:0] are copied to bits
4479 /// [63:0] of the result.
4481 /// An 8-bit immediate value specifying which elements to copy from \a a. \n
4482 /// Bits[1:0] are used to assign values to bits [79:64] of the result. \n
4483 /// Bits[3:2] are used to assign values to bits [95:80] of the result. \n
4484 /// Bits[5:4] are used to assign values to bits [111:96] of the result. \n
4485 /// Bits[7:6] are used to assign values to bits [127:112] of the result. \n
4486 /// Bit value assignments: \n
4487 /// 00: assign values from bits [79:64] of \a a. \n
4488 /// 01: assign values from bits [95:80] of \a a. \n
4489 /// 10: assign values from bits [111:96] of \a a. \n
4490 /// 11: assign values from bits [127:112] of \a a. \n
4491 /// \returns A 128-bit integer vector containing the shuffled values.
4492 #define _mm_shufflehi_epi16(a, imm) \
4493 (__m128i)__builtin_ia32_pshufhw((__v8hi)(__m128i)(a), (int)(imm))
4495 /// Unpacks the high-order (index 8-15) values from two 128-bit vectors
4496 /// of [16 x i8] and interleaves them into a 128-bit vector of [16 x i8].
4498 /// \headerfile <x86intrin.h>
4500 /// This intrinsic corresponds to the <c> VPUNPCKHBW / PUNPCKHBW </c>
4504 /// A 128-bit vector of [16 x i8].
4505 /// Bits [71:64] are written to bits [7:0] of the result. \n
4506 /// Bits [79:72] are written to bits [23:16] of the result. \n
4507 /// Bits [87:80] are written to bits [39:32] of the result. \n
4508 /// Bits [95:88] are written to bits [55:48] of the result. \n
4509 /// Bits [103:96] are written to bits [71:64] of the result. \n
4510 /// Bits [111:104] are written to bits [87:80] of the result. \n
4511 /// Bits [119:112] are written to bits [103:96] of the result. \n
4512 /// Bits [127:120] are written to bits [119:112] of the result.
4514 /// A 128-bit vector of [16 x i8]. \n
4515 /// Bits [71:64] are written to bits [15:8] of the result. \n
4516 /// Bits [79:72] are written to bits [31:24] of the result. \n
4517 /// Bits [87:80] are written to bits [47:40] of the result. \n
4518 /// Bits [95:88] are written to bits [63:56] of the result. \n
4519 /// Bits [103:96] are written to bits [79:72] of the result. \n
4520 /// Bits [111:104] are written to bits [95:88] of the result. \n
4521 /// Bits [119:112] are written to bits [111:104] of the result. \n
4522 /// Bits [127:120] are written to bits [127:120] of the result.
4523 /// \returns A 128-bit vector of [16 x i8] containing the interleaved values.
4524 static __inline__ __m128i __DEFAULT_FN_ATTRS
4525 _mm_unpackhi_epi8(__m128i __a, __m128i __b)
4527 return (__m128i)__builtin_shufflevector((__v16qi)__a, (__v16qi)__b, 8, 16+8, 9, 16+9, 10, 16+10, 11, 16+11, 12, 16+12, 13, 16+13, 14, 16+14, 15, 16+15);
4530 /// Unpacks the high-order (index 4-7) values from two 128-bit vectors of
4531 /// [8 x i16] and interleaves them into a 128-bit vector of [8 x i16].
4533 /// \headerfile <x86intrin.h>
4535 /// This intrinsic corresponds to the <c> VPUNPCKHWD / PUNPCKHWD </c>
4539 /// A 128-bit vector of [8 x i16].
4540 /// Bits [79:64] are written to bits [15:0] of the result. \n
4541 /// Bits [95:80] are written to bits [47:32] of the result. \n
4542 /// Bits [111:96] are written to bits [79:64] of the result. \n
4543 /// Bits [127:112] are written to bits [111:96] of the result.
4545 /// A 128-bit vector of [8 x i16].
4546 /// Bits [79:64] are written to bits [31:16] of the result. \n
4547 /// Bits [95:80] are written to bits [63:48] of the result. \n
4548 /// Bits [111:96] are written to bits [95:80] of the result. \n
4549 /// Bits [127:112] are written to bits [127:112] of the result.
4550 /// \returns A 128-bit vector of [8 x i16] containing the interleaved values.
4551 static __inline__ __m128i __DEFAULT_FN_ATTRS
4552 _mm_unpackhi_epi16(__m128i __a, __m128i __b)
4554 return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 4, 8+4, 5, 8+5, 6, 8+6, 7, 8+7);
4557 /// Unpacks the high-order (index 2,3) values from two 128-bit vectors of
4558 /// [4 x i32] and interleaves them into a 128-bit vector of [4 x i32].
4560 /// \headerfile <x86intrin.h>
4562 /// This intrinsic corresponds to the <c> VPUNPCKHDQ / PUNPCKHDQ </c>
4566 /// A 128-bit vector of [4 x i32]. \n
4567 /// Bits [95:64] are written to bits [31:0] of the destination. \n
4568 /// Bits [127:96] are written to bits [95:64] of the destination.
4570 /// A 128-bit vector of [4 x i32]. \n
4571 /// Bits [95:64] are written to bits [64:32] of the destination. \n
4572 /// Bits [127:96] are written to bits [127:96] of the destination.
4573 /// \returns A 128-bit vector of [4 x i32] containing the interleaved values.
4574 static __inline__ __m128i __DEFAULT_FN_ATTRS
4575 _mm_unpackhi_epi32(__m128i __a, __m128i __b)
4577 return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 2, 4+2, 3, 4+3);
4580 /// Unpacks the high-order 64-bit elements from two 128-bit vectors of
4581 /// [2 x i64] and interleaves them into a 128-bit vector of [2 x i64].
4583 /// \headerfile <x86intrin.h>
4585 /// This intrinsic corresponds to the <c> VPUNPCKHQDQ / PUNPCKHQDQ </c>
4589 /// A 128-bit vector of [2 x i64]. \n
4590 /// Bits [127:64] are written to bits [63:0] of the destination.
4592 /// A 128-bit vector of [2 x i64]. \n
4593 /// Bits [127:64] are written to bits [127:64] of the destination.
4594 /// \returns A 128-bit vector of [2 x i64] containing the interleaved values.
4595 static __inline__ __m128i __DEFAULT_FN_ATTRS
4596 _mm_unpackhi_epi64(__m128i __a, __m128i __b)
4598 return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 1, 2+1);
4601 /// Unpacks the low-order (index 0-7) values from two 128-bit vectors of
4602 /// [16 x i8] and interleaves them into a 128-bit vector of [16 x i8].
4604 /// \headerfile <x86intrin.h>
4606 /// This intrinsic corresponds to the <c> VPUNPCKLBW / PUNPCKLBW </c>
4610 /// A 128-bit vector of [16 x i8]. \n
4611 /// Bits [7:0] are written to bits [7:0] of the result. \n
4612 /// Bits [15:8] are written to bits [23:16] of the result. \n
4613 /// Bits [23:16] are written to bits [39:32] of the result. \n
4614 /// Bits [31:24] are written to bits [55:48] of the result. \n
4615 /// Bits [39:32] are written to bits [71:64] of the result. \n
4616 /// Bits [47:40] are written to bits [87:80] of the result. \n
4617 /// Bits [55:48] are written to bits [103:96] of the result. \n
4618 /// Bits [63:56] are written to bits [119:112] of the result.
4620 /// A 128-bit vector of [16 x i8].
4621 /// Bits [7:0] are written to bits [15:8] of the result. \n
4622 /// Bits [15:8] are written to bits [31:24] of the result. \n
4623 /// Bits [23:16] are written to bits [47:40] of the result. \n
4624 /// Bits [31:24] are written to bits [63:56] of the result. \n
4625 /// Bits [39:32] are written to bits [79:72] of the result. \n
4626 /// Bits [47:40] are written to bits [95:88] of the result. \n
4627 /// Bits [55:48] are written to bits [111:104] of the result. \n
4628 /// Bits [63:56] are written to bits [127:120] of the result.
4629 /// \returns A 128-bit vector of [16 x i8] containing the interleaved values.
4630 static __inline__ __m128i __DEFAULT_FN_ATTRS
4631 _mm_unpacklo_epi8(__m128i __a, __m128i __b)
4633 return (__m128i)__builtin_shufflevector((__v16qi)__a, (__v16qi)__b, 0, 16+0, 1, 16+1, 2, 16+2, 3, 16+3, 4, 16+4, 5, 16+5, 6, 16+6, 7, 16+7);
4636 /// Unpacks the low-order (index 0-3) values from each of the two 128-bit
4637 /// vectors of [8 x i16] and interleaves them into a 128-bit vector of
4640 /// \headerfile <x86intrin.h>
4642 /// This intrinsic corresponds to the <c> VPUNPCKLWD / PUNPCKLWD </c>
4646 /// A 128-bit vector of [8 x i16].
4647 /// Bits [15:0] are written to bits [15:0] of the result. \n
4648 /// Bits [31:16] are written to bits [47:32] of the result. \n
4649 /// Bits [47:32] are written to bits [79:64] of the result. \n
4650 /// Bits [63:48] are written to bits [111:96] of the result.
4652 /// A 128-bit vector of [8 x i16].
4653 /// Bits [15:0] are written to bits [31:16] of the result. \n
4654 /// Bits [31:16] are written to bits [63:48] of the result. \n
4655 /// Bits [47:32] are written to bits [95:80] of the result. \n
4656 /// Bits [63:48] are written to bits [127:112] of the result.
4657 /// \returns A 128-bit vector of [8 x i16] containing the interleaved values.
4658 static __inline__ __m128i __DEFAULT_FN_ATTRS
4659 _mm_unpacklo_epi16(__m128i __a, __m128i __b)
4661 return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 0, 8+0, 1, 8+1, 2, 8+2, 3, 8+3);
4664 /// Unpacks the low-order (index 0,1) values from two 128-bit vectors of
4665 /// [4 x i32] and interleaves them into a 128-bit vector of [4 x i32].
4667 /// \headerfile <x86intrin.h>
4669 /// This intrinsic corresponds to the <c> VPUNPCKLDQ / PUNPCKLDQ </c>
4673 /// A 128-bit vector of [4 x i32]. \n
4674 /// Bits [31:0] are written to bits [31:0] of the destination. \n
4675 /// Bits [63:32] are written to bits [95:64] of the destination.
4677 /// A 128-bit vector of [4 x i32]. \n
4678 /// Bits [31:0] are written to bits [64:32] of the destination. \n
4679 /// Bits [63:32] are written to bits [127:96] of the destination.
4680 /// \returns A 128-bit vector of [4 x i32] containing the interleaved values.
4681 static __inline__ __m128i __DEFAULT_FN_ATTRS
4682 _mm_unpacklo_epi32(__m128i __a, __m128i __b)
4684 return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 0, 4+0, 1, 4+1);
4687 /// Unpacks the low-order 64-bit elements from two 128-bit vectors of
4688 /// [2 x i64] and interleaves them into a 128-bit vector of [2 x i64].
4690 /// \headerfile <x86intrin.h>
4692 /// This intrinsic corresponds to the <c> VPUNPCKLQDQ / PUNPCKLQDQ </c>
4696 /// A 128-bit vector of [2 x i64]. \n
4697 /// Bits [63:0] are written to bits [63:0] of the destination. \n
4699 /// A 128-bit vector of [2 x i64]. \n
4700 /// Bits [63:0] are written to bits [127:64] of the destination. \n
4701 /// \returns A 128-bit vector of [2 x i64] containing the interleaved values.
4702 static __inline__ __m128i __DEFAULT_FN_ATTRS
4703 _mm_unpacklo_epi64(__m128i __a, __m128i __b)
4705 return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 0, 2+0);
4708 /// Returns the lower 64 bits of a 128-bit integer vector as a 64-bit
4711 /// \headerfile <x86intrin.h>
4713 /// This intrinsic corresponds to the <c> MOVDQ2Q </c> instruction.
4716 /// A 128-bit integer vector operand. The lower 64 bits are moved to the
4718 /// \returns A 64-bit integer containing the lower 64 bits of the parameter.
4719 static __inline__ __m64 __DEFAULT_FN_ATTRS
4720 _mm_movepi64_pi64(__m128i __a)
4722 return (__m64)__a[0];
4725 /// Moves the 64-bit operand to a 128-bit integer vector, zeroing the
4728 /// \headerfile <x86intrin.h>
4730 /// This intrinsic corresponds to the <c> MOVD+VMOVQ </c> instruction.
4734 /// \returns A 128-bit integer vector. The lower 64 bits contain the value from
4735 /// the operand. The upper 64 bits are assigned zeros.
4736 static __inline__ __m128i __DEFAULT_FN_ATTRS
4737 _mm_movpi64_epi64(__m64 __a)
4739 return __extension__ (__m128i)(__v2di){ (long long)__a, 0 };
4742 /// Moves the lower 64 bits of a 128-bit integer vector to a 128-bit
4743 /// integer vector, zeroing the upper bits.
4745 /// \headerfile <x86intrin.h>
4747 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
4750 /// A 128-bit integer vector operand. The lower 64 bits are moved to the
4752 /// \returns A 128-bit integer vector. The lower 64 bits contain the value from
4753 /// the operand. The upper 64 bits are assigned zeros.
4754 static __inline__ __m128i __DEFAULT_FN_ATTRS
4755 _mm_move_epi64(__m128i __a)
4757 return __builtin_shufflevector((__v2di)__a, _mm_setzero_si128(), 0, 2);
4760 /// Unpacks the high-order 64-bit elements from two 128-bit vectors of
4761 /// [2 x double] and interleaves them into a 128-bit vector of [2 x
4764 /// \headerfile <x86intrin.h>
4766 /// This intrinsic corresponds to the <c> VUNPCKHPD / UNPCKHPD </c> instruction.
4769 /// A 128-bit vector of [2 x double]. \n
4770 /// Bits [127:64] are written to bits [63:0] of the destination.
4772 /// A 128-bit vector of [2 x double]. \n
4773 /// Bits [127:64] are written to bits [127:64] of the destination.
4774 /// \returns A 128-bit vector of [2 x double] containing the interleaved values.
4775 static __inline__ __m128d __DEFAULT_FN_ATTRS
4776 _mm_unpackhi_pd(__m128d __a, __m128d __b)
4778 return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 1, 2+1);
4781 /// Unpacks the low-order 64-bit elements from two 128-bit vectors
4782 /// of [2 x double] and interleaves them into a 128-bit vector of [2 x
4785 /// \headerfile <x86intrin.h>
4787 /// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.
4790 /// A 128-bit vector of [2 x double]. \n
4791 /// Bits [63:0] are written to bits [63:0] of the destination.
4793 /// A 128-bit vector of [2 x double]. \n
4794 /// Bits [63:0] are written to bits [127:64] of the destination.
4795 /// \returns A 128-bit vector of [2 x double] containing the interleaved values.
4796 static __inline__ __m128d __DEFAULT_FN_ATTRS
4797 _mm_unpacklo_pd(__m128d __a, __m128d __b)
4799 return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 0, 2+0);
4802 /// Extracts the sign bits of the double-precision values in the 128-bit
4803 /// vector of [2 x double], zero-extends the value, and writes it to the
4804 /// low-order bits of the destination.
4806 /// \headerfile <x86intrin.h>
4808 /// This intrinsic corresponds to the <c> VMOVMSKPD / MOVMSKPD </c> instruction.
4811 /// A 128-bit vector of [2 x double] containing the values with sign bits to
4813 /// \returns The sign bits from each of the double-precision elements in \a __a,
4814 /// written to bits [1:0]. The remaining bits are assigned values of zero.
4815 static __inline__ int __DEFAULT_FN_ATTRS
4816 _mm_movemask_pd(__m128d __a)
4818 return __builtin_ia32_movmskpd((__v2df)__a);
4822 /// Constructs a 128-bit floating-point vector of [2 x double] from two
4823 /// 128-bit vector parameters of [2 x double], using the immediate-value
4824 /// parameter as a specifier.
4826 /// \headerfile <x86intrin.h>
4829 /// __m128d _mm_shuffle_pd(__m128d a, __m128d b, const int i);
4832 /// This intrinsic corresponds to the <c> VSHUFPD / SHUFPD </c> instruction.
4835 /// A 128-bit vector of [2 x double].
4837 /// A 128-bit vector of [2 x double].
4839 /// An 8-bit immediate value. The least significant two bits specify which
4840 /// elements to copy from \a a and \a b: \n
4841 /// Bit[0] = 0: lower element of \a a copied to lower element of result. \n
4842 /// Bit[0] = 1: upper element of \a a copied to lower element of result. \n
4843 /// Bit[1] = 0: lower element of \a b copied to upper element of result. \n
4844 /// Bit[1] = 1: upper element of \a b copied to upper element of result. \n
4845 /// \returns A 128-bit vector of [2 x double] containing the shuffled values.
4846 #define _mm_shuffle_pd(a, b, i) \
4847 (__m128d)__builtin_ia32_shufpd((__v2df)(__m128d)(a), (__v2df)(__m128d)(b), \
4850 /// Casts a 128-bit floating-point vector of [2 x double] into a 128-bit
4851 /// floating-point vector of [4 x float].
4853 /// \headerfile <x86intrin.h>
4855 /// This intrinsic has no corresponding instruction.
4858 /// A 128-bit floating-point vector of [2 x double].
4859 /// \returns A 128-bit floating-point vector of [4 x float] containing the same
4860 /// bitwise pattern as the parameter.
4861 static __inline__ __m128 __DEFAULT_FN_ATTRS
4862 _mm_castpd_ps(__m128d __a)
4867 /// Casts a 128-bit floating-point vector of [2 x double] into a 128-bit
4870 /// \headerfile <x86intrin.h>
4872 /// This intrinsic has no corresponding instruction.
4875 /// A 128-bit floating-point vector of [2 x double].
4876 /// \returns A 128-bit integer vector containing the same bitwise pattern as the
4878 static __inline__ __m128i __DEFAULT_FN_ATTRS
4879 _mm_castpd_si128(__m128d __a)
4881 return (__m128i)__a;
4884 /// Casts a 128-bit floating-point vector of [4 x float] into a 128-bit
4885 /// floating-point vector of [2 x double].
4887 /// \headerfile <x86intrin.h>
4889 /// This intrinsic has no corresponding instruction.
4892 /// A 128-bit floating-point vector of [4 x float].
4893 /// \returns A 128-bit floating-point vector of [2 x double] containing the same
4894 /// bitwise pattern as the parameter.
4895 static __inline__ __m128d __DEFAULT_FN_ATTRS
4896 _mm_castps_pd(__m128 __a)
4898 return (__m128d)__a;
4901 /// Casts a 128-bit floating-point vector of [4 x float] into a 128-bit
4904 /// \headerfile <x86intrin.h>
4906 /// This intrinsic has no corresponding instruction.
4909 /// A 128-bit floating-point vector of [4 x float].
4910 /// \returns A 128-bit integer vector containing the same bitwise pattern as the
4912 static __inline__ __m128i __DEFAULT_FN_ATTRS
4913 _mm_castps_si128(__m128 __a)
4915 return (__m128i)__a;
4918 /// Casts a 128-bit integer vector into a 128-bit floating-point vector
4921 /// \headerfile <x86intrin.h>
4923 /// This intrinsic has no corresponding instruction.
4926 /// A 128-bit integer vector.
4927 /// \returns A 128-bit floating-point vector of [4 x float] containing the same
4928 /// bitwise pattern as the parameter.
4929 static __inline__ __m128 __DEFAULT_FN_ATTRS
4930 _mm_castsi128_ps(__m128i __a)
4935 /// Casts a 128-bit integer vector into a 128-bit floating-point vector
4936 /// of [2 x double].
4938 /// \headerfile <x86intrin.h>
4940 /// This intrinsic has no corresponding instruction.
4943 /// A 128-bit integer vector.
4944 /// \returns A 128-bit floating-point vector of [2 x double] containing the same
4945 /// bitwise pattern as the parameter.
4946 static __inline__ __m128d __DEFAULT_FN_ATTRS
4947 _mm_castsi128_pd(__m128i __a)
4949 return (__m128d)__a;
4952 #if defined(__cplusplus)
4956 /// Indicates that a spin loop is being executed for the purposes of
4957 /// optimizing power consumption during the loop.
4959 /// \headerfile <x86intrin.h>
4961 /// This intrinsic corresponds to the <c> PAUSE </c> instruction.
4963 void _mm_pause(void);
4965 #if defined(__cplusplus)
4968 #undef __DEFAULT_FN_ATTRS
4969 #undef __DEFAULT_FN_ATTRS_MMX
4971 #define _MM_SHUFFLE2(x, y) (((x) << 1) | (y))
4973 #define _MM_DENORMALS_ZERO_ON (0x0040)
4974 #define _MM_DENORMALS_ZERO_OFF (0x0000)
4976 #define _MM_DENORMALS_ZERO_MASK (0x0040)
4978 #define _MM_GET_DENORMALS_ZERO_MODE() (_mm_getcsr() & _MM_DENORMALS_ZERO_MASK)
4979 #define _MM_SET_DENORMALS_ZERO_MODE(x) (_mm_setcsr((_mm_getcsr() & ~_MM_DENORMALS_ZERO_MASK) | (x)))
4981 #endif /* __EMMINTRIN_H */