1 //===-------------------------- DwarfInstructions.hpp ---------------------===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
8 // Processor specific interpretation of DWARF unwind info.
10 //===----------------------------------------------------------------------===//
12 #ifndef __DWARF_INSTRUCTIONS_HPP__
13 #define __DWARF_INSTRUCTIONS_HPP__
20 #include "Registers.hpp"
21 #include "DwarfParser.hpp"
28 /// DwarfInstructions maps abtract DWARF unwind instructions to a particular
30 template <typename A, typename R>
31 class DwarfInstructions {
33 typedef typename A::pint_t pint_t;
34 typedef typename A::sint_t sint_t;
36 static int stepWithDwarf(A &addressSpace, pint_t pc, pint_t fdeStart,
42 DW_X86_64_RET_ADDR = 16
49 typedef typename CFI_Parser<A>::RegisterLocation RegisterLocation;
50 typedef typename CFI_Parser<A>::PrologInfo PrologInfo;
51 typedef typename CFI_Parser<A>::FDE_Info FDE_Info;
52 typedef typename CFI_Parser<A>::CIE_Info CIE_Info;
54 static pint_t evaluateExpression(pint_t expression, A &addressSpace,
56 pint_t initialStackValue);
57 static pint_t getSavedRegister(A &addressSpace, const R ®isters,
58 pint_t cfa, const RegisterLocation &savedReg);
59 static double getSavedFloatRegister(A &addressSpace, const R ®isters,
60 pint_t cfa, const RegisterLocation &savedReg);
61 static v128 getSavedVectorRegister(A &addressSpace, const R ®isters,
62 pint_t cfa, const RegisterLocation &savedReg);
64 static pint_t getCFA(A &addressSpace, const PrologInfo &prolog,
66 if (prolog.cfaRegister != 0)
67 return (pint_t)((sint_t)registers.getRegister((int)prolog.cfaRegister) +
68 prolog.cfaRegisterOffset);
69 if (prolog.cfaExpression != 0)
70 return evaluateExpression((pint_t)prolog.cfaExpression, addressSpace,
72 assert(0 && "getCFA(): unknown location");
73 __builtin_unreachable();
78 template <typename A, typename R>
79 typename A::pint_t DwarfInstructions<A, R>::getSavedRegister(
80 A &addressSpace, const R ®isters, pint_t cfa,
81 const RegisterLocation &savedReg) {
82 switch (savedReg.location) {
83 case CFI_Parser<A>::kRegisterInCFA:
84 return (pint_t)addressSpace.getRegister(cfa + (pint_t)savedReg.value);
86 case CFI_Parser<A>::kRegisterAtExpression:
87 return (pint_t)addressSpace.getRegister(evaluateExpression(
88 (pint_t)savedReg.value, addressSpace, registers, cfa));
90 case CFI_Parser<A>::kRegisterIsExpression:
91 return evaluateExpression((pint_t)savedReg.value, addressSpace,
94 case CFI_Parser<A>::kRegisterInRegister:
95 return registers.getRegister((int)savedReg.value);
97 case CFI_Parser<A>::kRegisterUnused:
98 case CFI_Parser<A>::kRegisterOffsetFromCFA:
102 _LIBUNWIND_ABORT("unsupported restore location for register");
105 template <typename A, typename R>
106 double DwarfInstructions<A, R>::getSavedFloatRegister(
107 A &addressSpace, const R ®isters, pint_t cfa,
108 const RegisterLocation &savedReg) {
109 switch (savedReg.location) {
110 case CFI_Parser<A>::kRegisterInCFA:
111 return addressSpace.getDouble(cfa + (pint_t)savedReg.value);
113 case CFI_Parser<A>::kRegisterAtExpression:
114 return addressSpace.getDouble(
115 evaluateExpression((pint_t)savedReg.value, addressSpace,
118 case CFI_Parser<A>::kRegisterIsExpression:
119 case CFI_Parser<A>::kRegisterUnused:
120 case CFI_Parser<A>::kRegisterOffsetFromCFA:
121 case CFI_Parser<A>::kRegisterInRegister:
125 _LIBUNWIND_ABORT("unsupported restore location for float register");
128 template <typename A, typename R>
129 v128 DwarfInstructions<A, R>::getSavedVectorRegister(
130 A &addressSpace, const R ®isters, pint_t cfa,
131 const RegisterLocation &savedReg) {
132 switch (savedReg.location) {
133 case CFI_Parser<A>::kRegisterInCFA:
134 return addressSpace.getVector(cfa + (pint_t)savedReg.value);
136 case CFI_Parser<A>::kRegisterAtExpression:
137 return addressSpace.getVector(
138 evaluateExpression((pint_t)savedReg.value, addressSpace,
141 case CFI_Parser<A>::kRegisterIsExpression:
142 case CFI_Parser<A>::kRegisterUnused:
143 case CFI_Parser<A>::kRegisterOffsetFromCFA:
144 case CFI_Parser<A>::kRegisterInRegister:
148 _LIBUNWIND_ABORT("unsupported restore location for vector register");
151 template <typename A, typename R>
152 int DwarfInstructions<A, R>::stepWithDwarf(A &addressSpace, pint_t pc,
153 pint_t fdeStart, R ®isters) {
156 if (CFI_Parser<A>::decodeFDE(addressSpace, fdeStart, &fdeInfo,
159 if (CFI_Parser<A>::parseFDEInstructions(addressSpace, fdeInfo, cieInfo, pc,
160 R::getArch(), &prolog)) {
161 // get pointer to cfa (architecture specific)
162 pint_t cfa = getCFA(addressSpace, prolog, registers);
164 // restore registers that DWARF says were saved
165 R newRegisters = registers;
166 pint_t returnAddress = 0;
167 const int lastReg = R::lastDwarfRegNum();
168 assert(static_cast<int>(CFI_Parser<A>::kMaxRegisterNumber) >= lastReg &&
169 "register range too large");
170 assert(lastReg >= (int)cieInfo.returnAddressRegister &&
171 "register range does not contain return address register");
172 for (int i = 0; i <= lastReg; ++i) {
173 if (prolog.savedRegisters[i].location !=
174 CFI_Parser<A>::kRegisterUnused) {
175 if (registers.validFloatRegister(i))
176 newRegisters.setFloatRegister(
177 i, getSavedFloatRegister(addressSpace, registers, cfa,
178 prolog.savedRegisters[i]));
179 else if (registers.validVectorRegister(i))
180 newRegisters.setVectorRegister(
181 i, getSavedVectorRegister(addressSpace, registers, cfa,
182 prolog.savedRegisters[i]));
183 else if (i == (int)cieInfo.returnAddressRegister)
184 returnAddress = getSavedRegister(addressSpace, registers, cfa,
185 prolog.savedRegisters[i]);
186 else if (registers.validRegister(i))
187 newRegisters.setRegister(
188 i, getSavedRegister(addressSpace, registers, cfa,
189 prolog.savedRegisters[i]));
195 // By definition, the CFA is the stack pointer at the call site, so
196 // restoring SP means setting it to CFA.
197 newRegisters.setSP(cfa);
199 #if defined(_LIBUNWIND_TARGET_AARCH64)
200 // If the target is aarch64 then the return address may have been signed
201 // using the v8.3 pointer authentication extensions. The original
202 // return address needs to be authenticated before the return address is
203 // restored. autia1716 is used instead of autia as autia1716 assembles
204 // to a NOP on pre-v8.3a architectures.
205 if ((R::getArch() == REGISTERS_ARM64) &&
206 prolog.savedRegisters[UNW_ARM64_RA_SIGN_STATE].value) {
207 #if !defined(_LIBUNWIND_IS_NATIVE_ONLY)
208 return UNW_ECROSSRASIGNING;
210 register unsigned long long x17 __asm("x17") = returnAddress;
211 register unsigned long long x16 __asm("x16") = cfa;
213 // These are the autia1716/autib1716 instructions. The hint instructions
214 // are used here as gcc does not assemble autia1716/autib1716 for pre
216 if (cieInfo.addressesSignedWithBKey)
217 asm("hint 0xe" : "+r"(x17) : "r"(x16)); // autib1716
219 asm("hint 0xc" : "+r"(x17) : "r"(x16)); // autia1716
225 #if defined(_LIBUNWIND_TARGET_SPARC)
226 if (R::getArch() == REGISTERS_SPARC) {
227 // Skip call site instruction and delay slot
229 // Skip unimp instruction if function returns a struct
230 if ((addressSpace.get32(returnAddress) & 0xC1C00000) == 0)
235 #if defined(_LIBUNWIND_TARGET_PPC64)
236 #define PPC64_ELFV1_R2_LOAD_INST_ENCODING 0xe8410028u // ld r2,40(r1)
237 #define PPC64_ELFV1_R2_OFFSET 40
238 #define PPC64_ELFV2_R2_LOAD_INST_ENCODING 0xe8410018u // ld r2,24(r1)
239 #define PPC64_ELFV2_R2_OFFSET 24
240 // If the instruction at return address is a TOC (r2) restore,
241 // then r2 was saved and needs to be restored.
242 // ELFv2 ABI specifies that the TOC Pointer must be saved at SP + 24,
243 // while in ELFv1 ABI it is saved at SP + 40.
244 if (R::getArch() == REGISTERS_PPC64 && returnAddress != 0) {
245 pint_t sp = newRegisters.getRegister(UNW_REG_SP);
247 switch (addressSpace.get32(returnAddress)) {
248 case PPC64_ELFV1_R2_LOAD_INST_ENCODING:
249 r2 = addressSpace.get64(sp + PPC64_ELFV1_R2_OFFSET);
251 case PPC64_ELFV2_R2_LOAD_INST_ENCODING:
252 r2 = addressSpace.get64(sp + PPC64_ELFV2_R2_OFFSET);
256 newRegisters.setRegister(UNW_PPC64_R2, r2);
260 // Return address is address after call site instruction, so setting IP to
261 // that does simualates a return.
262 newRegisters.setIP(returnAddress);
264 // Simulate the step by replacing the register set with the new ones.
265 registers = newRegisters;
267 return UNW_STEP_SUCCESS;
270 return UNW_EBADFRAME;
273 template <typename A, typename R>
275 DwarfInstructions<A, R>::evaluateExpression(pint_t expression, A &addressSpace,
277 pint_t initialStackValue) {
278 const bool log = false;
279 pint_t p = expression;
280 pint_t expressionEnd = expression + 20; // temp, until len read
281 pint_t length = (pint_t)addressSpace.getULEB128(p, expressionEnd);
282 expressionEnd = p + length;
284 fprintf(stderr, "evaluateExpression(): length=%" PRIu64 "\n",
288 *(++sp) = initialStackValue;
290 while (p < expressionEnd) {
292 for (pint_t *t = sp; t > stack; --t) {
293 fprintf(stderr, "sp[] = 0x%" PRIx64 "\n", (uint64_t)(*t));
296 uint8_t opcode = addressSpace.get8(p++);
297 sint_t svalue, svalue2;
302 // push immediate address sized value
303 value = addressSpace.getP(p);
307 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
311 // pop stack, dereference, push result
313 *(++sp) = addressSpace.getP(value);
315 fprintf(stderr, "dereference 0x%" PRIx64 "\n", (uint64_t)value);
319 // push immediate 1 byte value
320 value = addressSpace.get8(p);
324 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
328 // push immediate 1 byte signed value
329 svalue = (int8_t) addressSpace.get8(p);
331 *(++sp) = (pint_t)svalue;
333 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)svalue);
337 // push immediate 2 byte value
338 value = addressSpace.get16(p);
342 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
346 // push immediate 2 byte signed value
347 svalue = (int16_t) addressSpace.get16(p);
349 *(++sp) = (pint_t)svalue;
351 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)svalue);
355 // push immediate 4 byte value
356 value = addressSpace.get32(p);
360 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
364 // push immediate 4 byte signed value
365 svalue = (int32_t)addressSpace.get32(p);
367 *(++sp) = (pint_t)svalue;
369 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)svalue);
373 // push immediate 8 byte value
374 value = (pint_t)addressSpace.get64(p);
378 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
382 // push immediate 8 byte signed value
383 value = (pint_t)addressSpace.get64(p);
387 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
391 // push immediate ULEB128 value
392 value = (pint_t)addressSpace.getULEB128(p, expressionEnd);
395 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
399 // push immediate SLEB128 value
400 svalue = (sint_t)addressSpace.getSLEB128(p, expressionEnd);
401 *(++sp) = (pint_t)svalue;
403 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)svalue);
411 fprintf(stderr, "duplicate top of stack\n");
418 fprintf(stderr, "pop top of stack\n");
426 fprintf(stderr, "duplicate second in stack\n");
431 reg = addressSpace.get8(p);
436 fprintf(stderr, "duplicate %d in stack\n", reg);
445 fprintf(stderr, "swap top of stack\n");
455 fprintf(stderr, "rotate top three of stack\n");
459 // pop stack, dereference, push result
461 *sp = *((pint_t*)value);
463 fprintf(stderr, "x-dereference 0x%" PRIx64 "\n", (uint64_t)value);
467 svalue = (sint_t)*sp;
469 *sp = (pint_t)(-svalue);
471 fprintf(stderr, "abs\n");
478 fprintf(stderr, "and\n");
482 svalue = (sint_t)(*sp--);
483 svalue2 = (sint_t)*sp;
484 *sp = (pint_t)(svalue2 / svalue);
486 fprintf(stderr, "div\n");
493 fprintf(stderr, "minus\n");
497 svalue = (sint_t)(*sp--);
498 svalue2 = (sint_t)*sp;
499 *sp = (pint_t)(svalue2 % svalue);
501 fprintf(stderr, "module\n");
505 svalue = (sint_t)(*sp--);
506 svalue2 = (sint_t)*sp;
507 *sp = (pint_t)(svalue2 * svalue);
509 fprintf(stderr, "mul\n");
515 fprintf(stderr, "neg\n");
519 svalue = (sint_t)(*sp);
520 *sp = (pint_t)(~svalue);
522 fprintf(stderr, "not\n");
529 fprintf(stderr, "or\n");
536 fprintf(stderr, "plus\n");
539 case DW_OP_plus_uconst:
540 // pop stack, add uelb128 constant, push result
541 *sp += static_cast<pint_t>(addressSpace.getULEB128(p, expressionEnd));
543 fprintf(stderr, "add constant\n");
550 fprintf(stderr, "shift left\n");
557 fprintf(stderr, "shift left\n");
562 svalue = (sint_t)*sp;
563 *sp = (pint_t)(svalue >> value);
565 fprintf(stderr, "shift left arithmetric\n");
572 fprintf(stderr, "xor\n");
576 svalue = (int16_t) addressSpace.get16(p);
578 p = (pint_t)((sint_t)p + svalue);
580 fprintf(stderr, "skip %" PRIu64 "\n", (uint64_t)svalue);
584 svalue = (int16_t) addressSpace.get16(p);
587 p = (pint_t)((sint_t)p + svalue);
589 fprintf(stderr, "bra %" PRIu64 "\n", (uint64_t)svalue);
594 *sp = (*sp == value);
596 fprintf(stderr, "eq\n");
601 *sp = (*sp >= value);
603 fprintf(stderr, "ge\n");
610 fprintf(stderr, "gt\n");
615 *sp = (*sp <= value);
617 fprintf(stderr, "le\n");
624 fprintf(stderr, "lt\n");
629 *sp = (*sp != value);
631 fprintf(stderr, "ne\n");
666 value = static_cast<pint_t>(opcode - DW_OP_lit0);
669 fprintf(stderr, "push literal 0x%" PRIx64 "\n", (uint64_t)value);
704 reg = static_cast<uint32_t>(opcode - DW_OP_reg0);
705 *(++sp) = registers.getRegister((int)reg);
707 fprintf(stderr, "push reg %d\n", reg);
711 reg = static_cast<uint32_t>(addressSpace.getULEB128(p, expressionEnd));
712 *(++sp) = registers.getRegister((int)reg);
714 fprintf(stderr, "push reg %d + 0x%" PRIx64 "\n", reg, (uint64_t)svalue);
749 reg = static_cast<uint32_t>(opcode - DW_OP_breg0);
750 svalue = (sint_t)addressSpace.getSLEB128(p, expressionEnd);
751 svalue += static_cast<sint_t>(registers.getRegister((int)reg));
752 *(++sp) = (pint_t)(svalue);
754 fprintf(stderr, "push reg %d + 0x%" PRIx64 "\n", reg, (uint64_t)svalue);
758 reg = static_cast<uint32_t>(addressSpace.getULEB128(p, expressionEnd));
759 svalue = (sint_t)addressSpace.getSLEB128(p, expressionEnd);
760 svalue += static_cast<sint_t>(registers.getRegister((int)reg));
761 *(++sp) = (pint_t)(svalue);
763 fprintf(stderr, "push reg %d + 0x%" PRIx64 "\n", reg, (uint64_t)svalue);
767 _LIBUNWIND_ABORT("DW_OP_fbreg not implemented");
771 _LIBUNWIND_ABORT("DW_OP_piece not implemented");
774 case DW_OP_deref_size:
775 // pop stack, dereference, push result
777 switch (addressSpace.get8(p++)) {
779 value = addressSpace.get8(value);
782 value = addressSpace.get16(value);
785 value = addressSpace.get32(value);
788 value = (pint_t)addressSpace.get64(value);
791 _LIBUNWIND_ABORT("DW_OP_deref_size with bad size");
795 fprintf(stderr, "sized dereference 0x%" PRIx64 "\n", (uint64_t)value);
798 case DW_OP_xderef_size:
800 case DW_OP_push_object_addres:
805 _LIBUNWIND_ABORT("DWARF opcode not implemented");
810 fprintf(stderr, "expression evaluates to 0x%" PRIx64 "\n", (uint64_t)*sp);
816 } // namespace libunwind
818 #endif // __DWARF_INSTRUCTIONS_HPP__