1 //===-------------------- UnwindRegistersRestore.S ------------------------===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
13 #if !defined(__USING_SJLJ_EXCEPTIONS__)
16 DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind13Registers_x866jumptoEv)
18 # void libunwind::Registers_x86::jumpto()
21 # On windows, the 'this' pointer is passed in ecx instead of on the stack
26 # +-----------------------+
27 # + thread_state pointer +
28 # +-----------------------+
30 # +-----------------------+ <-- SP
34 # set up eax and ret on new stack location
35 movl 28(%eax), %edx # edx holds new stack pointer
42 # we now have ret and eax pushed onto where new stack will be
43 # restore all registers
53 pop %eax # eax was already pushed on new stack
54 ret # eip was already pushed on new stack
61 #elif defined(__x86_64__)
63 DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind16Registers_x86_646jumptoEv)
65 # void libunwind::Registers_x86_64::jumpto()
68 # On entry, thread_state pointer is in rcx; move it into rdi
69 # to share restore code below. Since this routine restores and
70 # overwrites all registers, we can use the same registers for
71 # pointers and temporaries as on unix even though win64 normally
72 # mustn't clobber some of them.
75 # On entry, thread_state pointer is in rdi
78 movq 56(%rdi), %rax # rax holds new stack pointer
81 movq 32(%rdi), %rbx # store new rdi on new stack
83 movq 128(%rdi), %rbx # store new rip on new stack
85 # restore all registers
108 movdqu 176(%rdi),%xmm0
109 movdqu 192(%rdi),%xmm1
110 movdqu 208(%rdi),%xmm2
111 movdqu 224(%rdi),%xmm3
112 movdqu 240(%rdi),%xmm4
113 movdqu 256(%rdi),%xmm5
114 movdqu 272(%rdi),%xmm6
115 movdqu 288(%rdi),%xmm7
116 movdqu 304(%rdi),%xmm8
117 movdqu 320(%rdi),%xmm9
118 movdqu 336(%rdi),%xmm10
119 movdqu 352(%rdi),%xmm11
120 movdqu 368(%rdi),%xmm12
121 movdqu 384(%rdi),%xmm13
122 movdqu 400(%rdi),%xmm14
123 movdqu 416(%rdi),%xmm15
125 movq 56(%rdi), %rsp # cut back rsp to new location
126 pop %rdi # rdi was saved here earlier
127 ret # rip was saved here
130 #elif defined(__powerpc64__)
132 DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind15Registers_ppc646jumptoEv)
134 // void libunwind::Registers_ppc64::jumpto()
137 // thread_state pointer is in r3
140 // load register (GPR)
141 #define PPC64_LR(n) \
142 ld %r##n, (8 * (n + 2))(%r3)
144 // restore integral registers
180 // restore VS registers
181 // (note that this also restores floating point registers and V registers,
182 // because part of VS is mapped to these registers)
184 addi %r4, %r3, PPC64_OFFS_FP
187 #define PPC64_LVS(n) \
188 lxvd2x %vs##n, 0, %r4 ;\
191 // restore the first 32 VS regs (and also all floating point regs)
225 // use VRSAVE to conditionally restore the remaining VS regs,
226 // that are where the V regs are mapped
228 ld %r5, PPC64_OFFS_VRSAVE(%r3) // test VRsave
232 // conditionally load VS
233 #define PPC64_CLVS_BOTTOM(n) \
235 addi %r4, %r3, PPC64_OFFS_FP + n * 16 ;\
236 lxvd2x %vs##n, 0, %r4 ;\
239 #define PPC64_CLVSl(n) \
240 andis. %r0, %r5, (1<<(47-n)) ;\
243 #define PPC64_CLVSh(n) \
244 andi. %r0, %r5, (1<<(63-n)) ;\
283 #define PPC64_LF(n) \
284 lfd %f##n, (PPC64_OFFS_FP + n * 16)(%r3)
286 // restore float registers
320 // restore vector registers if any are in use
321 ld %r5, PPC64_OFFS_VRSAVE(%r3) // test VRsave
326 // r4 is now a 16-byte aligned pointer into the red zone
327 // the _vectorScalarRegisters may not be 16-byte aligned
328 // so copy via red zone temp buffer
330 #define PPC64_CLV_UNALIGNED_BOTTOM(n) \
332 ld %r0, (PPC64_OFFS_V + n * 16)(%r3) ;\
334 ld %r0, (PPC64_OFFS_V + n * 16 + 8)(%r3) ;\
339 #define PPC64_CLV_UNALIGNEDl(n) \
340 andis. %r0, %r5, (1<<(15-n)) ;\
341 PPC64_CLV_UNALIGNED_BOTTOM(n)
343 #define PPC64_CLV_UNALIGNEDh(n) \
344 andi. %r0, %r5, (1<<(31-n)) ;\
345 PPC64_CLV_UNALIGNED_BOTTOM(n)
347 PPC64_CLV_UNALIGNEDl(0)
348 PPC64_CLV_UNALIGNEDl(1)
349 PPC64_CLV_UNALIGNEDl(2)
350 PPC64_CLV_UNALIGNEDl(3)
351 PPC64_CLV_UNALIGNEDl(4)
352 PPC64_CLV_UNALIGNEDl(5)
353 PPC64_CLV_UNALIGNEDl(6)
354 PPC64_CLV_UNALIGNEDl(7)
355 PPC64_CLV_UNALIGNEDl(8)
356 PPC64_CLV_UNALIGNEDl(9)
357 PPC64_CLV_UNALIGNEDl(10)
358 PPC64_CLV_UNALIGNEDl(11)
359 PPC64_CLV_UNALIGNEDl(12)
360 PPC64_CLV_UNALIGNEDl(13)
361 PPC64_CLV_UNALIGNEDl(14)
362 PPC64_CLV_UNALIGNEDl(15)
363 PPC64_CLV_UNALIGNEDh(16)
364 PPC64_CLV_UNALIGNEDh(17)
365 PPC64_CLV_UNALIGNEDh(18)
366 PPC64_CLV_UNALIGNEDh(19)
367 PPC64_CLV_UNALIGNEDh(20)
368 PPC64_CLV_UNALIGNEDh(21)
369 PPC64_CLV_UNALIGNEDh(22)
370 PPC64_CLV_UNALIGNEDh(23)
371 PPC64_CLV_UNALIGNEDh(24)
372 PPC64_CLV_UNALIGNEDh(25)
373 PPC64_CLV_UNALIGNEDh(26)
374 PPC64_CLV_UNALIGNEDh(27)
375 PPC64_CLV_UNALIGNEDh(28)
376 PPC64_CLV_UNALIGNEDh(29)
377 PPC64_CLV_UNALIGNEDh(30)
378 PPC64_CLV_UNALIGNEDh(31)
383 ld %r0, PPC64_OFFS_CR(%r3)
385 ld %r0, PPC64_OFFS_SRR0(%r3)
395 #elif defined(__ppc__)
397 DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind13Registers_ppc6jumptoEv)
399 // void libunwind::Registers_ppc::jumpto()
402 // thread_state pointer is in r3
405 // restore integral registerrs
439 // restore float registers
473 // restore vector registers if any are in use
474 lwz %r5, 156(%r3) // test VRsave
479 rlwinm %r4, %r4, 0, 0, 27 // mask low 4-bits
480 // r4 is now a 16-byte aligned pointer into the red zone
481 // the _vectorRegisters may not be 16-byte aligned so copy via red zone temp buffer
484 #define LOAD_VECTOR_UNALIGNEDl(_index) \
485 andis. %r0, %r5, (1<<(15-_index)) SEPARATOR \
486 beq Ldone ## _index SEPARATOR \
487 lwz %r0, 424+_index*16(%r3) SEPARATOR \
488 stw %r0, 0(%r4) SEPARATOR \
489 lwz %r0, 424+_index*16+4(%r3) SEPARATOR \
490 stw %r0, 4(%r4) SEPARATOR \
491 lwz %r0, 424+_index*16+8(%r3) SEPARATOR \
492 stw %r0, 8(%r4) SEPARATOR \
493 lwz %r0, 424+_index*16+12(%r3) SEPARATOR \
494 stw %r0, 12(%r4) SEPARATOR \
495 lvx %v ## _index, 0, %r4 SEPARATOR \
498 #define LOAD_VECTOR_UNALIGNEDh(_index) \
499 andi. %r0, %r5, (1<<(31-_index)) SEPARATOR \
500 beq Ldone ## _index SEPARATOR \
501 lwz %r0, 424+_index*16(%r3) SEPARATOR \
502 stw %r0, 0(%r4) SEPARATOR \
503 lwz %r0, 424+_index*16+4(%r3) SEPARATOR \
504 stw %r0, 4(%r4) SEPARATOR \
505 lwz %r0, 424+_index*16+8(%r3) SEPARATOR \
506 stw %r0, 8(%r4) SEPARATOR \
507 lwz %r0, 424+_index*16+12(%r3) SEPARATOR \
508 stw %r0, 12(%r4) SEPARATOR \
509 lvx %v ## _index, 0, %r4 SEPARATOR \
513 LOAD_VECTOR_UNALIGNEDl(0)
514 LOAD_VECTOR_UNALIGNEDl(1)
515 LOAD_VECTOR_UNALIGNEDl(2)
516 LOAD_VECTOR_UNALIGNEDl(3)
517 LOAD_VECTOR_UNALIGNEDl(4)
518 LOAD_VECTOR_UNALIGNEDl(5)
519 LOAD_VECTOR_UNALIGNEDl(6)
520 LOAD_VECTOR_UNALIGNEDl(7)
521 LOAD_VECTOR_UNALIGNEDl(8)
522 LOAD_VECTOR_UNALIGNEDl(9)
523 LOAD_VECTOR_UNALIGNEDl(10)
524 LOAD_VECTOR_UNALIGNEDl(11)
525 LOAD_VECTOR_UNALIGNEDl(12)
526 LOAD_VECTOR_UNALIGNEDl(13)
527 LOAD_VECTOR_UNALIGNEDl(14)
528 LOAD_VECTOR_UNALIGNEDl(15)
529 LOAD_VECTOR_UNALIGNEDh(16)
530 LOAD_VECTOR_UNALIGNEDh(17)
531 LOAD_VECTOR_UNALIGNEDh(18)
532 LOAD_VECTOR_UNALIGNEDh(19)
533 LOAD_VECTOR_UNALIGNEDh(20)
534 LOAD_VECTOR_UNALIGNEDh(21)
535 LOAD_VECTOR_UNALIGNEDh(22)
536 LOAD_VECTOR_UNALIGNEDh(23)
537 LOAD_VECTOR_UNALIGNEDh(24)
538 LOAD_VECTOR_UNALIGNEDh(25)
539 LOAD_VECTOR_UNALIGNEDh(26)
540 LOAD_VECTOR_UNALIGNEDh(27)
541 LOAD_VECTOR_UNALIGNEDh(28)
542 LOAD_VECTOR_UNALIGNEDh(29)
543 LOAD_VECTOR_UNALIGNEDh(30)
544 LOAD_VECTOR_UNALIGNEDh(31)
547 lwz %r0, 136(%r3) // __cr
549 lwz %r0, 148(%r3) // __ctr
551 lwz %r0, 0(%r3) // __ssr0
553 lwz %r0, 8(%r3) // do r0 now
554 lwz %r5, 28(%r3) // do r5 now
555 lwz %r4, 24(%r3) // do r4 now
556 lwz %r1, 12(%r3) // do sp now
557 lwz %r3, 20(%r3) // do r3 last
560 #elif defined(__arm64__) || defined(__aarch64__)
563 // void libunwind::Registers_arm64::jumpto()
566 // thread_state pointer is in x0
569 DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind15Registers_arm646jumptoEv)
570 // skip restore of x0,x1 for now
571 ldp x2, x3, [x0, #0x010]
572 ldp x4, x5, [x0, #0x020]
573 ldp x6, x7, [x0, #0x030]
574 ldp x8, x9, [x0, #0x040]
575 ldp x10,x11, [x0, #0x050]
576 ldp x12,x13, [x0, #0x060]
577 ldp x14,x15, [x0, #0x070]
578 // x16 and x17 were clobbered by the call into the unwinder, so no point in
580 ldp x18,x19, [x0, #0x090]
581 ldp x20,x21, [x0, #0x0A0]
582 ldp x22,x23, [x0, #0x0B0]
583 ldp x24,x25, [x0, #0x0C0]
584 ldp x26,x27, [x0, #0x0D0]
585 ldp x28,x29, [x0, #0x0E0]
586 ldr x30, [x0, #0x100] // restore pc into lr
588 ldp d0, d1, [x0, #0x110]
589 ldp d2, d3, [x0, #0x120]
590 ldp d4, d5, [x0, #0x130]
591 ldp d6, d7, [x0, #0x140]
592 ldp d8, d9, [x0, #0x150]
593 ldp d10,d11, [x0, #0x160]
594 ldp d12,d13, [x0, #0x170]
595 ldp d14,d15, [x0, #0x180]
596 ldp d16,d17, [x0, #0x190]
597 ldp d18,d19, [x0, #0x1A0]
598 ldp d20,d21, [x0, #0x1B0]
599 ldp d22,d23, [x0, #0x1C0]
600 ldp d24,d25, [x0, #0x1D0]
601 ldp d26,d27, [x0, #0x1E0]
602 ldp d28,d29, [x0, #0x1F0]
603 ldr d30, [x0, #0x200]
604 ldr d31, [x0, #0x208]
606 // Finally, restore sp. This must be done after the the last read from the
607 // context struct, because it is allocated on the stack, and an exception
608 // could clobber the de-allocated portion of the stack after sp has been
610 ldr x16, [x0, #0x0F8]
611 ldp x0, x1, [x0, #0x000] // restore x0,x1
612 mov sp,x16 // restore sp
613 ret x30 // jump to pc
615 #elif defined(__arm__) && !defined(__APPLE__)
617 #if !defined(__ARM_ARCH_ISA_ARM)
618 #if (__ARM_ARCH_ISA_THUMB == 2)
625 @ void libunwind::Registers_arm::restoreCoreAndJumpTo()
628 @ thread_state pointer is in r0
631 DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind13Registers_arm20restoreCoreAndJumpToEv)
632 #if !defined(__ARM_ARCH_ISA_ARM) && __ARM_ARCH_ISA_THUMB == 1
633 @ r8-r11: ldm into r1-r4, then mov to r8-r11
641 @ r12 does not need loading, it it the intra-procedure-call scratch register
645 mov lr, r3 @ restore pc into lr
648 @ Use lr as base so that r0 can be restored.
650 @ 32bit thumb-2 restrictions for ldm:
651 @ . the sp (r13) cannot be in the list
652 @ . the pc (r15) and lr (r14) cannot both be in the list in an LDM instruction
655 ldr lr, [lr, #60] @ restore pc into lr
660 @ static void libunwind::Registers_arm::restoreVFPWithFLDMD(unw_fpreg_t* values)
663 @ values pointer is in r0
669 DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind13Registers_arm19restoreVFPWithFLDMDEPv)
670 @ VFP and iwMMX instructions are only available when compiling with the flags
671 @ that enable them. We do not want to do that in the library (because we do not
672 @ want the compiler to generate instructions that access those) but this is
673 @ only accessed if the personality routine needs these registers. Use of
674 @ these registers implies they are, actually, available on the target, so
675 @ it's ok to execute.
676 @ So, generate the instruction using the corresponding coprocessor mnemonic.
681 @ static void libunwind::Registers_arm::restoreVFPWithFLDMX(unw_fpreg_t* values)
684 @ values pointer is in r0
690 DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind13Registers_arm19restoreVFPWithFLDMXEPv)
691 vldmia r0, {d0-d15} @ fldmiax is deprecated in ARMv7+ and now behaves like vldmia
695 @ static void libunwind::Registers_arm::restoreVFPv3(unw_fpreg_t* values)
698 @ values pointer is in r0
704 DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind13Registers_arm12restoreVFPv3EPv)
708 #if defined(__ARM_WMMX)
711 @ static void libunwind::Registers_arm::restoreiWMMX(unw_fpreg_t* values)
714 @ values pointer is in r0
720 DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind13Registers_arm12restoreiWMMXEPv)
721 ldcl p1, cr0, [r0], #8 @ wldrd wR0, [r0], #8
722 ldcl p1, cr1, [r0], #8 @ wldrd wR1, [r0], #8
723 ldcl p1, cr2, [r0], #8 @ wldrd wR2, [r0], #8
724 ldcl p1, cr3, [r0], #8 @ wldrd wR3, [r0], #8
725 ldcl p1, cr4, [r0], #8 @ wldrd wR4, [r0], #8
726 ldcl p1, cr5, [r0], #8 @ wldrd wR5, [r0], #8
727 ldcl p1, cr6, [r0], #8 @ wldrd wR6, [r0], #8
728 ldcl p1, cr7, [r0], #8 @ wldrd wR7, [r0], #8
729 ldcl p1, cr8, [r0], #8 @ wldrd wR8, [r0], #8
730 ldcl p1, cr9, [r0], #8 @ wldrd wR9, [r0], #8
731 ldcl p1, cr10, [r0], #8 @ wldrd wR10, [r0], #8
732 ldcl p1, cr11, [r0], #8 @ wldrd wR11, [r0], #8
733 ldcl p1, cr12, [r0], #8 @ wldrd wR12, [r0], #8
734 ldcl p1, cr13, [r0], #8 @ wldrd wR13, [r0], #8
735 ldcl p1, cr14, [r0], #8 @ wldrd wR14, [r0], #8
736 ldcl p1, cr15, [r0], #8 @ wldrd wR15, [r0], #8
740 @ static void libunwind::Registers_arm::restoreiWMMXControl(unw_uint32_t* values)
743 @ values pointer is in r0
749 DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind13Registers_arm19restoreiWMMXControlEPj)
750 ldc2 p1, cr8, [r0], #4 @ wldrw wCGR0, [r0], #4
751 ldc2 p1, cr9, [r0], #4 @ wldrw wCGR1, [r0], #4
752 ldc2 p1, cr10, [r0], #4 @ wldrw wCGR2, [r0], #4
753 ldc2 p1, cr11, [r0], #4 @ wldrw wCGR3, [r0], #4
758 #elif defined(__or1k__)
760 DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind14Registers_or1k6jumptoEv)
762 # void libunwind::Registers_or1k::jumpto()
765 # thread_state pointer is in r3
768 # restore integral registers
802 # at last, restore r3
805 # load new pc into ra
811 #elif defined(__riscv)
814 // void libunwind::Registers_riscv::jumpto()
817 // thread_state pointer is in a0
820 DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind15Registers_riscv6jumptoEv)
821 #ifdef __riscv_float_abi_double
822 fld f0, (8 * 32 + 8 * 0)(a0)
823 fld f1, (8 * 32 + 8 * 1)(a0)
824 fld f2, (8 * 32 + 8 * 2)(a0)
825 fld f3, (8 * 32 + 8 * 3)(a0)
826 fld f4, (8 * 32 + 8 * 4)(a0)
827 fld f5, (8 * 32 + 8 * 5)(a0)
828 fld f6, (8 * 32 + 8 * 6)(a0)
829 fld f7, (8 * 32 + 8 * 7)(a0)
830 fld f8, (8 * 32 + 8 * 8)(a0)
831 fld f9, (8 * 32 + 8 * 9)(a0)
832 fld f10, (8 * 32 + 8 * 10)(a0)
833 fld f11, (8 * 32 + 8 * 11)(a0)
834 fld f12, (8 * 32 + 8 * 12)(a0)
835 fld f13, (8 * 32 + 8 * 13)(a0)
836 fld f14, (8 * 32 + 8 * 14)(a0)
837 fld f15, (8 * 32 + 8 * 15)(a0)
838 fld f16, (8 * 32 + 8 * 16)(a0)
839 fld f17, (8 * 32 + 8 * 17)(a0)
840 fld f18, (8 * 32 + 8 * 18)(a0)
841 fld f19, (8 * 32 + 8 * 19)(a0)
842 fld f20, (8 * 32 + 8 * 20)(a0)
843 fld f21, (8 * 32 + 8 * 21)(a0)
844 fld f22, (8 * 32 + 8 * 22)(a0)
845 fld f23, (8 * 32 + 8 * 23)(a0)
846 fld f24, (8 * 32 + 8 * 24)(a0)
847 fld f25, (8 * 32 + 8 * 25)(a0)
848 fld f26, (8 * 32 + 8 * 26)(a0)
849 fld f27, (8 * 32 + 8 * 27)(a0)
850 fld f28, (8 * 32 + 8 * 28)(a0)
851 fld f29, (8 * 32 + 8 * 29)(a0)
852 fld f30, (8 * 32 + 8 * 30)(a0)
853 fld f31, (8 * 32 + 8 * 31)(a0)
888 ld x10, (8 * 10)(a0) // restore a0
892 #elif defined(__mips__) && defined(_ABIO32) && _MIPS_SIM == _ABIO32
895 // void libunwind::Registers_mips_o32::jumpto()
898 // thread state pointer is in a0 ($4)
900 DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind18Registers_mips_o326jumptoEv)
905 #ifdef __mips_hard_float
907 ldc1 $f0, (4 * 36 + 8 * 0)($4)
908 ldc1 $f2, (4 * 36 + 8 * 2)($4)
909 ldc1 $f4, (4 * 36 + 8 * 4)($4)
910 ldc1 $f6, (4 * 36 + 8 * 6)($4)
911 ldc1 $f8, (4 * 36 + 8 * 8)($4)
912 ldc1 $f10, (4 * 36 + 8 * 10)($4)
913 ldc1 $f12, (4 * 36 + 8 * 12)($4)
914 ldc1 $f14, (4 * 36 + 8 * 14)($4)
915 ldc1 $f16, (4 * 36 + 8 * 16)($4)
916 ldc1 $f18, (4 * 36 + 8 * 18)($4)
917 ldc1 $f20, (4 * 36 + 8 * 20)($4)
918 ldc1 $f22, (4 * 36 + 8 * 22)($4)
919 ldc1 $f24, (4 * 36 + 8 * 24)($4)
920 ldc1 $f26, (4 * 36 + 8 * 26)($4)
921 ldc1 $f28, (4 * 36 + 8 * 28)($4)
922 ldc1 $f30, (4 * 36 + 8 * 30)($4)
924 ldc1 $f0, (4 * 36 + 8 * 0)($4)
925 ldc1 $f1, (4 * 36 + 8 * 1)($4)
926 ldc1 $f2, (4 * 36 + 8 * 2)($4)
927 ldc1 $f3, (4 * 36 + 8 * 3)($4)
928 ldc1 $f4, (4 * 36 + 8 * 4)($4)
929 ldc1 $f5, (4 * 36 + 8 * 5)($4)
930 ldc1 $f6, (4 * 36 + 8 * 6)($4)
931 ldc1 $f7, (4 * 36 + 8 * 7)($4)
932 ldc1 $f8, (4 * 36 + 8 * 8)($4)
933 ldc1 $f9, (4 * 36 + 8 * 9)($4)
934 ldc1 $f10, (4 * 36 + 8 * 10)($4)
935 ldc1 $f11, (4 * 36 + 8 * 11)($4)
936 ldc1 $f12, (4 * 36 + 8 * 12)($4)
937 ldc1 $f13, (4 * 36 + 8 * 13)($4)
938 ldc1 $f14, (4 * 36 + 8 * 14)($4)
939 ldc1 $f15, (4 * 36 + 8 * 15)($4)
940 ldc1 $f16, (4 * 36 + 8 * 16)($4)
941 ldc1 $f17, (4 * 36 + 8 * 17)($4)
942 ldc1 $f18, (4 * 36 + 8 * 18)($4)
943 ldc1 $f19, (4 * 36 + 8 * 19)($4)
944 ldc1 $f20, (4 * 36 + 8 * 20)($4)
945 ldc1 $f21, (4 * 36 + 8 * 21)($4)
946 ldc1 $f22, (4 * 36 + 8 * 22)($4)
947 ldc1 $f23, (4 * 36 + 8 * 23)($4)
948 ldc1 $f24, (4 * 36 + 8 * 24)($4)
949 ldc1 $f25, (4 * 36 + 8 * 25)($4)
950 ldc1 $f26, (4 * 36 + 8 * 26)($4)
951 ldc1 $f27, (4 * 36 + 8 * 27)($4)
952 ldc1 $f28, (4 * 36 + 8 * 28)($4)
953 ldc1 $f29, (4 * 36 + 8 * 29)($4)
954 ldc1 $f30, (4 * 36 + 8 * 30)($4)
955 ldc1 $f31, (4 * 36 + 8 * 31)($4)
994 // load new pc into ra
996 // jump to ra, load a0 in the delay slot
1001 #elif defined(__mips64)
1004 // void libunwind::Registers_mips_newabi::jumpto()
1007 // thread state pointer is in a0 ($4)
1009 DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind21Registers_mips_newabi6jumptoEv)
1014 #ifdef __mips_hard_float
1015 ldc1 $f0, (8 * 35)($4)
1016 ldc1 $f1, (8 * 36)($4)
1017 ldc1 $f2, (8 * 37)($4)
1018 ldc1 $f3, (8 * 38)($4)
1019 ldc1 $f4, (8 * 39)($4)
1020 ldc1 $f5, (8 * 40)($4)
1021 ldc1 $f6, (8 * 41)($4)
1022 ldc1 $f7, (8 * 42)($4)
1023 ldc1 $f8, (8 * 43)($4)
1024 ldc1 $f9, (8 * 44)($4)
1025 ldc1 $f10, (8 * 45)($4)
1026 ldc1 $f11, (8 * 46)($4)
1027 ldc1 $f12, (8 * 47)($4)
1028 ldc1 $f13, (8 * 48)($4)
1029 ldc1 $f14, (8 * 49)($4)
1030 ldc1 $f15, (8 * 50)($4)
1031 ldc1 $f16, (8 * 51)($4)
1032 ldc1 $f17, (8 * 52)($4)
1033 ldc1 $f18, (8 * 53)($4)
1034 ldc1 $f19, (8 * 54)($4)
1035 ldc1 $f20, (8 * 55)($4)
1036 ldc1 $f21, (8 * 56)($4)
1037 ldc1 $f22, (8 * 57)($4)
1038 ldc1 $f23, (8 * 58)($4)
1039 ldc1 $f24, (8 * 59)($4)
1040 ldc1 $f25, (8 * 60)($4)
1041 ldc1 $f26, (8 * 61)($4)
1042 ldc1 $f27, (8 * 62)($4)
1043 ldc1 $f28, (8 * 63)($4)
1044 ldc1 $f29, (8 * 64)($4)
1045 ldc1 $f30, (8 * 65)($4)
1046 ldc1 $f31, (8 * 66)($4)
1048 // restore hi and lo
1063 ld $10, (8 * 10)($4)
1064 ld $11, (8 * 11)($4)
1065 ld $12, (8 * 12)($4)
1066 ld $13, (8 * 13)($4)
1067 ld $14, (8 * 14)($4)
1068 ld $15, (8 * 15)($4)
1069 ld $16, (8 * 16)($4)
1070 ld $17, (8 * 17)($4)
1071 ld $18, (8 * 18)($4)
1072 ld $19, (8 * 19)($4)
1073 ld $20, (8 * 20)($4)
1074 ld $21, (8 * 21)($4)
1075 ld $22, (8 * 22)($4)
1076 ld $23, (8 * 23)($4)
1077 ld $24, (8 * 24)($4)
1078 ld $25, (8 * 25)($4)
1079 ld $26, (8 * 26)($4)
1080 ld $27, (8 * 27)($4)
1081 ld $28, (8 * 28)($4)
1082 ld $29, (8 * 29)($4)
1083 ld $30, (8 * 30)($4)
1084 // load new pc into ra
1085 ld $31, (8 * 32)($4)
1086 // jump to ra, load a0 in the delay slot
1091 #elif defined(__sparc__)
1094 // void libunwind::Registers_sparc_o32::jumpto()
1097 // thread_state pointer is in o0
1099 DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind15Registers_sparc6jumptoEv)
1106 ldd [%o0 + 104], %i2
1107 ldd [%o0 + 112], %i4
1108 ldd [%o0 + 120], %i6
1115 #endif /* !defined(__USING_SJLJ_EXCEPTIONS__) */
1117 NO_EXEC_STACK_DIRECTIVE