1 //===-- ARMUtils.h ----------------------------------------------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 #ifndef lldb_ARMUtils_h_
10 #define lldb_ARMUtils_h_
12 #include "ARMDefines.h"
13 #include "InstructionUtils.h"
14 #include "llvm/Support/MathExtras.h"
16 // Common utilities for the ARM/Thumb Instruction Set Architecture.
18 namespace lldb_private {
20 static inline uint32_t Align(uint32_t val, uint32_t alignment) {
21 return alignment * (val / alignment);
24 static inline uint32_t DecodeImmShift(const uint32_t type, const uint32_t imm5,
25 ARM_ShifterType &shift_t) {
28 // assert(0 && "Invalid shift type");
34 return (imm5 == 0 ? 32 : imm5);
37 return (imm5 == 0 ? 32 : imm5);
47 shift_t = SRType_Invalid;
51 // A8.6.35 CMP (register) -- Encoding T3
52 // Convenience function.
53 static inline uint32_t DecodeImmShiftThumb(const uint32_t opcode,
54 ARM_ShifterType &shift_t) {
55 return DecodeImmShift(Bits32(opcode, 5, 4),
56 Bits32(opcode, 14, 12) << 2 | Bits32(opcode, 7, 6),
60 // A8.6.35 CMP (register) -- Encoding A1
61 // Convenience function.
62 static inline uint32_t DecodeImmShiftARM(const uint32_t opcode,
63 ARM_ShifterType &shift_t) {
64 return DecodeImmShift(Bits32(opcode, 6, 5), Bits32(opcode, 11, 7), shift_t);
67 static inline uint32_t DecodeImmShift(const ARM_ShifterType shift_t,
68 const uint32_t imm5) {
69 ARM_ShifterType dont_care;
70 return DecodeImmShift(shift_t, imm5, dont_care);
73 static inline ARM_ShifterType DecodeRegShift(const uint32_t type) {
76 // assert(0 && "Invalid shift type");
77 return SRType_Invalid;
89 static inline uint32_t LSL_C(const uint32_t value, const uint32_t amount,
90 uint32_t &carry_out, bool *success) {
96 carry_out = amount <= 32 ? Bit32(value, 32 - amount) : 0;
97 return value << amount;
100 static inline uint32_t LSL(const uint32_t value, const uint32_t amount,
106 uint32_t result = LSL_C(value, amount, dont_care, success);
113 static inline uint32_t LSR_C(const uint32_t value, const uint32_t amount,
114 uint32_t &carry_out, bool *success) {
120 carry_out = amount <= 32 ? Bit32(value, amount - 1) : 0;
121 return value >> amount;
124 static inline uint32_t LSR(const uint32_t value, const uint32_t amount,
130 uint32_t result = LSR_C(value, amount, dont_care, success);
137 static inline uint32_t ASR_C(const uint32_t value, const uint32_t amount,
138 uint32_t &carry_out, bool *success) {
139 if (amount == 0 || amount > 32) {
144 bool negative = BitIsSet(value, 31);
146 carry_out = Bit32(value, amount - 1);
147 int64_t extended = llvm::SignExtend64<32>(value);
148 return UnsignedBits(extended, amount + 31, amount);
150 carry_out = (negative ? 1 : 0);
151 return (negative ? 0xffffffff : 0);
155 static inline uint32_t ASR(const uint32_t value, const uint32_t amount,
161 uint32_t result = ASR_C(value, amount, dont_care, success);
168 static inline uint32_t ROR_C(const uint32_t value, const uint32_t amount,
169 uint32_t &carry_out, bool *success) {
175 uint32_t amt = amount % 32;
176 uint32_t result = Rotr32(value, amt);
177 carry_out = Bit32(value, 31);
181 static inline uint32_t ROR(const uint32_t value, const uint32_t amount,
187 uint32_t result = ROR_C(value, amount, dont_care, success);
194 static inline uint32_t RRX_C(const uint32_t value, const uint32_t carry_in,
195 uint32_t &carry_out, bool *success) {
197 carry_out = Bit32(value, 0);
198 return Bit32(carry_in, 0) << 31 | Bits32(value, 31, 1);
201 static inline uint32_t RRX(const uint32_t value, const uint32_t carry_in,
205 uint32_t result = RRX_C(value, carry_in, dont_care, success);
212 static inline uint32_t Shift_C(const uint32_t value, ARM_ShifterType type,
213 const uint32_t amount, const uint32_t carry_in,
214 uint32_t &carry_out, bool *success) {
215 if (type == SRType_RRX && amount != 1) {
222 carry_out = carry_in;
228 result = LSL_C(value, amount, carry_out, success);
231 result = LSR_C(value, amount, carry_out, success);
234 result = ASR_C(value, amount, carry_out, success);
237 result = ROR_C(value, amount, carry_out, success);
240 result = RRX_C(value, carry_in, carry_out, success);
252 static inline uint32_t Shift(const uint32_t value, ARM_ShifterType type,
253 const uint32_t amount, const uint32_t carry_in,
255 // Don't care about carry out in this case.
257 uint32_t result = Shift_C(value, type, amount, carry_in, dont_care, success);
264 static inline uint32_t bits(const uint32_t val, const uint32_t msbit,
265 const uint32_t lsbit) {
266 return Bits32(val, msbit, lsbit);
269 static inline uint32_t bit(const uint32_t val, const uint32_t msbit) {
270 return bits(val, msbit, msbit);
273 static uint32_t ror(uint32_t val, uint32_t N, uint32_t shift) {
274 uint32_t m = shift % N;
275 return (val >> m) | (val << (N - m));
278 // (imm32, carry_out) = ARMExpandImm_C(imm12, carry_in)
279 static inline uint32_t ARMExpandImm_C(uint32_t opcode, uint32_t carry_in,
280 uint32_t &carry_out) {
281 uint32_t imm32; // the expanded result
282 uint32_t imm = bits(opcode, 7, 0); // immediate value
283 uint32_t amt = 2 * bits(opcode, 11, 8); // rotate amount
286 carry_out = carry_in;
288 imm32 = ror(imm, 32, amt);
289 carry_out = Bit32(imm32, 31);
294 static inline uint32_t ARMExpandImm(uint32_t opcode) {
295 // 'carry_in' argument to following function call does not affect the imm32
297 uint32_t carry_in = 0;
299 return ARMExpandImm_C(opcode, carry_in, carry_out);
302 // (imm32, carry_out) = ThumbExpandImm_C(imm12, carry_in)
303 static inline uint32_t ThumbExpandImm_C(uint32_t opcode, uint32_t carry_in,
304 uint32_t &carry_out) {
305 uint32_t imm32; // the expanded result
306 const uint32_t i = bit(opcode, 26);
307 const uint32_t imm3 = bits(opcode, 14, 12);
308 const uint32_t abcdefgh = bits(opcode, 7, 0);
309 const uint32_t imm12 = i << 11 | imm3 << 8 | abcdefgh;
311 if (bits(imm12, 11, 10) == 0) {
312 switch (bits(imm12, 9, 8)) {
313 default: // Keep static analyzer happy with a default case
319 imm32 = abcdefgh << 16 | abcdefgh;
323 imm32 = abcdefgh << 24 | abcdefgh << 8;
327 imm32 = abcdefgh << 24 | abcdefgh << 16 | abcdefgh << 8 | abcdefgh;
330 carry_out = carry_in;
332 const uint32_t unrotated_value = 0x80 | bits(imm12, 6, 0);
333 imm32 = ror(unrotated_value, 32, bits(imm12, 11, 7));
334 carry_out = Bit32(imm32, 31);
339 static inline uint32_t ThumbExpandImm(uint32_t opcode) {
340 // 'carry_in' argument to following function call does not affect the imm32
342 uint32_t carry_in = 0;
344 return ThumbExpandImm_C(opcode, carry_in, carry_out);
347 // imm32 = ZeroExtend(i:imm3:imm8, 32)
348 static inline uint32_t ThumbImm12(uint32_t opcode) {
349 const uint32_t i = bit(opcode, 26);
350 const uint32_t imm3 = bits(opcode, 14, 12);
351 const uint32_t imm8 = bits(opcode, 7, 0);
352 const uint32_t imm12 = i << 11 | imm3 << 8 | imm8;
356 // imm32 = ZeroExtend(imm7:'00', 32)
357 static inline uint32_t ThumbImm7Scaled(uint32_t opcode) {
358 const uint32_t imm7 = bits(opcode, 6, 0);
362 // imm32 = ZeroExtend(imm8:'00', 32)
363 static inline uint32_t ThumbImm8Scaled(uint32_t opcode) {
364 const uint32_t imm8 = bits(opcode, 7, 0);
368 // This function performs the check for the register numbers 13 and 15 that are
369 // not permitted for many Thumb register specifiers.
370 static inline bool BadReg(uint32_t n) { return n == 13 || n == 15; }
372 } // namespace lldb_private
374 #endif // lldb_ARMUtils_h_