1 //===-- RegisterContext_mips.h --------------------------------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 #ifndef liblldb_RegisterContext_mips64_H_
10 #define liblldb_RegisterContext_mips64_H_
15 // eh_frame and DWARF Register numbers (eRegisterKindEHFrame &
16 // eRegisterKindDWARF)
132 dwarf_zero_mips64 = 0,
240 dwarf_config5_mips64,
244 struct GPR_linux_mips {
286 struct FPR_linux_mips {
328 struct MSA_linux_mips {
361 uint32_t fcsr; /* FPU control status register */
362 uint32_t fir; /* FPU implementaion revision */
363 uint32_t mcsr; /* MSA control status register */
364 uint32_t mir; /* MSA implementation revision */
365 uint32_t config5; /* Config5 register */
369 GPR_linux_mips gpr; // General purpose registers.
370 FPR_linux_mips fpr; // Floating point registers.
371 MSA_linux_mips msa; // MSA registers.
374 #endif // liblldb_RegisterContext_mips64_H_