1 //===-- llvm/CodeGen/ISDOpcodes.h - CodeGen opcodes -------------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file declares codegen opcodes and related utilities.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_CODEGEN_ISDOPCODES_H
14 #define LLVM_CODEGEN_ISDOPCODES_H
16 #include "llvm/CodeGen/ValueTypes.h"
20 /// ISD namespace - This namespace contains an enum which represents all of the
21 /// SelectionDAG node types and value types.
25 //===--------------------------------------------------------------------===//
26 /// ISD::NodeType enum - This enum defines the target-independent operators
27 /// for a SelectionDAG.
29 /// Targets may also define target-dependent operator codes for SDNodes. For
30 /// example, on x86, these are the enum values in the X86ISD namespace.
31 /// Targets should aim to use target-independent operators to model their
32 /// instruction sets as much as possible, and only use target-dependent
33 /// operators when they have special requirements.
35 /// Finally, during and after selection proper, SNodes may use special
36 /// operator codes that correspond directly with MachineInstr opcodes. These
37 /// are used to represent selected instructions. See the isMachineOpcode()
38 /// and getMachineOpcode() member functions of SDNode.
42 /// DELETED_NODE - This is an illegal value that is used to catch
43 /// errors. This opcode is not a legal opcode for any node.
46 /// EntryToken - This is the marker used to indicate the start of a region.
49 /// TokenFactor - This node takes multiple tokens as input and produces a
50 /// single token result. This is used to represent the fact that the operand
51 /// operators are independent of each other.
54 /// AssertSext, AssertZext - These nodes record if a register contains a
55 /// value that has already been zero or sign extended from a narrower type.
56 /// These nodes take two operands. The first is the node that has already
57 /// been extended, and the second is a value type node indicating the width
63 /// Various leaf nodes.
79 /// The address of the GOT
82 /// FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and
83 /// llvm.returnaddress on the DAG. These nodes take one operand, the index
84 /// of the frame or return address to return. An index of zero corresponds
85 /// to the current function's frame or return address, an index of one to
86 /// the parent's frame or return address, and so on.
92 /// LOCAL_RECOVER - Represents the llvm.localrecover intrinsic.
93 /// Materializes the offset from the local object pointer of another
94 /// function to a particular local object passed to llvm.localescape. The
95 /// operand is the MCSymbol label used to represent this offset, since
96 /// typically the offset is not known until after code generation of the
100 /// READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on
101 /// the DAG, which implements the named register global variables extension.
105 /// FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to
106 /// first (possible) on-stack argument. This is needed for correct stack
107 /// adjustment during unwind.
108 FRAME_TO_ARGS_OFFSET,
110 /// EH_DWARF_CFA - This node represents the pointer to the DWARF Canonical
111 /// Frame Address (CFA), generally the value of the stack pointer at the
112 /// call site in the previous frame.
115 /// OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents
116 /// 'eh_return' gcc dwarf builtin, which is used to return from
117 /// exception. The general meaning is: adjust stack by OFFSET and pass
118 /// execution to HANDLER. Many platform-related details also :)
121 /// RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer)
122 /// This corresponds to the eh.sjlj.setjmp intrinsic.
123 /// It takes an input chain and a pointer to the jump buffer as inputs
124 /// and returns an outchain.
127 /// OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer)
128 /// This corresponds to the eh.sjlj.longjmp intrinsic.
129 /// It takes an input chain and a pointer to the jump buffer as inputs
130 /// and returns an outchain.
133 /// OUTCHAIN = EH_SJLJ_SETUP_DISPATCH(INCHAIN)
134 /// The target initializes the dispatch table here.
135 EH_SJLJ_SETUP_DISPATCH,
137 /// TargetConstant* - Like Constant*, but the DAG does not do any folding,
138 /// simplification, or lowering of the constant. They are used for constants
139 /// which are known to fit in the immediate fields of their users, or for
140 /// carrying magic numbers which are not values which need to be
141 /// materialized in registers.
145 /// TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or
146 /// anything else with this node, and this is valid in the target-specific
147 /// dag, turning into a GlobalAddress operand.
149 TargetGlobalTLSAddress,
153 TargetExternalSymbol,
158 /// TargetIndex - Like a constant pool entry, but with completely
159 /// target-dependent semantics. Holds target flags, a 32-bit index, and a
160 /// 64-bit index. Targets can use this however they like.
163 /// RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...)
164 /// This node represents a target intrinsic function with no side effects.
165 /// The first operand is the ID number of the intrinsic from the
166 /// llvm::Intrinsic namespace. The operands to the intrinsic follow. The
167 /// node returns the result of the intrinsic.
170 /// RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...)
171 /// This node represents a target intrinsic function with side effects that
172 /// returns a result. The first operand is a chain pointer. The second is
173 /// the ID number of the intrinsic from the llvm::Intrinsic namespace. The
174 /// operands to the intrinsic follow. The node has two results, the result
175 /// of the intrinsic and an output chain.
178 /// OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...)
179 /// This node represents a target intrinsic function with side effects that
180 /// does not return a result. The first operand is a chain pointer. The
181 /// second is the ID number of the intrinsic from the llvm::Intrinsic
182 /// namespace. The operands to the intrinsic follow.
185 /// CopyToReg - This node has three operands: a chain, a register number to
186 /// set to this value, and a value.
189 /// CopyFromReg - This node indicates that the input value is a virtual or
190 /// physical register that is defined outside of the scope of this
191 /// SelectionDAG. The register is available from the RegisterSDNode object.
194 /// UNDEF - An undefined node.
197 // FREEZE - FREEZE(VAL) returns an arbitrary value if VAL is UNDEF (or
198 // is evaluated to UNDEF), or returns VAL otherwise. Note that each
199 // read of UNDEF can yield different value, but FREEZE(UNDEF) cannot.
202 /// EXTRACT_ELEMENT - This is used to get the lower or upper (determined by
203 /// a Constant, which is required to be operand #1) half of the integer or
204 /// float value specified as operand #0. This is only for use before
205 /// legalization, for values that will be broken into multiple registers.
208 /// BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
209 /// Given two values of the same integer value type, this produces a value
210 /// twice as big. Like EXTRACT_ELEMENT, this can only be used before
211 /// legalization. The lower part of the composite value should be in
212 /// element 0 and the upper part should be in element 1.
215 /// MERGE_VALUES - This node takes multiple discrete operands and returns
216 /// them all as its individual results. This nodes has exactly the same
217 /// number of inputs and outputs. This node is useful for some pieces of the
218 /// code generator that want to think about a single node with multiple
219 /// results, not multiple nodes.
222 /// Simple integer binary arithmetic operators.
231 /// SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing
232 /// a signed/unsigned value of type i[2*N], and return the full value as
233 /// two results, each of type iN.
237 /// SDIVREM/UDIVREM - Divide two integers and produce both a quotient and
238 /// remainder result.
242 /// CARRY_FALSE - This node is used when folding other nodes,
243 /// like ADDC/SUBC, which indicate the carry result is always false.
246 /// Carry-setting nodes for multiple precision addition and subtraction.
247 /// These nodes take two operands of the same value type, and produce two
248 /// results. The first result is the normal add or sub result, the second
249 /// result is the carry flag result.
250 /// FIXME: These nodes are deprecated in favor of ADDCARRY and SUBCARRY.
251 /// They are kept around for now to provide a smooth transition path
252 /// toward the use of ADDCARRY/SUBCARRY and will eventually be removed.
256 /// Carry-using nodes for multiple precision addition and subtraction. These
257 /// nodes take three operands: The first two are the normal lhs and rhs to
258 /// the add or sub, and the third is the input carry flag. These nodes
259 /// produce two results; the normal result of the add or sub, and the output
260 /// carry flag. These nodes both read and write a carry flag to allow them
261 /// to them to be chained together for add and sub of arbitrarily large
266 /// Carry-using nodes for multiple precision addition and subtraction.
267 /// These nodes take three operands: The first two are the normal lhs and
268 /// rhs to the add or sub, and the third is a boolean indicating if there
269 /// is an incoming carry. These nodes produce two results: the normal
270 /// result of the add or sub, and the output carry so they can be chained
271 /// together. The use of this opcode is preferable to adde/sube if the
272 /// target supports it, as the carry is a regular value rather than a
273 /// glue, which allows further optimisation.
277 /// RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
278 /// These nodes take two operands: the normal LHS and RHS to the add. They
279 /// produce two results: the normal result of the add, and a boolean that
280 /// indicates if an overflow occurred (*not* a flag, because it may be store
281 /// to memory, etc.). If the type of the boolean is not i1 then the high
282 /// bits conform to getBooleanContents.
283 /// These nodes are generated from llvm.[su]add.with.overflow intrinsics.
287 /// Same for subtraction.
291 /// Same for multiplication.
295 /// RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2
296 /// integers with the same bit width (W). If the true value of LHS + RHS
297 /// exceeds the largest value that can be represented by W bits, the
298 /// resulting value is this maximum value. Otherwise, if this value is less
299 /// than the smallest value that can be represented by W bits, the
300 /// resulting value is this minimum value.
304 /// RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2
305 /// integers with the same bit width (W). If the true value of LHS - RHS
306 /// exceeds the largest value that can be represented by W bits, the
307 /// resulting value is this maximum value. Otherwise, if this value is less
308 /// than the smallest value that can be represented by W bits, the
309 /// resulting value is this minimum value.
313 /// RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication
315 /// 2 integers with the same width and scale. SCALE represents the scale of
316 /// both operands as fixed point numbers. This SCALE parameter must be a
317 /// constant integer. A scale of zero is effectively performing
318 /// multiplication on 2 integers.
322 /// Same as the corresponding unsaturated fixed point instructions, but the
323 /// result is clamped between the min and max values representable by the
324 /// bits of the first 2 operands.
328 /// RESULT = [US]DIVFIX(LHS, RHS, SCALE) - Perform fixed point division on
329 /// 2 integers with the same width and scale. SCALE represents the scale
330 /// of both operands as fixed point numbers. This SCALE parameter must be a
331 /// constant integer.
335 /// Same as the corresponding unsaturated fixed point instructions, but the
336 /// result is clamped between the min and max values representable by the
337 /// bits of the first 2 operands.
341 /// Simple binary floating point operators.
348 /// Constrained versions of the binary floating point operators.
349 /// These will be lowered to the simple operators before final selection.
350 /// They are used to limit optimizations while the DAG is being
359 /// Constrained versions of libm-equivalent floating point intrinsics.
360 /// These will be lowered to the equivalent non-constrained pseudo-op
361 /// (or expanded to the equivalent library call) before final selection.
362 /// They are used to limit optimizations while the DAG is being optimized.
389 /// STRICT_FP_TO_[US]INT - Convert a floating point value to a signed or
390 /// unsigned integer. These have the same semantics as fptosi and fptoui
392 /// They are used to limit optimizations while the DAG is being optimized.
396 /// STRICT_[US]INT_TO_FP - Convert a signed or unsigned integer to
397 /// a floating point value. These have the same semantics as sitofp and
399 /// They are used to limit optimizations while the DAG is being optimized.
403 /// X = STRICT_FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating
404 /// point type down to the precision of the destination VT. TRUNC is a
405 /// flag, which is always an integer that is zero or one. If TRUNC is 0,
406 /// this is a normal rounding, if it is 1, this FP_ROUND is known to not
407 /// change the value of Y.
409 /// The TRUNC = 1 case is used in cases where we know that the value will
410 /// not be modified by the node, because Y is not using any of the extra
411 /// precision of source type. This allows certain transformations like
412 /// STRICT_FP_EXTEND(STRICT_FP_ROUND(X,1)) -> X which are not safe for
413 /// STRICT_FP_EXTEND(STRICT_FP_ROUND(X,0)) because the extra bits aren't
415 /// It is used to limit optimizations while the DAG is being optimized.
418 /// X = STRICT_FP_EXTEND(Y) - Extend a smaller FP type into a larger FP
420 /// It is used to limit optimizations while the DAG is being optimized.
423 /// STRICT_FSETCC/STRICT_FSETCCS - Constrained versions of SETCC, used
424 /// for floating-point operands only. STRICT_FSETCC performs a quiet
425 /// comparison operation, while STRICT_FSETCCS performs a signaling
426 /// comparison operation.
430 /// FMA - Perform a * b + c with no intermediate rounding step.
433 /// FMAD - Perform a * b + c, while getting the same result as the
434 /// separately rounded operations.
437 /// FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This
438 /// DAG node does not require that X and Y have the same type, just that
439 /// they are both floating point. X and the result must have the same type.
440 /// FCOPYSIGN(f32, f64) is allowed.
443 /// INT = FGETSIGN(FP) - Return the sign bit of the specified floating point
444 /// value as an integer 0/1 value.
447 /// Returns platform specific canonical encoding of a floating point number.
450 /// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a fixed-width vector
451 /// with the specified, possibly variable, elements. The types of the
452 /// operands must match the vector element type, except that integer types
453 /// are allowed to be larger than the element type, in which case the
454 /// operands are implicitly truncated. The types of the operands must all
458 /// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element
459 /// at IDX replaced with VAL. If the type of VAL is larger than the vector
460 /// element type then VAL is truncated before replacement.
462 /// If VECTOR is a scalable vector, then IDX may be larger than the minimum
463 /// vector width. IDX is not first scaled by the runtime scaling factor of
467 /// EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR
468 /// identified by the (potentially variable) element number IDX. If the return
469 /// type is an integer type larger than the element type of the vector, the
470 /// result is extended to the width of the return type. In that case, the high
471 /// bits are undefined.
473 /// If VECTOR is a scalable vector, then IDX may be larger than the minimum
474 /// vector width. IDX is not first scaled by the runtime scaling factor of
478 /// CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of
479 /// vector type with the same length and element type, this produces a
480 /// concatenated vector result value, with length equal to the sum of the
481 /// lengths of the input vectors. If VECTOR0 is a fixed-width vector, then
482 /// VECTOR1..VECTORN must all be fixed-width vectors. Similarly, if VECTOR0
483 /// is a scalable vector, then VECTOR1..VECTORN must all be scalable vectors.
486 /// INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector with VECTOR2
487 /// inserted into VECTOR1. IDX represents the starting element number at which
488 /// VECTOR2 will be inserted. IDX must be a constant multiple of T's known
489 /// minimum vector length. Let the type of VECTOR2 be T, then if T is a
490 /// scalable vector, IDX is first scaled by the runtime scaling factor of T.
491 /// The elements of VECTOR1 starting at IDX are overwritten with VECTOR2.
492 /// Elements IDX through (IDX + num_elements(T) - 1) must be valid VECTOR1
493 /// indices. If this condition cannot be determined statically but is false at
494 /// runtime, then the result vector is undefined.
496 /// This operation supports inserting a fixed-width vector into a scalable
497 /// vector, but not the other way around.
500 /// EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR.
501 /// Let the result type be T, then IDX represents the starting element number
502 /// from which a subvector of type T is extracted. IDX must be a constant
503 /// multiple of T's known minimum vector length. If T is a scalable vector,
504 /// IDX is first scaled by the runtime scaling factor of T. Elements IDX
505 /// through (IDX + num_elements(T) - 1) must be valid VECTOR indices. If this
506 /// condition cannot be determined statically but is false at runtime, then
507 /// the result vector is undefined.
509 /// This operation supports extracting a fixed-width vector from a scalable
510 /// vector, but not the other way around.
513 /// VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as
514 /// VEC1/VEC2. A VECTOR_SHUFFLE node also contains an array of constant int
515 /// values that indicate which value (or undef) each result element will
516 /// get. These constant ints are accessible through the
517 /// ShuffleVectorSDNode class. This is quite similar to the Altivec
518 /// 'vperm' instruction, except that the indices must be constants and are
519 /// in terms of the element size of VEC1/VEC2, not in terms of bytes.
522 /// SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a
523 /// scalar value into element 0 of the resultant vector type. The top
524 /// elements 1 to N-1 of the N-element vector are undefined. The type
525 /// of the operand must match the vector element type, except when they
526 /// are integer types. In this case the operand is allowed to be wider
527 /// than the vector element type, and is implicitly truncated to it.
530 /// SPLAT_VECTOR(VAL) - Returns a vector with the scalar value VAL
531 /// duplicated in all lanes. The type of the operand must match the vector
532 /// element type, except when they are integer types. In this case the
533 /// operand is allowed to be wider than the vector element type, and is
534 /// implicitly truncated to it.
537 /// MULHU/MULHS - Multiply high - Multiply two integers of type iN,
538 /// producing an unsigned/signed value of type i[2*N], then return the top
543 /// [US]{MIN/MAX} - Binary minimum or maximum or signed or unsigned
550 /// Bitwise operators - logical and, logical or, logical xor.
555 /// ABS - Determine the unsigned absolute value of a signed integer value of
556 /// the same bitwidth.
557 /// Note: A value of INT_MIN will return INT_MIN, no saturation or overflow
561 /// Shift and rotation operations. After legalization, the type of the
562 /// shift amount is known to be TLI.getShiftAmountTy(). Before legalization
563 /// the shift amount can be any type, but care must be taken to ensure it is
564 /// large enough. TLI.getShiftAmountTy() is i8 on some targets, but before
565 /// legalization, types like i1024 can occur and i8 doesn't have enough bits
566 /// to represent the shift amount.
567 /// When the 1st operand is a vector, the shift amount must be in the same
568 /// type. (TLI.getShiftAmountTy() will return the same type when the input
569 /// type is a vector.)
570 /// For rotates and funnel shifts, the shift amount is treated as an unsigned
571 /// amount modulo the element size of the first operand.
573 /// Funnel 'double' shifts take 3 operands, 2 inputs and the shift amount.
574 /// fshl(X,Y,Z): (X << (Z % BW)) | (Y >> (BW - (Z % BW)))
575 /// fshr(X,Y,Z): (X << (BW - (Z % BW))) | (Y >> (Z % BW))
584 /// Byte Swap and Counting operators.
591 /// Bit counting operators with an undefined result for zero inputs.
595 /// Select(COND, TRUEVAL, FALSEVAL). If the type of the boolean COND is not
596 /// i1 then the high bits must conform to getBooleanContents.
599 /// Select with a vector condition (op #0) and two vector operands (ops #1
600 /// and #2), returning a vector result. All vectors have the same length.
601 /// Much like the scalar select and setcc, each bit in the condition selects
602 /// whether the corresponding result element is taken from op #1 or op #2.
603 /// At first, the VSELECT condition is of vXi1 type. Later, targets may
604 /// change the condition type in order to match the VSELECT node using a
605 /// pattern. The condition follows the BooleanContent format of the target.
608 /// Select with condition operator - This selects between a true value and
609 /// a false value (ops #2 and #3) based on the boolean result of comparing
610 /// the lhs and rhs (ops #0 and #1) of a conditional expression with the
611 /// condition code in op #4, a CondCodeSDNode.
614 /// SetCC operator - This evaluates to a true value iff the condition is
615 /// true. If the result value type is not i1 then the high bits conform
616 /// to getBooleanContents. The operands to this are the left and right
617 /// operands to compare (ops #0, and #1) and the condition code to compare
618 /// them with (op #2) as a CondCodeSDNode. If the operands are vector types
619 /// then the result type must also be a vector type.
622 /// Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but
623 /// op #2 is a boolean indicating if there is an incoming carry. This
624 /// operator checks the result of "LHS - RHS - Carry", and can be used to
625 /// compare two wide integers:
626 /// (setcccarry lhshi rhshi (subcarry lhslo rhslo) cc).
627 /// Only valid for integers.
630 /// SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded
631 /// integer shift operations. The operation ordering is:
632 /// [Lo,Hi] = op [LoLHS,HiLHS], Amt
637 /// Conversion operators. These are all single input single output
638 /// operations. For all of these, the result type must be strictly
639 /// wider or narrower (depending on the operation) than the source
642 /// SIGN_EXTEND - Used for integer types, replicating the sign bit
646 /// ZERO_EXTEND - Used for integer types, zeroing the new bits.
649 /// ANY_EXTEND - Used for integer types. The high bits are undefined.
652 /// TRUNCATE - Completely drop the high bits.
655 /// [SU]INT_TO_FP - These operators convert integers (whose interpreted sign
656 /// depends on the first letter) to floating point.
660 /// SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to
661 /// sign extend a small value in a large integer register (e.g. sign
662 /// extending the low 8 bits of a 32-bit register to fill the top 24 bits
663 /// with the 7th bit). The size of the smaller type is indicated by the 1th
664 /// operand, a ValueType node.
667 /// ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an
668 /// in-register any-extension of the low lanes of an integer vector. The
669 /// result type must have fewer elements than the operand type, and those
670 /// elements must be larger integer types such that the total size of the
671 /// operand type is less than or equal to the size of the result type. Each
672 /// of the low operand elements is any-extended into the corresponding,
673 /// wider result elements with the high bits becoming undef.
674 /// NOTE: The type legalizer prefers to make the operand and result size
675 /// the same to allow expansion to shuffle vector during op legalization.
676 ANY_EXTEND_VECTOR_INREG,
678 /// SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an
679 /// in-register sign-extension of the low lanes of an integer vector. The
680 /// result type must have fewer elements than the operand type, and those
681 /// elements must be larger integer types such that the total size of the
682 /// operand type is less than or equal to the size of the result type. Each
683 /// of the low operand elements is sign-extended into the corresponding,
684 /// wider result elements.
685 /// NOTE: The type legalizer prefers to make the operand and result size
686 /// the same to allow expansion to shuffle vector during op legalization.
687 SIGN_EXTEND_VECTOR_INREG,
689 /// ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an
690 /// in-register zero-extension of the low lanes of an integer vector. The
691 /// result type must have fewer elements than the operand type, and those
692 /// elements must be larger integer types such that the total size of the
693 /// operand type is less than or equal to the size of the result type. Each
694 /// of the low operand elements is zero-extended into the corresponding,
695 /// wider result elements.
696 /// NOTE: The type legalizer prefers to make the operand and result size
697 /// the same to allow expansion to shuffle vector during op legalization.
698 ZERO_EXTEND_VECTOR_INREG,
700 /// FP_TO_[US]INT - Convert a floating point value to a signed or unsigned
701 /// integer. These have the same semantics as fptosi and fptoui in IR. If
702 /// the FP value cannot fit in the integer type, the results are undefined.
706 /// X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type
707 /// down to the precision of the destination VT. TRUNC is a flag, which is
708 /// always an integer that is zero or one. If TRUNC is 0, this is a
709 /// normal rounding, if it is 1, this FP_ROUND is known to not change the
712 /// The TRUNC = 1 case is used in cases where we know that the value will
713 /// not be modified by the node, because Y is not using any of the extra
714 /// precision of source type. This allows certain transformations like
715 /// FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for
716 /// FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed.
719 /// FLT_ROUNDS_ - Returns current rounding mode:
722 /// 1 Round to nearest
725 /// Result is rounding mode and chain. Input is a chain.
728 /// X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
731 /// BITCAST - This operator converts between integer, vector and FP
732 /// values, as if the value was stored to memory with one type and loaded
733 /// from the same address with the other type (or equivalently for vector
734 /// format conversions, etc). The source and result are required to have
735 /// the same bit size (e.g. f32 <-> i32). This can also be used for
736 /// int-to-int or fp-to-fp conversions, but that is a noop, deleted by
739 /// This operator is subtly different from the bitcast instruction from
740 /// LLVM-IR since this node may change the bits in the register. For
741 /// example, this occurs on big-endian NEON and big-endian MSA where the
742 /// layout of the bits in the register depends on the vector type and this
743 /// operator acts as a shuffle operation for some vector type combinations.
746 /// ADDRSPACECAST - This operator converts between pointers of different
750 /// FP16_TO_FP, FP_TO_FP16 - These operators are used to perform promotions
751 /// and truncation for half-precision (16 bit) floating numbers. These nodes
752 /// form a semi-softened interface for dealing with f16 (as an i16), which
753 /// is often a storage-only type but has native conversions.
759 /// Perform various unary floating-point operations inspired by libm. For
760 /// FPOWI, the result is undefined if if the integer operand doesn't fit
787 /// FMINNUM/FMAXNUM - Perform floating-point minimum or maximum on two
790 /// In the case where a single input is a NaN (either signaling or quiet),
791 /// the non-NaN input is returned.
793 /// The return value of (FMINNUM 0.0, -0.0) could be either 0.0 or -0.0.
797 /// FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimum or maximum on
798 /// two values, following the IEEE-754 2008 definition. This differs from
799 /// FMINNUM/FMAXNUM in the handling of signaling NaNs. If one input is a
800 /// signaling NaN, returns a quiet NaN.
804 /// FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0
805 /// as less than 0.0. While FMINNUM_IEEE/FMAXNUM_IEEE follow IEEE 754-2008
806 /// semantics, FMINIMUM/FMAXIMUM follow IEEE 754-2018 draft semantics.
810 /// FSINCOS - Compute both fsin and fcos as a single operation.
813 /// LOAD and STORE have token chains as their first operand, then the same
814 /// operands as an LLVM load/store instruction, then an offset node that
815 /// is added / subtracted from the base pointer to form the address (for
816 /// indexed memory ops).
820 /// DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned
821 /// to a specified boundary. This node always has two return values: a new
822 /// stack pointer value and a chain. The first operand is the token chain,
823 /// the second is the number of bytes to allocate, and the third is the
824 /// alignment boundary. The size is guaranteed to be a multiple of the
825 /// stack alignment, and the alignment is guaranteed to be bigger than the
826 /// stack alignment (if required) or 0 to get standard stack alignment.
829 /// Control flow instructions. These all have token chains.
831 /// BR - Unconditional branch. The first operand is the chain
832 /// operand, the second is the MBB to branch to.
835 /// BRIND - Indirect branch. The first operand is the chain, the second
836 /// is the value to branch to, which must be of the same type as the
837 /// target's pointer type.
840 /// BR_JT - Jumptable branch. The first operand is the chain, the second
841 /// is the jumptable index, the last one is the jumptable entry index.
844 /// BRCOND - Conditional branch. The first operand is the chain, the
845 /// second is the condition, the third is the block to branch to if the
846 /// condition is true. If the type of the condition is not i1, then the
847 /// high bits must conform to getBooleanContents.
850 /// BR_CC - Conditional branch. The behavior is like that of SELECT_CC, in
851 /// that the condition is represented as condition code, and two nodes to
852 /// compare, rather than as a combined SetCC node. The operands in order
853 /// are chain, cc, lhs, rhs, block to branch to if condition is true.
856 /// INLINEASM - Represents an inline asm block. This node always has two
857 /// return values: a chain and a flag result. The inputs are as follows:
858 /// Operand #0 : Input chain.
859 /// Operand #1 : a ExternalSymbolSDNode with a pointer to the asm string.
860 /// Operand #2 : a MDNodeSDNode with the !srcloc metadata.
861 /// Operand #3 : HasSideEffect, IsAlignStack bits.
862 /// After this, it is followed by a list of operands with this format:
863 /// ConstantSDNode: Flags that encode whether it is a mem or not, the
864 /// of operands that follow, etc. See InlineAsm.h.
865 /// ... however many operands ...
866 /// Operand #last: Optional, an incoming flag.
868 /// The variable width operands are required to represent target addressing
869 /// modes as a single "operand", even though they may have multiple
873 /// INLINEASM_BR - Branching version of inline asm. Used by asm-goto.
876 /// EH_LABEL - Represents a label in mid basic block used to track
877 /// locations needed for debug and exception handling tables. These nodes
878 /// take a chain as input and return a chain.
881 /// ANNOTATION_LABEL - Represents a mid basic block label used by
882 /// annotations. This should remain within the basic block and be ordered
883 /// with respect to other call instructions, but loads and stores may float
887 /// CATCHRET - Represents a return from a catch block funclet. Used for
888 /// MSVC compatible exception handling. Takes a chain operand and a
889 /// destination basic block operand.
892 /// CLEANUPRET - Represents a return from a cleanup block funclet. Used for
893 /// MSVC compatible exception handling. Takes only a chain operand.
896 /// STACKSAVE - STACKSAVE has one operand, an input chain. It produces a
897 /// value, the same type as the pointer type for the system, and an output
901 /// STACKRESTORE has two operands, an input chain and a pointer to restore
902 /// to it returns an output chain.
905 /// CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end
906 /// of a call sequence, and carry arbitrary information that target might
907 /// want to know. The first operand is a chain, the rest are specified by
908 /// the target and not touched by the DAG optimizers.
909 /// Targets that may use stack to pass call arguments define additional
911 /// - size of the call frame part that must be set up within the
912 /// CALLSEQ_START..CALLSEQ_END pair,
913 /// - part of the call frame prepared prior to CALLSEQ_START.
914 /// Both these parameters must be constants, their sum is the total call
916 /// CALLSEQ_START..CALLSEQ_END pairs may not be nested.
917 CALLSEQ_START, // Beginning of a call sequence
918 CALLSEQ_END, // End of a call sequence
920 /// VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE,
921 /// and the alignment. It returns a pair of values: the vaarg value and a
925 /// VACOPY - VACOPY has 5 operands: an input chain, a destination pointer,
926 /// a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the
930 /// VAEND, VASTART - VAEND and VASTART have three operands: an input chain,
931 /// pointer, and a SRCVALUE.
935 // PREALLOCATED_SETUP - This has 2 operands: an input chain and a SRCVALUE
936 // with the preallocated call Value.
938 // PREALLOCATED_ARG - This has 3 operands: an input chain, a SRCVALUE
939 // with the preallocated call Value, and a constant int.
942 /// SRCVALUE - This is a node type that holds a Value* that is used to
943 /// make reference to a value in the LLVM IR.
946 /// MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to
947 /// reference metadata in the IR.
950 /// PCMARKER - This corresponds to the pcmarker intrinsic.
953 /// READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
954 /// It produces a chain and one i64 value. The only operand is a chain.
955 /// If i64 is not legal, the result will be expanded into smaller values.
956 /// Still, it returns an i64, so targets should set legality for i64.
957 /// The result is the content of the architecture-specific cycle
958 /// counter-like register (or other high accuracy low latency clock source).
961 /// HANDLENODE node - Used as a handle for various purposes.
964 /// INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic. It
965 /// takes as input a token chain, the pointer to the trampoline, the pointer
966 /// to the nested function, the pointer to pass for the 'nest' parameter, a
967 /// SRCVALUE for the trampoline and another for the nested function
968 /// (allowing targets to access the original Function*).
969 /// It produces a token chain as output.
972 /// ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic.
973 /// It takes a pointer to the trampoline and produces a (possibly) new
974 /// pointer to the same trampoline with platform-specific adjustments
975 /// applied. The pointer it returns points to an executable block of code.
978 /// TRAP - Trapping instruction
981 /// DEBUGTRAP - Trap intended to get the attention of a debugger.
984 /// PREFETCH - This corresponds to a prefetch intrinsic. The first operand
985 /// is the chain. The other operands are the address to prefetch,
986 /// read / write specifier, locality specifier and instruction / data cache
990 /// OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope)
991 /// This corresponds to the fence instruction. It takes an input chain, and
992 /// two integer constants: an AtomicOrdering and a SynchronizationScope.
995 /// Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr)
996 /// This corresponds to "load atomic" instruction.
999 /// OUTCHAIN = ATOMIC_STORE(INCHAIN, ptr, val)
1000 /// This corresponds to "store atomic" instruction.
1003 /// Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap)
1004 /// For double-word atomic operations:
1005 /// ValLo, ValHi, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmpLo, cmpHi,
1007 /// This corresponds to the cmpxchg instruction.
1010 /// Val, Success, OUTCHAIN
1011 /// = ATOMIC_CMP_SWAP_WITH_SUCCESS(INCHAIN, ptr, cmp, swap)
1012 /// N.b. this is still a strong cmpxchg operation, so
1013 /// Success == "Val == cmp".
1014 ATOMIC_CMP_SWAP_WITH_SUCCESS,
1016 /// Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt)
1017 /// Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt)
1018 /// For double-word atomic operations:
1019 /// ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi)
1020 /// ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi)
1021 /// These correspond to the atomicrmw instruction.
1037 // Masked load and store - consecutive vector load and store operations
1038 // with additional mask operand that prevents memory accesses to the
1039 // masked-off lanes.
1041 // Val, OutChain = MLOAD(BasePtr, Mask, PassThru)
1042 // OutChain = MSTORE(Value, BasePtr, Mask)
1046 // Masked gather and scatter - load and store operations for a vector of
1047 // random addresses with additional mask operand that prevents memory
1048 // accesses to the masked-off lanes.
1050 // Val, OutChain = GATHER(InChain, PassThru, Mask, BasePtr, Index, Scale)
1051 // OutChain = SCATTER(InChain, Value, Mask, BasePtr, Index, Scale)
1053 // The Index operand can have more vector elements than the other operands
1054 // due to type legalization. The extra elements are ignored.
1058 /// This corresponds to the llvm.lifetime.* intrinsics. The first operand
1059 /// is the chain and the second operand is the alloca pointer.
1063 /// GC_TRANSITION_START/GC_TRANSITION_END - These operators mark the
1064 /// beginning and end of GC transition sequence, and carry arbitrary
1065 /// information that target might need for lowering. The first operand is
1066 /// a chain, the rest are specified by the target and not touched by the DAG
1067 /// optimizers. GC_TRANSITION_START..GC_TRANSITION_END pairs may not be
1069 GC_TRANSITION_START,
1072 /// GET_DYNAMIC_AREA_OFFSET - get offset from native SP to the address of
1073 /// the most recent dynamic alloca. For most targets that would be 0, but
1074 /// for some others (e.g. PowerPC, PowerPC64) that would be compile-time
1075 /// known nonzero constant. The only operand here is the chain.
1076 GET_DYNAMIC_AREA_OFFSET,
1078 /// VSCALE(IMM) - Returns the runtime scaling factor used to calculate the
1079 /// number of elements within a scalable vector. IMM is a constant integer
1080 /// multiplier that is applied to the runtime value.
1083 /// Generic reduction nodes. These nodes represent horizontal vector
1084 /// reduction operations, producing a scalar result.
1085 /// The STRICT variants perform reductions in sequential order. The first
1086 /// operand is an initial scalar accumulator value, and the second operand
1087 /// is the vector to reduce.
1088 VECREDUCE_STRICT_FADD,
1089 VECREDUCE_STRICT_FMUL,
1090 /// These reductions are non-strict, and have a single vector operand.
1093 /// FMIN/FMAX nodes can have flags, for NaN/NoNaN variants.
1096 /// Integer reductions may have a result type larger than the vector element
1097 /// type. However, the reduction is performed using the vector element type
1098 /// and the value in the top bits is unspecified.
1109 /// BUILTIN_OP_END - This must be the last enum value in this list.
1110 /// The target-specific pre-isel opcode values start here.
1114 /// FIRST_TARGET_STRICTFP_OPCODE - Target-specific pre-isel operations
1115 /// which cannot raise FP exceptions should be less than this value.
1116 /// Those that do must not be less than this value.
1117 static const int FIRST_TARGET_STRICTFP_OPCODE = BUILTIN_OP_END + 400;
1119 /// FIRST_TARGET_MEMORY_OPCODE - Target-specific pre-isel operations
1120 /// which do not reference a specific memory location should be less than
1121 /// this value. Those that do must not be less than this value, and can
1122 /// be used with SelectionDAG::getMemIntrinsicNode.
1123 static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END + 500;
1125 //===--------------------------------------------------------------------===//
1126 /// MemIndexedMode enum - This enum defines the load / store indexed
1127 /// addressing modes.
1129 /// UNINDEXED "Normal" load / store. The effective address is already
1130 /// computed and is available in the base pointer. The offset
1131 /// operand is always undefined. In addition to producing a
1132 /// chain, an unindexed load produces one value (result of the
1133 /// load); an unindexed store does not produce a value.
1135 /// PRE_INC Similar to the unindexed mode where the effective address is
1136 /// PRE_DEC the value of the base pointer add / subtract the offset.
1137 /// It considers the computation as being folded into the load /
1138 /// store operation (i.e. the load / store does the address
1139 /// computation as well as performing the memory transaction).
1140 /// The base operand is always undefined. In addition to
1141 /// producing a chain, pre-indexed load produces two values
1142 /// (result of the load and the result of the address
1143 /// computation); a pre-indexed store produces one value (result
1144 /// of the address computation).
1146 /// POST_INC The effective address is the value of the base pointer. The
1147 /// POST_DEC value of the offset operand is then added to / subtracted
1148 /// from the base after memory transaction. In addition to
1149 /// producing a chain, post-indexed load produces two values
1150 /// (the result of the load and the result of the base +/- offset
1151 /// computation); a post-indexed store produces one value (the
1152 /// the result of the base +/- offset computation).
1153 enum MemIndexedMode { UNINDEXED = 0, PRE_INC, PRE_DEC, POST_INC, POST_DEC };
1155 static const int LAST_INDEXED_MODE = POST_DEC + 1;
1157 //===--------------------------------------------------------------------===//
1158 /// MemIndexType enum - This enum defines how to interpret MGATHER/SCATTER's
1159 /// index parameter when calculating addresses.
1161 /// SIGNED_SCALED Addr = Base + ((signed)Index * sizeof(element))
1162 /// SIGNED_UNSCALED Addr = Base + (signed)Index
1163 /// UNSIGNED_SCALED Addr = Base + ((unsigned)Index * sizeof(element))
1164 /// UNSIGNED_UNSCALED Addr = Base + (unsigned)Index
1172 static const int LAST_MEM_INDEX_TYPE = UNSIGNED_UNSCALED + 1;
1174 //===--------------------------------------------------------------------===//
1175 /// LoadExtType enum - This enum defines the three variants of LOADEXT
1176 /// (load with extension).
1178 /// SEXTLOAD loads the integer operand and sign extends it to a larger
1179 /// integer result type.
1180 /// ZEXTLOAD loads the integer operand and zero extends it to a larger
1181 /// integer result type.
1182 /// EXTLOAD is used for two things: floating point extending loads and
1183 /// integer extending loads [the top bits are undefined].
1184 enum LoadExtType { NON_EXTLOAD = 0, EXTLOAD, SEXTLOAD, ZEXTLOAD };
1186 static const int LAST_LOADEXT_TYPE = ZEXTLOAD + 1;
1188 NodeType getExtForLoadExtType(bool IsFP, LoadExtType);
1190 //===--------------------------------------------------------------------===//
1191 /// ISD::CondCode enum - These are ordered carefully to make the bitfields
1192 /// below work out, when considering SETFALSE (something that never exists
1193 /// dynamically) as 0. "U" -> Unsigned (for integer operands) or Unordered
1194 /// (for floating point), "L" -> Less than, "G" -> Greater than, "E" -> Equal
1195 /// to. If the "N" column is 1, the result of the comparison is undefined if
1196 /// the input is a NAN.
1198 /// All of these (except for the 'always folded ops') should be handled for
1199 /// floating point. For integer, only the SETEQ,SETNE,SETLT,SETLE,SETGT,
1200 /// SETGE,SETULT,SETULE,SETUGT, and SETUGE opcodes are used.
1202 /// Note that these are laid out in a specific order to allow bit-twiddling
1203 /// to transform conditions.
1205 // Opcode N U L G E Intuitive operation
1206 SETFALSE, // 0 0 0 0 Always false (always folded)
1207 SETOEQ, // 0 0 0 1 True if ordered and equal
1208 SETOGT, // 0 0 1 0 True if ordered and greater than
1209 SETOGE, // 0 0 1 1 True if ordered and greater than or equal
1210 SETOLT, // 0 1 0 0 True if ordered and less than
1211 SETOLE, // 0 1 0 1 True if ordered and less than or equal
1212 SETONE, // 0 1 1 0 True if ordered and operands are unequal
1213 SETO, // 0 1 1 1 True if ordered (no nans)
1214 SETUO, // 1 0 0 0 True if unordered: isnan(X) | isnan(Y)
1215 SETUEQ, // 1 0 0 1 True if unordered or equal
1216 SETUGT, // 1 0 1 0 True if unordered or greater than
1217 SETUGE, // 1 0 1 1 True if unordered, greater than, or equal
1218 SETULT, // 1 1 0 0 True if unordered or less than
1219 SETULE, // 1 1 0 1 True if unordered, less than, or equal
1220 SETUNE, // 1 1 1 0 True if unordered or not equal
1221 SETTRUE, // 1 1 1 1 Always true (always folded)
1222 // Don't care operations: undefined if the input is a nan.
1223 SETFALSE2, // 1 X 0 0 0 Always false (always folded)
1224 SETEQ, // 1 X 0 0 1 True if equal
1225 SETGT, // 1 X 0 1 0 True if greater than
1226 SETGE, // 1 X 0 1 1 True if greater than or equal
1227 SETLT, // 1 X 1 0 0 True if less than
1228 SETLE, // 1 X 1 0 1 True if less than or equal
1229 SETNE, // 1 X 1 1 0 True if not equal
1230 SETTRUE2, // 1 X 1 1 1 Always true (always folded)
1232 SETCC_INVALID // Marker value.
1235 /// Return true if this is a setcc instruction that performs a signed
1236 /// comparison when used with integer operands.
1237 inline bool isSignedIntSetCC(CondCode Code) {
1238 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE;
1241 /// Return true if this is a setcc instruction that performs an unsigned
1242 /// comparison when used with integer operands.
1243 inline bool isUnsignedIntSetCC(CondCode Code) {
1244 return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE;
1247 /// Return true if the specified condition returns true if the two operands to
1248 /// the condition are equal. Note that if one of the two operands is a NaN,
1249 /// this value is meaningless.
1250 inline bool isTrueWhenEqual(CondCode Cond) { return ((int)Cond & 1) != 0; }
1252 /// This function returns 0 if the condition is always false if an operand is
1253 /// a NaN, 1 if the condition is always true if the operand is a NaN, and 2 if
1254 /// the condition is undefined if the operand is a NaN.
1255 inline unsigned getUnorderedFlavor(CondCode Cond) {
1256 return ((int)Cond >> 3) & 3;
1259 /// Return the operation corresponding to !(X op Y), where 'op' is a valid
1260 /// SetCC operation.
1261 CondCode getSetCCInverse(CondCode Operation, EVT Type);
1263 namespace GlobalISel {
1264 /// Return the operation corresponding to !(X op Y), where 'op' is a valid
1265 /// SetCC operation. The U bit of the condition code has different meanings
1266 /// between floating point and integer comparisons and LLT's don't provide
1267 /// this distinction. As such we need to be told whether the comparison is
1268 /// floating point or integer-like. Pointers should use integer-like
1270 CondCode getSetCCInverse(CondCode Operation, bool isIntegerLike);
1271 } // end namespace GlobalISel
1273 /// Return the operation corresponding to (Y op X) when given the operation
1275 CondCode getSetCCSwappedOperands(CondCode Operation);
1277 /// Return the result of a logical OR between different comparisons of
1278 /// identical values: ((X op1 Y) | (X op2 Y)). This function returns
1279 /// SETCC_INVALID if it is not possible to represent the resultant comparison.
1280 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, EVT Type);
1282 /// Return the result of a logical AND between different comparisons of
1283 /// identical values: ((X op1 Y) & (X op2 Y)). This function returns
1284 /// SETCC_INVALID if it is not possible to represent the resultant comparison.
1285 CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, EVT Type);