1 //===-- llvm/CodeGen/MachineCombinerPattern.h - Instruction pattern supported by
2 // combiner ------*- C++ -*-===//
4 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 // See https://llvm.org/LICENSE.txt for license information.
6 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
8 //===----------------------------------------------------------------------===//
10 // This file defines instruction pattern supported by combiner
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CODEGEN_MACHINECOMBINERPATTERN_H
15 #define LLVM_CODEGEN_MACHINECOMBINERPATTERN_H
19 /// These are instruction patterns matched by the machine combiner pass.
20 enum class MachineCombinerPattern {
21 // These are commutative variants for reassociating a computation chain. See
22 // the comments before getMachineCombinerPatterns() in TargetInstrInfo.cpp.
28 // These are multiply-add patterns matched by the AArch64 machine combiner.
52 FMLAv1i32_indexed_OP1,
53 FMLAv1i32_indexed_OP2,
54 FMLAv1i64_indexed_OP1,
55 FMLAv1i64_indexed_OP2,
60 FMLAv2i32_indexed_OP1,
61 FMLAv2i32_indexed_OP2,
62 FMLAv2i64_indexed_OP1,
63 FMLAv2i64_indexed_OP2,
66 FMLAv4i32_indexed_OP1,
67 FMLAv4i32_indexed_OP2,
68 FMLSv1i32_indexed_OP2,
69 FMLSv1i64_indexed_OP2,
74 FMLSv2i32_indexed_OP1,
75 FMLSv2i32_indexed_OP2,
76 FMLSv2i64_indexed_OP1,
77 FMLSv2i64_indexed_OP2,
80 FMLSv4i32_indexed_OP1,
84 } // end namespace llvm