1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file defines interfaces to access the target independent code generation
10 // passes provided by the LLVM backend.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CODEGEN_PASSES_H
15 #define LLVM_CODEGEN_PASSES_H
17 #include "llvm/Support/CodeGen.h"
24 class MachineFunction;
25 class MachineFunctionPass;
30 class TargetRegisterClass;
33 } // End llvm namespace
35 /// List of target independent CodeGen pass IDs.
37 FunctionPass *createAtomicExpandPass();
39 /// createUnreachableBlockEliminationPass - The LLVM code generator does not
40 /// work well with unreachable basic blocks (what live ranges make sense for a
41 /// block that cannot be reached?). As such, a code generator should either
42 /// not instruction select unreachable blocks, or run this pass as its
43 /// last LLVM modifying pass to clean up blocks that are not reachable from
45 FunctionPass *createUnreachableBlockEliminationPass();
47 /// createBBSectionsPrepare Pass - This pass assigns sections to machine basic
48 /// blocks and is enabled with -fbasic-block-sections.
49 /// Buf is a memory buffer that contains the list of functions and basic
50 /// block ids to selectively enable basic block sections.
51 MachineFunctionPass *createBBSectionsPreparePass(const MemoryBuffer *Buf);
53 /// MachineFunctionPrinter pass - This pass prints out the machine function to
54 /// the given stream as a debugging tool.
56 createMachineFunctionPrinterPass(raw_ostream &OS,
57 const std::string &Banner ="");
59 /// MIRPrinting pass - this pass prints out the LLVM IR into the given stream
60 /// using the MIR serialization format.
61 MachineFunctionPass *createPrintMIRPass(raw_ostream &OS);
63 /// This pass resets a MachineFunction when it has the FailedISel property
64 /// as if it was just created.
65 /// If EmitFallbackDiag is true, the pass will emit a
66 /// DiagnosticInfoISelFallback for every MachineFunction it resets.
67 /// If AbortOnFailedISel is true, abort compilation instead of resetting.
68 MachineFunctionPass *createResetMachineFunctionPass(bool EmitFallbackDiag,
69 bool AbortOnFailedISel);
71 /// createCodeGenPreparePass - Transform the code to expose more pattern
72 /// matching during instruction selection.
73 FunctionPass *createCodeGenPreparePass();
75 /// createScalarizeMaskedMemIntrinPass - Replace masked load, store, gather
76 /// and scatter intrinsics with scalar code when target doesn't support them.
77 FunctionPass *createScalarizeMaskedMemIntrinPass();
79 /// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg
80 /// load-linked/store-conditional loops.
81 extern char &AtomicExpandID;
83 /// MachineLoopInfo - This pass is a loop analysis pass.
84 extern char &MachineLoopInfoID;
86 /// MachineDominators - This pass is a machine dominators analysis pass.
87 extern char &MachineDominatorsID;
89 /// MachineDominanaceFrontier - This pass is a machine dominators analysis pass.
90 extern char &MachineDominanceFrontierID;
92 /// MachineRegionInfo - This pass computes SESE regions for machine functions.
93 extern char &MachineRegionInfoPassID;
95 /// EdgeBundles analysis - Bundle machine CFG edges.
96 extern char &EdgeBundlesID;
98 /// LiveVariables pass - This pass computes the set of blocks in which each
99 /// variable is life and sets machine operand kill flags.
100 extern char &LiveVariablesID;
102 /// PHIElimination - This pass eliminates machine instruction PHI nodes
103 /// by inserting copy instructions. This destroys SSA information, but is the
104 /// desired input for some register allocators. This pass is "required" by
105 /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
106 extern char &PHIEliminationID;
108 /// LiveIntervals - This analysis keeps track of the live ranges of virtual
109 /// and physical registers.
110 extern char &LiveIntervalsID;
112 /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
113 extern char &LiveStacksID;
115 /// TwoAddressInstruction - This pass reduces two-address instructions to
116 /// use two operands. This destroys SSA information but it is desired by
117 /// register allocators.
118 extern char &TwoAddressInstructionPassID;
120 /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
121 extern char &ProcessImplicitDefsID;
123 /// RegisterCoalescer - This pass merges live ranges to eliminate copies.
124 extern char &RegisterCoalescerID;
126 /// MachineScheduler - This pass schedules machine instructions.
127 extern char &MachineSchedulerID;
129 /// PostMachineScheduler - This pass schedules machine instructions postRA.
130 extern char &PostMachineSchedulerID;
132 /// SpillPlacement analysis. Suggest optimal placement of spill code between
134 extern char &SpillPlacementID;
136 /// ShrinkWrap pass. Look for the best place to insert save and restore
137 // instruction and update the MachineFunctionInfo with that information.
138 extern char &ShrinkWrapID;
140 /// LiveRangeShrink pass. Move instruction close to its definition to shrink
141 /// the definition's live range.
142 extern char &LiveRangeShrinkID;
144 /// Greedy register allocator.
145 extern char &RAGreedyID;
147 /// Basic register allocator.
148 extern char &RABasicID;
150 /// VirtRegRewriter pass. Rewrite virtual registers to physical registers as
151 /// assigned in VirtRegMap.
152 extern char &VirtRegRewriterID;
154 /// UnreachableMachineBlockElimination - This pass removes unreachable
155 /// machine basic blocks.
156 extern char &UnreachableMachineBlockElimID;
158 /// DeadMachineInstructionElim - This pass removes dead machine instructions.
159 extern char &DeadMachineInstructionElimID;
161 /// This pass adds dead/undef flags after analyzing subregister lanes.
162 extern char &DetectDeadLanesID;
164 /// This pass perform post-ra machine sink for COPY instructions.
165 extern char &PostRAMachineSinkingID;
167 /// FastRegisterAllocation Pass - This pass register allocates as fast as
168 /// possible. It is best suited for debug code where live ranges are short.
170 FunctionPass *createFastRegisterAllocator();
172 /// BasicRegisterAllocation Pass - This pass implements a degenerate global
173 /// register allocator using the basic regalloc framework.
175 FunctionPass *createBasicRegisterAllocator();
177 /// Greedy register allocation pass - This pass implements a global register
178 /// allocator for optimized builds.
180 FunctionPass *createGreedyRegisterAllocator();
182 /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
183 /// Quadratic Prograaming (PBQP) based register allocator.
185 FunctionPass *createDefaultPBQPRegisterAllocator();
187 /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code,
188 /// and eliminates abstract frame references.
189 extern char &PrologEpilogCodeInserterID;
190 MachineFunctionPass *createPrologEpilogInserterPass();
192 /// ExpandPostRAPseudos - This pass expands pseudo instructions after
193 /// register allocation.
194 extern char &ExpandPostRAPseudosID;
196 /// PostRAHazardRecognizer - This pass runs the post-ra hazard
198 extern char &PostRAHazardRecognizerID;
200 /// PostRAScheduler - This pass performs post register allocation
202 extern char &PostRASchedulerID;
204 /// BranchFolding - This pass performs machine code CFG based
205 /// optimizations to delete branches to branches, eliminate branches to
206 /// successor blocks (creating fall throughs), and eliminating branches over
208 extern char &BranchFolderPassID;
210 /// BranchRelaxation - This pass replaces branches that need to jump further
211 /// than is supported by a branch instruction.
212 extern char &BranchRelaxationPassID;
214 /// MachineFunctionPrinterPass - This pass prints out MachineInstr's.
215 extern char &MachineFunctionPrinterPassID;
217 /// MIRPrintingPass - this pass prints out the LLVM IR using the MIR
218 /// serialization format.
219 extern char &MIRPrintingPassID;
221 /// TailDuplicate - Duplicate blocks with unconditional branches
222 /// into tails of their predecessors.
223 extern char &TailDuplicateID;
225 /// Duplicate blocks with unconditional branches into tails of their
226 /// predecessors. Variant that works before register allocation.
227 extern char &EarlyTailDuplicateID;
229 /// MachineTraceMetrics - This pass computes critical path and CPU resource
230 /// usage in an ensemble of traces.
231 extern char &MachineTraceMetricsID;
233 /// EarlyIfConverter - This pass performs if-conversion on SSA form by
234 /// inserting cmov instructions.
235 extern char &EarlyIfConverterID;
237 /// EarlyIfPredicator - This pass performs if-conversion on SSA form by
238 /// predicating if/else block and insert select at the join point.
239 extern char &EarlyIfPredicatorID;
241 /// This pass performs instruction combining using trace metrics to estimate
242 /// critical-path and resource depth.
243 extern char &MachineCombinerID;
245 /// StackSlotColoring - This pass performs stack coloring and merging.
246 /// It merges disjoint allocas to reduce the stack size.
247 extern char &StackColoringID;
249 /// IfConverter - This pass performs machine code if conversion.
250 extern char &IfConverterID;
252 FunctionPass *createIfConverter(
253 std::function<bool(const MachineFunction &)> Ftor);
255 /// MachineBlockPlacement - This pass places basic blocks based on branch
257 extern char &MachineBlockPlacementID;
259 /// MachineBlockPlacementStats - This pass collects statistics about the
260 /// basic block placement using branch probabilities and block frequency
262 extern char &MachineBlockPlacementStatsID;
264 /// GCLowering Pass - Used by gc.root to perform its default lowering
266 FunctionPass *createGCLoweringPass();
268 /// ShadowStackGCLowering - Implements the custom lowering mechanism
269 /// used by the shadow stack GC. Only runs on functions which opt in to
270 /// the shadow stack collector.
271 FunctionPass *createShadowStackGCLoweringPass();
273 /// GCMachineCodeAnalysis - Target-independent pass to mark safe points
274 /// in machine code. Must be added very late during code generation, just
275 /// prior to output, and importantly after all CFG transformations (such as
277 extern char &GCMachineCodeAnalysisID;
279 /// Creates a pass to print GC metadata.
281 FunctionPass *createGCInfoPrinter(raw_ostream &OS);
283 /// MachineCSE - This pass performs global CSE on machine instructions.
284 extern char &MachineCSEID;
286 /// MIRCanonicalizer - This pass canonicalizes MIR by renaming vregs
287 /// according to the semantics of the instruction as well as hoists
289 extern char &MIRCanonicalizerID;
291 /// ImplicitNullChecks - This pass folds null pointer checks into nearby
292 /// memory operations.
293 extern char &ImplicitNullChecksID;
295 /// This pass performs loop invariant code motion on machine instructions.
296 extern char &MachineLICMID;
298 /// This pass performs loop invariant code motion on machine instructions.
299 /// This variant works before register allocation. \see MachineLICMID.
300 extern char &EarlyMachineLICMID;
302 /// MachineSinking - This pass performs sinking on machine instructions.
303 extern char &MachineSinkingID;
305 /// MachineCopyPropagation - This pass performs copy propagation on
306 /// machine instructions.
307 extern char &MachineCopyPropagationID;
309 /// PeepholeOptimizer - This pass performs peephole optimizations -
310 /// like extension and comparison eliminations.
311 extern char &PeepholeOptimizerID;
313 /// OptimizePHIs - This pass optimizes machine instruction PHIs
314 /// to take advantage of opportunities created during DAG legalization.
315 extern char &OptimizePHIsID;
317 /// StackSlotColoring - This pass performs stack slot coloring.
318 extern char &StackSlotColoringID;
320 /// This pass lays out funclets contiguously.
321 extern char &FuncletLayoutID;
323 /// This pass inserts the XRay instrumentation sleds if they are supported by
324 /// the target platform.
325 extern char &XRayInstrumentationID;
327 /// This pass inserts FEntry calls
328 extern char &FEntryInserterID;
330 /// This pass implements the "patchable-function" attribute.
331 extern char &PatchableFunctionID;
333 /// createStackProtectorPass - This pass adds stack protectors to functions.
335 FunctionPass *createStackProtectorPass();
337 /// createMachineVerifierPass - This pass verifies cenerated machine code
338 /// instructions for correctness.
340 FunctionPass *createMachineVerifierPass(const std::string& Banner);
342 /// createDwarfEHPass - This pass mulches exception handling code into a form
343 /// adapted to code generation. Required if using dwarf exception handling.
344 FunctionPass *createDwarfEHPass(CodeGenOpt::Level OptLevel);
346 /// createWinEHPass - Prepares personality functions used by MSVC on Windows,
347 /// in addition to the Itanium LSDA based personalities.
348 FunctionPass *createWinEHPass(bool DemoteCatchSwitchPHIOnly = false);
350 /// createSjLjEHPreparePass - This pass adapts exception handling code to use
351 /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
353 FunctionPass *createSjLjEHPreparePass(const TargetMachine *TM);
355 /// createWasmEHPass - This pass adapts exception handling code to use
356 /// WebAssembly's exception handling scheme.
357 FunctionPass *createWasmEHPass();
359 /// LocalStackSlotAllocation - This pass assigns local frame indices to stack
360 /// slots relative to one another and allocates base registers to access them
361 /// when it is estimated by the target to be out of range of normal frame
362 /// pointer or stack pointer index addressing.
363 extern char &LocalStackSlotAllocationID;
365 /// This pass expands pseudo-instructions, reserves registers and adjusts
366 /// machine frame information.
367 extern char &FinalizeISelID;
369 /// UnpackMachineBundles - This pass unpack machine instruction bundles.
370 extern char &UnpackMachineBundlesID;
373 createUnpackMachineBundles(std::function<bool(const MachineFunction &)> Ftor);
375 /// FinalizeMachineBundles - This pass finalize machine instruction
376 /// bundles (created earlier, e.g. during pre-RA scheduling).
377 extern char &FinalizeMachineBundlesID;
379 /// StackMapLiveness - This pass analyses the register live-out set of
380 /// stackmap/patchpoint intrinsics and attaches the calculated information to
381 /// the intrinsic for later emission to the StackMap.
382 extern char &StackMapLivenessID;
384 /// LiveDebugValues pass
385 extern char &LiveDebugValuesID;
387 /// createJumpInstrTables - This pass creates jump-instruction tables.
388 ModulePass *createJumpInstrTablesPass();
390 /// createForwardControlFlowIntegrityPass - This pass adds control-flow
392 ModulePass *createForwardControlFlowIntegrityPass();
394 /// InterleavedAccess Pass - This pass identifies and matches interleaved
395 /// memory accesses to target specific intrinsics.
397 FunctionPass *createInterleavedAccessPass();
399 /// InterleavedLoadCombines Pass - This pass identifies interleaved loads and
400 /// combines them into wide loads detectable by InterleavedAccessPass
402 FunctionPass *createInterleavedLoadCombinePass();
404 /// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all
405 /// TLS variables for the emulated TLS model.
407 ModulePass *createLowerEmuTLSPass();
409 /// This pass lowers the \@llvm.load.relative and \@llvm.objc.* intrinsics to
410 /// instructions. This is unsafe to do earlier because a pass may combine the
411 /// constant initializer into the load, which may result in an overflowing
413 ModulePass *createPreISelIntrinsicLoweringPass();
415 /// GlobalMerge - This pass merges internal (by default) globals into structs
416 /// to enable reuse of a base pointer by indexed addressing modes.
417 /// It can also be configured to focus on size optimizations only.
419 Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset,
420 bool OnlyOptimizeForSize = false,
421 bool MergeExternalByDefault = false);
423 /// This pass splits the stack into a safe stack and an unsafe stack to
424 /// protect against stack-based overflow vulnerabilities.
425 FunctionPass *createSafeStackPass();
427 /// This pass detects subregister lanes in a virtual register that are used
428 /// independently of other lanes and splits them into separate virtual
430 extern char &RenameIndependentSubregsID;
432 /// This pass is executed POST-RA to collect which physical registers are
433 /// preserved by given machine function.
434 FunctionPass *createRegUsageInfoCollector();
436 /// Return a MachineFunction pass that identifies call sites
437 /// and propagates register usage information of callee to caller
438 /// if available with PysicalRegisterUsageInfo pass.
439 FunctionPass *createRegUsageInfoPropPass();
441 /// This pass performs software pipelining on machine instructions.
442 extern char &MachinePipelinerID;
444 /// This pass frees the memory occupied by the MachineFunction.
445 FunctionPass *createFreeMachineFunctionPass();
447 /// This pass performs outlining on machine instructions directly before
448 /// printing assembly.
449 ModulePass *createMachineOutlinerPass(bool RunOnAllFunctions = true);
451 /// This pass expands the experimental reduction intrinsics into sequences of
453 FunctionPass *createExpandReductionsPass();
455 // This pass expands memcmp() to load/stores.
456 FunctionPass *createExpandMemCmpPass();
458 /// Creates Break False Dependencies pass. \see BreakFalseDeps.cpp
459 FunctionPass *createBreakFalseDeps();
461 // This pass expands indirectbr instructions.
462 FunctionPass *createIndirectBrExpandPass();
464 /// Creates CFI Instruction Inserter pass. \see CFIInstrInserter.cpp
465 FunctionPass *createCFIInstrInserter();
467 /// Creates CFGuard longjmp target identification pass.
468 /// \see CFGuardLongjmp.cpp
469 FunctionPass *createCFGuardLongjmpPass();
471 /// Create Hardware Loop pass. \see HardwareLoops.cpp
472 FunctionPass *createHardwareLoopsPass();
474 /// Create IR Type Promotion pass. \see TypePromotion.cpp
475 FunctionPass *createTypePromotionPass();
477 /// Creates MIR Debugify pass. \see MachineDebugify.cpp
478 ModulePass *createDebugifyMachineModulePass();
480 /// Creates MIR Strip Debug pass. \see MachineStripDebug.cpp
481 /// If OnlyDebugified is true then it will only strip debug info if it was
482 /// added by a Debugify pass. The module will be left unchanged if the debug
483 /// info was generated by another source such as clang.
484 ModulePass *createStripDebugMachineModulePass(bool OnlyDebugified);
486 /// The pass fixups statepoint machine instruction to replace usage of
487 /// caller saved registers with stack slots.
488 extern char &FixupStatepointCallerSavedID;
489 } // End llvm namespace