1 //===-- ARMTargetParser - Parser for ARM target features --------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file implements a target parser to recognise ARM hardware features
10 // such as FPU/CPU/ARCH/extensions and specific support such as HWDIV.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_SUPPORT_ARMTARGETPARSER_H
15 #define LLVM_SUPPORT_ARMTARGETPARSER_H
17 #include "llvm/ADT/StringRef.h"
18 #include "llvm/Support/ARMBuildAttributes.h"
27 // Arch extension modifiers for CPUs.
28 // Note that this is not the same as the AArch64 list
29 enum ArchExtKind : uint64_t {
35 AEK_HWDIVTHUMB = 1 << 4,
36 AEK_HWDIVARM = 1 << 5,
44 AEK_DOTPROD = 1 << 13,
47 AEK_FP16FML = 1 << 16,
62 // Unsupported extensions.
64 AEK_IWMMXT = 1ULL << 60,
65 AEK_IWMMXT2 = 1ULL << 61,
66 AEK_MAVERICK = 1ULL << 62,
67 AEK_XSCALE = 1ULL << 63,
70 // List of Arch Extension names.
71 // FIXME: TableGen this.
77 const char *NegFeature;
79 StringRef getName() const { return StringRef(NameCStr, NameLength); }
82 const ExtName ARCHExtNames[] = {
83 #define ARM_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE) \
84 {NAME, sizeof(NAME) - 1, ID, FEATURE, NEGFEATURE},
85 #include "ARMTargetParser.def"
88 // List of HWDiv names (use getHWDivSynonym) and which architectural
89 // features they correspond to (use getHWDivFeatures).
90 // FIXME: TableGen this.
96 StringRef getName() const { return StringRef(NameCStr, NameLength); }
98 #define ARM_HW_DIV_NAME(NAME, ID) {NAME, sizeof(NAME) - 1, ID},
99 #include "ARMTargetParser.def"
103 enum class ArchKind {
104 #define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) ID,
105 #include "ARMTargetParser.def"
108 // List of CPU names and their arches.
109 // The same CPU can have multiple arches and can be default on multiple arches.
110 // When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
111 // When this becomes table-generated, we'd probably need two tables.
112 // FIXME: TableGen this.
113 template <typename T> struct CpuNames {
114 const char *NameCStr;
117 bool Default; // is $Name the default CPU for $ArchID ?
118 uint64_t DefaultExtensions;
120 StringRef getName() const { return StringRef(NameCStr, NameLength); }
123 const CpuNames<ArchKind> CPUNames[] = {
124 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
125 {NAME, sizeof(NAME) - 1, ARM::ArchKind::ID, IS_DEFAULT, DEFAULT_EXT},
126 #include "ARMTargetParser.def"
131 #define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) KIND,
132 #include "ARMTargetParser.def"
137 enum class FPUVersion {
147 // An FPU name restricts the FPU in one of three ways:
148 enum class FPURestriction {
149 None = 0, ///< No restriction
150 D16, ///< Only 16 D registers
151 SP_D16 ///< Only single-precision instructions, with 16 D registers
154 // An FPU name implies one of three levels of Neon support:
155 enum class NeonSupportLevel {
156 None = 0, ///< No Neon
158 Crypto ///< Neon with Crypto
162 enum class ISAKind { INVALID = 0, ARM, THUMB, AARCH64 };
165 // FIXME: BE8 vs. BE32?
166 enum class EndianKind { INVALID = 0, LITTLE, BIG };
169 enum class ProfileKind { INVALID = 0, A, R, M };
171 // List of canonical FPU names (use getFPUSynonym) and which architectural
172 // features they correspond to (use getFPUFeatures).
173 // FIXME: TableGen this.
174 // The entries must appear in the order listed in ARM::FPUKind for correct
177 const char *NameCStr;
181 NeonSupportLevel NeonSupport;
182 FPURestriction Restriction;
184 StringRef getName() const { return StringRef(NameCStr, NameLength); }
187 static const FPUName FPUNames[] = {
188 #define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) \
189 {NAME, sizeof(NAME) - 1, KIND, VERSION, NEON_SUPPORT, RESTRICTION},
190 #include "llvm/Support/ARMTargetParser.def"
193 // List of canonical arch names (use getArchSynonym).
194 // This table also provides the build attribute fields for CPU arch
195 // and Arch ID, according to the Addenda to the ARM ABI, chapters
196 // 2.4 and 2.3.5.2 respectively.
197 // FIXME: SubArch values were simplified to fit into the expectations
198 // of the triples and are not conforming with their official names.
199 // Check to see if the expectation should be changed.
200 // FIXME: TableGen this.
201 template <typename T> struct ArchNames {
202 const char *NameCStr;
204 const char *CPUAttrCStr;
205 size_t CPUAttrLength;
206 const char *SubArchCStr;
207 size_t SubArchLength;
209 uint64_t ArchBaseExtensions;
211 ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes.
213 StringRef getName() const { return StringRef(NameCStr, NameLength); }
215 // CPU class in build attributes.
216 StringRef getCPUAttr() const { return StringRef(CPUAttrCStr, CPUAttrLength); }
219 StringRef getSubArch() const { return StringRef(SubArchCStr, SubArchLength); }
222 static const ArchNames<ArchKind> ARCHNames[] = {
223 #define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, \
225 {NAME, sizeof(NAME) - 1, \
226 CPU_ATTR, sizeof(CPU_ATTR) - 1, \
227 SUB_ARCH, sizeof(SUB_ARCH) - 1, \
228 ARCH_FPU, ARCH_BASE_EXT, \
229 ArchKind::ID, ARCH_ATTR},
230 #include "llvm/Support/ARMTargetParser.def"
234 StringRef getFPUName(unsigned FPUKind);
235 FPUVersion getFPUVersion(unsigned FPUKind);
236 NeonSupportLevel getFPUNeonSupportLevel(unsigned FPUKind);
237 FPURestriction getFPURestriction(unsigned FPUKind);
239 // FIXME: These should be moved to TargetTuple once it exists
240 bool getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features);
241 bool getHWDivFeatures(uint64_t HWDivKind, std::vector<StringRef> &Features);
242 bool getExtensionFeatures(uint64_t Extensions,
243 std::vector<StringRef> &Features);
245 StringRef getArchName(ArchKind AK);
246 unsigned getArchAttr(ArchKind AK);
247 StringRef getCPUAttr(ArchKind AK);
248 StringRef getSubArch(ArchKind AK);
249 StringRef getArchExtName(uint64_t ArchExtKind);
250 StringRef getArchExtFeature(StringRef ArchExt);
251 bool appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK, StringRef ArchExt,
252 std::vector<StringRef> &Features,
253 unsigned &ArgFPUKind);
255 // Information by Name
256 unsigned getDefaultFPU(StringRef CPU, ArchKind AK);
257 uint64_t getDefaultExtensions(StringRef CPU, ArchKind AK);
258 StringRef getDefaultCPU(StringRef Arch);
259 StringRef getCanonicalArchName(StringRef Arch);
260 StringRef getFPUSynonym(StringRef FPU);
261 StringRef getArchSynonym(StringRef Arch);
264 uint64_t parseHWDiv(StringRef HWDiv);
265 unsigned parseFPU(StringRef FPU);
266 ArchKind parseArch(StringRef Arch);
267 uint64_t parseArchExt(StringRef ArchExt);
268 ArchKind parseCPUArch(StringRef CPU);
269 ISAKind parseArchISA(StringRef Arch);
270 EndianKind parseArchEndian(StringRef Arch);
271 ProfileKind parseArchProfile(StringRef Arch);
272 unsigned parseArchVersion(StringRef Arch);
274 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
275 StringRef computeDefaultTargetABI(const Triple &TT, StringRef CPU);