1 //===-- ARMTargetParser - Parser for ARM target features --------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file implements a target parser to recognise ARM hardware features
10 // such as FPU/CPU/ARCH/extensions and specific support such as HWDIV.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_SUPPORT_ARMTARGETPARSER_H
15 #define LLVM_SUPPORT_ARMTARGETPARSER_H
17 #include "llvm/ADT/SmallVector.h"
18 #include "llvm/ADT/StringRef.h"
19 #include "llvm/Support/ARMBuildAttributes.h"
28 // Arch extension modifiers for CPUs.
29 // Note that this is not the same as the AArch64 list
30 enum ArchExtKind : uint64_t {
36 AEK_HWDIVTHUMB = 1 << 4,
37 AEK_HWDIVARM = 1 << 5,
45 AEK_DOTPROD = 1 << 13,
48 AEK_FP16FML = 1 << 16,
63 // Unsupported extensions.
65 AEK_IWMMXT = 1ULL << 60,
66 AEK_IWMMXT2 = 1ULL << 61,
67 AEK_MAVERICK = 1ULL << 62,
68 AEK_XSCALE = 1ULL << 63,
71 // List of Arch Extension names.
72 // FIXME: TableGen this.
78 const char *NegFeature;
80 StringRef getName() const { return StringRef(NameCStr, NameLength); }
83 const ExtName ARCHExtNames[] = {
84 #define ARM_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE) \
85 {NAME, sizeof(NAME) - 1, ID, FEATURE, NEGFEATURE},
86 #include "ARMTargetParser.def"
89 // List of HWDiv names (use getHWDivSynonym) and which architectural
90 // features they correspond to (use getHWDivFeatures).
91 // FIXME: TableGen this.
97 StringRef getName() const { return StringRef(NameCStr, NameLength); }
99 #define ARM_HW_DIV_NAME(NAME, ID) {NAME, sizeof(NAME) - 1, ID},
100 #include "ARMTargetParser.def"
104 enum class ArchKind {
105 #define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) ID,
106 #include "ARMTargetParser.def"
109 // List of CPU names and their arches.
110 // The same CPU can have multiple arches and can be default on multiple arches.
111 // When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
112 // When this becomes table-generated, we'd probably need two tables.
113 // FIXME: TableGen this.
114 template <typename T> struct CpuNames {
115 const char *NameCStr;
118 bool Default; // is $Name the default CPU for $ArchID ?
119 uint64_t DefaultExtensions;
121 StringRef getName() const { return StringRef(NameCStr, NameLength); }
124 const CpuNames<ArchKind> CPUNames[] = {
125 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
126 {NAME, sizeof(NAME) - 1, ARM::ArchKind::ID, IS_DEFAULT, DEFAULT_EXT},
127 #include "ARMTargetParser.def"
132 #define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) KIND,
133 #include "ARMTargetParser.def"
138 enum class FPUVersion {
148 // An FPU name restricts the FPU in one of three ways:
149 enum class FPURestriction {
150 None = 0, ///< No restriction
151 D16, ///< Only 16 D registers
152 SP_D16 ///< Only single-precision instructions, with 16 D registers
155 // An FPU name implies one of three levels of Neon support:
156 enum class NeonSupportLevel {
157 None = 0, ///< No Neon
159 Crypto ///< Neon with Crypto
163 enum class ISAKind { INVALID = 0, ARM, THUMB, AARCH64 };
166 // FIXME: BE8 vs. BE32?
167 enum class EndianKind { INVALID = 0, LITTLE, BIG };
170 enum class ProfileKind { INVALID = 0, A, R, M };
172 // List of canonical FPU names (use getFPUSynonym) and which architectural
173 // features they correspond to (use getFPUFeatures).
174 // FIXME: TableGen this.
175 // The entries must appear in the order listed in ARM::FPUKind for correct
178 const char *NameCStr;
182 NeonSupportLevel NeonSupport;
183 FPURestriction Restriction;
185 StringRef getName() const { return StringRef(NameCStr, NameLength); }
188 static const FPUName FPUNames[] = {
189 #define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) \
190 {NAME, sizeof(NAME) - 1, KIND, VERSION, NEON_SUPPORT, RESTRICTION},
191 #include "llvm/Support/ARMTargetParser.def"
194 // List of canonical arch names (use getArchSynonym).
195 // This table also provides the build attribute fields for CPU arch
196 // and Arch ID, according to the Addenda to the ARM ABI, chapters
197 // 2.4 and 2.3.5.2 respectively.
198 // FIXME: SubArch values were simplified to fit into the expectations
199 // of the triples and are not conforming with their official names.
200 // Check to see if the expectation should be changed.
201 // FIXME: TableGen this.
202 template <typename T> struct ArchNames {
203 const char *NameCStr;
205 const char *CPUAttrCStr;
206 size_t CPUAttrLength;
207 const char *SubArchCStr;
208 size_t SubArchLength;
210 uint64_t ArchBaseExtensions;
212 ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes.
214 StringRef getName() const { return StringRef(NameCStr, NameLength); }
216 // CPU class in build attributes.
217 StringRef getCPUAttr() const { return StringRef(CPUAttrCStr, CPUAttrLength); }
220 StringRef getSubArch() const { return StringRef(SubArchCStr, SubArchLength); }
223 static const ArchNames<ArchKind> ARCHNames[] = {
224 #define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, \
226 {NAME, sizeof(NAME) - 1, \
227 CPU_ATTR, sizeof(CPU_ATTR) - 1, \
228 SUB_ARCH, sizeof(SUB_ARCH) - 1, \
229 ARCH_FPU, ARCH_BASE_EXT, \
230 ArchKind::ID, ARCH_ATTR},
231 #include "llvm/Support/ARMTargetParser.def"
235 StringRef getFPUName(unsigned FPUKind);
236 FPUVersion getFPUVersion(unsigned FPUKind);
237 NeonSupportLevel getFPUNeonSupportLevel(unsigned FPUKind);
238 FPURestriction getFPURestriction(unsigned FPUKind);
240 // FIXME: These should be moved to TargetTuple once it exists
241 bool getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features);
242 bool getHWDivFeatures(uint64_t HWDivKind, std::vector<StringRef> &Features);
243 bool getExtensionFeatures(uint64_t Extensions,
244 std::vector<StringRef> &Features);
246 StringRef getArchName(ArchKind AK);
247 unsigned getArchAttr(ArchKind AK);
248 StringRef getCPUAttr(ArchKind AK);
249 StringRef getSubArch(ArchKind AK);
250 StringRef getArchExtName(uint64_t ArchExtKind);
251 StringRef getArchExtFeature(StringRef ArchExt);
252 bool appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK, StringRef ArchExt,
253 std::vector<StringRef> &Features);
254 StringRef getHWDivName(uint64_t HWDivKind);
256 // Information by Name
257 unsigned getDefaultFPU(StringRef CPU, ArchKind AK);
258 uint64_t getDefaultExtensions(StringRef CPU, ArchKind AK);
259 StringRef getDefaultCPU(StringRef Arch);
260 StringRef getCanonicalArchName(StringRef Arch);
261 StringRef getFPUSynonym(StringRef FPU);
262 StringRef getArchSynonym(StringRef Arch);
265 uint64_t parseHWDiv(StringRef HWDiv);
266 unsigned parseFPU(StringRef FPU);
267 ArchKind parseArch(StringRef Arch);
268 uint64_t parseArchExt(StringRef ArchExt);
269 ArchKind parseCPUArch(StringRef CPU);
270 ISAKind parseArchISA(StringRef Arch);
271 EndianKind parseArchEndian(StringRef Arch);
272 ProfileKind parseArchProfile(StringRef Arch);
273 unsigned parseArchVersion(StringRef Arch);
275 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
276 StringRef computeDefaultTargetABI(const Triple &TT, StringRef CPU);