1 //===-- TargetParser - Parser for target features ---------------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file implements a target parser to recognise hardware features such as
10 // FPU/CPU/ARCH names as well as specific support such as HDIV, etc.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_SUPPORT_TARGETPARSER_H
15 #define LLVM_SUPPORT_TARGETPARSER_H
17 // FIXME: vector is used because that's what clang uses for subtarget feature
18 // lists, but SmallVector would probably be better
19 #include "llvm/ADT/Triple.h"
20 #include "llvm/Support/ARMTargetParser.h"
21 #include "llvm/Support/AArch64TargetParser.h"
27 // Target specific information in their own namespaces.
28 // (ARM/AArch64/X86 are declared in ARM/AArch64/X86TargetParser.h)
29 // These should be generated from TableGen because the information is already
30 // there, and there is where new information about targets will be added.
31 // FIXME: To TableGen this we need to make some table generated files available
32 // even if the back-end is not compiled with LLVM, plus we need to create a new
33 // back-end to TableGen to create these clean tables.
36 /// GPU kinds supported by the AMDGPU target.
37 enum GPUKind : uint32_t {
38 // Not specified processor.
41 // R600-based processors.
59 GK_R600_FIRST = GK_R600,
60 GK_R600_LAST = GK_TURKS,
62 // AMDGCN-based processors.
89 GK_AMDGCN_FIRST = GK_GFX600,
90 GK_AMDGCN_LAST = GK_GFX1030,
93 /// Instruction set architecture version.
100 // This isn't comprehensive for now, just things that are needed from the
102 enum ArchFeatureKind : uint32_t {
105 // These features only exist for r600, and are implied true for amdgcn.
106 FEATURE_FMA = 1 << 1,
107 FEATURE_LDEXP = 1 << 2,
108 FEATURE_FP64 = 1 << 3,
111 FEATURE_FAST_FMA_F32 = 1 << 4,
112 FEATURE_FAST_DENORMAL_F32 = 1 << 5,
114 // Wavefront 32 is available.
115 FEATURE_WAVE32 = 1 << 6
118 StringRef getArchNameAMDGCN(GPUKind AK);
119 StringRef getArchNameR600(GPUKind AK);
120 StringRef getCanonicalArchName(StringRef Arch);
121 GPUKind parseArchAMDGCN(StringRef CPU);
122 GPUKind parseArchR600(StringRef CPU);
123 unsigned getArchAttrAMDGCN(GPUKind AK);
124 unsigned getArchAttrR600(GPUKind AK);
126 void fillValidArchListAMDGCN(SmallVectorImpl<StringRef> &Values);
127 void fillValidArchListR600(SmallVectorImpl<StringRef> &Values);
129 IsaVersion getIsaVersion(StringRef GPU);
131 } // namespace AMDGPU
135 enum CPUKind : unsigned {
136 #define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH) CK_##ENUM,
137 #include "RISCVTargetParser.def"
140 enum FeatureKind : unsigned {
151 bool checkCPUKind(CPUKind Kind, bool IsRV64);
152 CPUKind parseCPUKind(StringRef CPU);
153 StringRef getMArchFromMcpu(StringRef CPU);
154 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64);
155 bool getCPUFeaturesExceptStdExt(CPUKind Kind, std::vector<StringRef> &Features);