1 //===-------------- MIRCanonicalizer.cpp - MIR Canonicalizer --------------===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // The purpose of this pass is to employ a canonical code transformation so
10 // that code compiled with slightly different IR passes can be diffed more
11 // effectively than otherwise. This is done by renaming vregs in a given
12 // LiveRange in a canonical way. This pass also does a pseudo-scheduling to
13 // move defs closer to their use inorder to reduce diffs caused by slightly
14 // different schedules.
18 // llc -o - -run-pass mir-canonicalizer example.mir
20 // Reorders instructions canonically.
21 // Renames virtual register operands canonically.
22 // Strips certain MIR artifacts (optionally).
24 //===----------------------------------------------------------------------===//
26 #include "MIRVRegNamerUtils.h"
27 #include "llvm/ADT/PostOrderIterator.h"
28 #include "llvm/ADT/STLExtras.h"
29 #include "llvm/CodeGen/MachineFunctionPass.h"
30 #include "llvm/CodeGen/MachineInstrBuilder.h"
31 #include "llvm/CodeGen/MachineRegisterInfo.h"
32 #include "llvm/CodeGen/Passes.h"
33 #include "llvm/InitializePasses.h"
34 #include "llvm/Support/Debug.h"
35 #include "llvm/Support/raw_ostream.h"
42 extern char &MIRCanonicalizerID;
45 #define DEBUG_TYPE "mir-canonicalizer"
47 static cl::opt<unsigned>
48 CanonicalizeFunctionNumber("canon-nth-function", cl::Hidden, cl::init(~0u),
50 cl::desc("Function number to canonicalize."));
54 class MIRCanonicalizer : public MachineFunctionPass {
57 MIRCanonicalizer() : MachineFunctionPass(ID) {}
59 StringRef getPassName() const override {
60 return "Rename register operands in a canonical ordering.";
63 void getAnalysisUsage(AnalysisUsage &AU) const override {
65 MachineFunctionPass::getAnalysisUsage(AU);
68 bool runOnMachineFunction(MachineFunction &MF) override;
71 } // end anonymous namespace
73 char MIRCanonicalizer::ID;
75 char &llvm::MIRCanonicalizerID = MIRCanonicalizer::ID;
77 INITIALIZE_PASS_BEGIN(MIRCanonicalizer, "mir-canonicalizer",
78 "Rename Register Operands Canonically", false, false)
80 INITIALIZE_PASS_END(MIRCanonicalizer, "mir-canonicalizer",
81 "Rename Register Operands Canonically", false, false)
83 static std::vector<MachineBasicBlock *> GetRPOList(MachineFunction &MF) {
86 ReversePostOrderTraversal<MachineBasicBlock *> RPOT(&*MF.begin());
87 std::vector<MachineBasicBlock *> RPOList;
88 for (auto MBB : RPOT) {
89 RPOList.push_back(MBB);
96 rescheduleLexographically(std::vector<MachineInstr *> instructions,
97 MachineBasicBlock *MBB,
98 std::function<MachineBasicBlock::iterator()> getPos) {
100 bool Changed = false;
101 using StringInstrPair = std::pair<std::string, MachineInstr *>;
102 std::vector<StringInstrPair> StringInstrMap;
104 for (auto *II : instructions) {
106 raw_string_ostream OS(S);
110 // Trim the assignment, or start from the begining in the case of a store.
111 const size_t i = S.find("=");
112 StringInstrMap.push_back({(i == std::string::npos) ? S : S.substr(i), II});
115 llvm::sort(StringInstrMap,
116 [](const StringInstrPair &a, const StringInstrPair &b) -> bool {
117 return (a.first < b.first);
120 for (auto &II : StringInstrMap) {
123 dbgs() << "Splicing ";
125 dbgs() << " right before: ";
130 MBB->splice(getPos(), MBB, II.second);
136 static bool rescheduleCanonically(unsigned &PseudoIdempotentInstCount,
137 MachineBasicBlock *MBB) {
139 bool Changed = false;
141 // Calculates the distance of MI from the begining of its parent BB.
142 auto getInstrIdx = [](const MachineInstr &MI) {
144 for (auto &CurMI : *MI.getParent()) {
152 // Pre-Populate vector of instructions to reschedule so that we don't
153 // clobber the iterator.
154 std::vector<MachineInstr *> Instructions;
155 for (auto &MI : *MBB) {
156 Instructions.push_back(&MI);
159 std::map<MachineInstr *, std::vector<MachineInstr *>> MultiUsers;
160 std::map<unsigned, MachineInstr *> MultiUserLookup;
161 unsigned UseToBringDefCloserToCount = 0;
162 std::vector<MachineInstr *> PseudoIdempotentInstructions;
163 std::vector<unsigned> PhysRegDefs;
164 for (auto *II : Instructions) {
165 for (unsigned i = 1; i < II->getNumOperands(); i++) {
166 MachineOperand &MO = II->getOperand(i);
170 if (Register::isVirtualRegister(MO.getReg()))
176 PhysRegDefs.push_back(MO.getReg());
180 for (auto *II : Instructions) {
181 if (II->getNumOperands() == 0)
183 if (II->mayLoadOrStore())
186 MachineOperand &MO = II->getOperand(0);
187 if (!MO.isReg() || !Register::isVirtualRegister(MO.getReg()))
192 bool IsPseudoIdempotent = true;
193 for (unsigned i = 1; i < II->getNumOperands(); i++) {
195 if (II->getOperand(i).isImm()) {
199 if (II->getOperand(i).isReg()) {
200 if (!Register::isVirtualRegister(II->getOperand(i).getReg()))
201 if (llvm::find(PhysRegDefs, II->getOperand(i).getReg()) ==
207 IsPseudoIdempotent = false;
211 if (IsPseudoIdempotent) {
212 PseudoIdempotentInstructions.push_back(II);
216 LLVM_DEBUG(dbgs() << "Operand " << 0 << " of "; II->dump(); MO.dump(););
218 MachineInstr *Def = II;
219 unsigned Distance = ~0U;
220 MachineInstr *UseToBringDefCloserTo = nullptr;
221 MachineRegisterInfo *MRI = &MBB->getParent()->getRegInfo();
222 for (auto &UO : MRI->use_nodbg_operands(MO.getReg())) {
223 MachineInstr *UseInst = UO.getParent();
225 const unsigned DefLoc = getInstrIdx(*Def);
226 const unsigned UseLoc = getInstrIdx(*UseInst);
227 const unsigned Delta = (UseLoc - DefLoc);
229 if (UseInst->getParent() != Def->getParent())
231 if (DefLoc >= UseLoc)
234 if (Delta < Distance) {
236 UseToBringDefCloserTo = UseInst;
237 MultiUserLookup[UseToBringDefCloserToCount++] = UseToBringDefCloserTo;
241 const auto BBE = MBB->instr_end();
242 MachineBasicBlock::iterator DefI = BBE;
243 MachineBasicBlock::iterator UseI = BBE;
245 for (auto BBI = MBB->instr_begin(); BBI != BBE; ++BBI) {
247 if (DefI != BBE && UseI != BBE)
255 if (&*BBI == UseToBringDefCloserTo) {
261 if (DefI == BBE || UseI == BBE)
265 dbgs() << "Splicing ";
267 dbgs() << " right before: ";
271 MultiUsers[UseToBringDefCloserTo].push_back(Def);
273 MBB->splice(UseI, MBB, DefI);
276 // Sort the defs for users of multiple defs lexographically.
277 for (const auto &E : MultiUserLookup) {
280 std::find_if(MBB->instr_begin(), MBB->instr_end(),
281 [&](MachineInstr &MI) -> bool { return &MI == E.second; });
283 if (UseI == MBB->instr_end())
287 dbgs() << "Rescheduling Multi-Use Instructions Lexographically.";);
288 Changed |= rescheduleLexographically(
289 MultiUsers[E.second], MBB,
290 [&]() -> MachineBasicBlock::iterator { return UseI; });
293 PseudoIdempotentInstCount = PseudoIdempotentInstructions.size();
295 dbgs() << "Rescheduling Idempotent Instructions Lexographically.";);
296 Changed |= rescheduleLexographically(
297 PseudoIdempotentInstructions, MBB,
298 [&]() -> MachineBasicBlock::iterator { return MBB->begin(); });
303 static bool propagateLocalCopies(MachineBasicBlock *MBB) {
304 bool Changed = false;
305 MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo();
307 std::vector<MachineInstr *> Copies;
308 for (MachineInstr &MI : MBB->instrs()) {
310 Copies.push_back(&MI);
313 for (MachineInstr *MI : Copies) {
315 if (!MI->getOperand(0).isReg())
317 if (!MI->getOperand(1).isReg())
320 const Register Dst = MI->getOperand(0).getReg();
321 const Register Src = MI->getOperand(1).getReg();
323 if (!Register::isVirtualRegister(Dst))
325 if (!Register::isVirtualRegister(Src))
327 // Not folding COPY instructions if regbankselect has not set the RCs.
328 // Why are we only considering Register Classes? Because the verifier
329 // sometimes gets upset if the register classes don't match even if the
330 // types do. A future patch might add COPY folding for matching types in
331 // pre-registerbankselect code.
332 if (!MRI.getRegClassOrNull(Dst))
334 if (MRI.getRegClass(Dst) != MRI.getRegClass(Src))
337 std::vector<MachineOperand *> Uses;
338 for (auto UI = MRI.use_begin(Dst); UI != MRI.use_end(); ++UI)
339 Uses.push_back(&*UI);
340 for (auto *MO : Uses)
344 MI->eraseFromParent();
350 static bool doDefKillClear(MachineBasicBlock *MBB) {
351 bool Changed = false;
353 for (auto &MI : *MBB) {
354 for (auto &MO : MI.operands()) {
357 if (!MO.isDef() && MO.isKill()) {
362 if (MO.isDef() && MO.isDead()) {
372 static bool runOnBasicBlock(MachineBasicBlock *MBB,
373 unsigned BasicBlockNum, VRegRenamer &Renamer) {
375 dbgs() << "\n\n NEW BASIC BLOCK: " << MBB->getName() << " \n\n";
376 dbgs() << "\n\n================================================\n\n";
379 bool Changed = false;
381 LLVM_DEBUG(dbgs() << "\n\n NEW BASIC BLOCK: " << MBB->getName() << "\n\n";);
383 LLVM_DEBUG(dbgs() << "MBB Before Canonical Copy Propagation:\n";
385 Changed |= propagateLocalCopies(MBB);
386 LLVM_DEBUG(dbgs() << "MBB After Canonical Copy Propagation:\n"; MBB->dump(););
388 LLVM_DEBUG(dbgs() << "MBB Before Scheduling:\n"; MBB->dump(););
389 unsigned IdempotentInstCount = 0;
390 Changed |= rescheduleCanonically(IdempotentInstCount, MBB);
391 LLVM_DEBUG(dbgs() << "MBB After Scheduling:\n"; MBB->dump(););
393 Changed |= Renamer.renameVRegs(MBB, BasicBlockNum);
395 // TODO: Consider dropping this. Dropping kill defs is probably not
396 // semantically sound.
397 Changed |= doDefKillClear(MBB);
399 LLVM_DEBUG(dbgs() << "Updated MachineBasicBlock:\n"; MBB->dump();
402 dbgs() << "\n\n================================================\n\n");
406 bool MIRCanonicalizer::runOnMachineFunction(MachineFunction &MF) {
408 static unsigned functionNum = 0;
409 if (CanonicalizeFunctionNumber != ~0U) {
410 if (CanonicalizeFunctionNumber != functionNum++)
412 LLVM_DEBUG(dbgs() << "\n Canonicalizing Function " << MF.getName()
416 // we need a valid vreg to create a vreg type for skipping all those
417 // stray vreg numbers so reach alignment/canonical vreg values.
418 std::vector<MachineBasicBlock *> RPOList = GetRPOList(MF);
421 dbgs() << "\n\n NEW MACHINE FUNCTION: " << MF.getName() << " \n\n";
422 dbgs() << "\n\n================================================\n\n";
423 dbgs() << "Total Basic Blocks: " << RPOList.size() << "\n";
425 : RPOList) { dbgs() << MBB->getName() << "\n"; } dbgs()
426 << "\n\n================================================\n\n";);
429 bool Changed = false;
430 MachineRegisterInfo &MRI = MF.getRegInfo();
431 VRegRenamer Renamer(MRI);
432 for (auto MBB : RPOList)
433 Changed |= runOnBasicBlock(MBB, BBNum++, Renamer);