1 //===- RDFGraph.cpp -------------------------------------------------------===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // Target-independent, SSA-based data flow graph for register data flow (RDF).
11 #include "llvm/ADT/BitVector.h"
12 #include "llvm/ADT/STLExtras.h"
13 #include "llvm/ADT/SetVector.h"
14 #include "llvm/CodeGen/MachineBasicBlock.h"
15 #include "llvm/CodeGen/MachineDominanceFrontier.h"
16 #include "llvm/CodeGen/MachineDominators.h"
17 #include "llvm/CodeGen/MachineFunction.h"
18 #include "llvm/CodeGen/MachineInstr.h"
19 #include "llvm/CodeGen/MachineOperand.h"
20 #include "llvm/CodeGen/MachineRegisterInfo.h"
21 #include "llvm/CodeGen/RDFGraph.h"
22 #include "llvm/CodeGen/RDFRegisters.h"
23 #include "llvm/CodeGen/TargetInstrInfo.h"
24 #include "llvm/CodeGen/TargetLowering.h"
25 #include "llvm/CodeGen/TargetRegisterInfo.h"
26 #include "llvm/CodeGen/TargetSubtargetInfo.h"
27 #include "llvm/IR/Function.h"
28 #include "llvm/MC/LaneBitmask.h"
29 #include "llvm/MC/MCInstrDesc.h"
30 #include "llvm/MC/MCRegisterInfo.h"
31 #include "llvm/Support/Debug.h"
32 #include "llvm/Support/ErrorHandling.h"
33 #include "llvm/Support/raw_ostream.h"
46 // Printing functions. Have them here first, so that the rest of the code
51 raw_ostream &operator<< (raw_ostream &OS, const PrintLaneMaskOpt &P) {
53 OS << ':' << PrintLaneMask(P.Mask);
57 raw_ostream &operator<< (raw_ostream &OS, const Print<RegisterRef> &P) {
58 auto &TRI = P.G.getTRI();
59 if (P.Obj.Reg > 0 && P.Obj.Reg < TRI.getNumRegs())
60 OS << TRI.getName(P.Obj.Reg);
62 OS << '#' << P.Obj.Reg;
63 OS << PrintLaneMaskOpt(P.Obj.Mask);
67 raw_ostream &operator<< (raw_ostream &OS, const Print<NodeId> &P) {
68 auto NA = P.G.addr<NodeBase*>(P.Obj);
69 uint16_t Attrs = NA.Addr->getAttrs();
70 uint16_t Kind = NodeAttrs::kind(Attrs);
71 uint16_t Flags = NodeAttrs::flags(Attrs);
72 switch (NodeAttrs::type(Attrs)) {
75 case NodeAttrs::Func: OS << 'f'; break;
76 case NodeAttrs::Block: OS << 'b'; break;
77 case NodeAttrs::Stmt: OS << 's'; break;
78 case NodeAttrs::Phi: OS << 'p'; break;
79 default: OS << "c?"; break;
83 if (Flags & NodeAttrs::Undef)
85 if (Flags & NodeAttrs::Dead)
87 if (Flags & NodeAttrs::Preserving)
89 if (Flags & NodeAttrs::Clobbering)
92 case NodeAttrs::Use: OS << 'u'; break;
93 case NodeAttrs::Def: OS << 'd'; break;
94 case NodeAttrs::Block: OS << 'b'; break;
95 default: OS << "r?"; break;
103 if (Flags & NodeAttrs::Shadow)
108 static void printRefHeader(raw_ostream &OS, const NodeAddr<RefNode*> RA,
109 const DataFlowGraph &G) {
110 OS << Print<NodeId>(RA.Id, G) << '<'
111 << Print<RegisterRef>(RA.Addr->getRegRef(G), G) << '>';
112 if (RA.Addr->getFlags() & NodeAttrs::Fixed)
116 raw_ostream &operator<< (raw_ostream &OS, const Print<NodeAddr<DefNode*>> &P) {
117 printRefHeader(OS, P.Obj, P.G);
119 if (NodeId N = P.Obj.Addr->getReachingDef())
120 OS << Print<NodeId>(N, P.G);
122 if (NodeId N = P.Obj.Addr->getReachedDef())
123 OS << Print<NodeId>(N, P.G);
125 if (NodeId N = P.Obj.Addr->getReachedUse())
126 OS << Print<NodeId>(N, P.G);
128 if (NodeId N = P.Obj.Addr->getSibling())
129 OS << Print<NodeId>(N, P.G);
133 raw_ostream &operator<< (raw_ostream &OS, const Print<NodeAddr<UseNode*>> &P) {
134 printRefHeader(OS, P.Obj, P.G);
136 if (NodeId N = P.Obj.Addr->getReachingDef())
137 OS << Print<NodeId>(N, P.G);
139 if (NodeId N = P.Obj.Addr->getSibling())
140 OS << Print<NodeId>(N, P.G);
144 raw_ostream &operator<< (raw_ostream &OS,
145 const Print<NodeAddr<PhiUseNode*>> &P) {
146 printRefHeader(OS, P.Obj, P.G);
148 if (NodeId N = P.Obj.Addr->getReachingDef())
149 OS << Print<NodeId>(N, P.G);
151 if (NodeId N = P.Obj.Addr->getPredecessor())
152 OS << Print<NodeId>(N, P.G);
154 if (NodeId N = P.Obj.Addr->getSibling())
155 OS << Print<NodeId>(N, P.G);
159 raw_ostream &operator<< (raw_ostream &OS, const Print<NodeAddr<RefNode*>> &P) {
160 switch (P.Obj.Addr->getKind()) {
162 OS << PrintNode<DefNode*>(P.Obj, P.G);
165 if (P.Obj.Addr->getFlags() & NodeAttrs::PhiRef)
166 OS << PrintNode<PhiUseNode*>(P.Obj, P.G);
168 OS << PrintNode<UseNode*>(P.Obj, P.G);
174 raw_ostream &operator<< (raw_ostream &OS, const Print<NodeList> &P) {
175 unsigned N = P.Obj.size();
176 for (auto I : P.Obj) {
177 OS << Print<NodeId>(I.Id, P.G);
184 raw_ostream &operator<< (raw_ostream &OS, const Print<NodeSet> &P) {
185 unsigned N = P.Obj.size();
186 for (auto I : P.Obj) {
187 OS << Print<NodeId>(I, P.G);
196 template <typename T>
198 PrintListV(const NodeList &L, const DataFlowGraph &G) : List(L), G(G) {}
201 const NodeList &List;
202 const DataFlowGraph &G;
205 template <typename T>
206 raw_ostream &operator<< (raw_ostream &OS, const PrintListV<T> &P) {
207 unsigned N = P.List.size();
208 for (NodeAddr<T> A : P.List) {
209 OS << PrintNode<T>(A, P.G);
216 } // end anonymous namespace
218 raw_ostream &operator<< (raw_ostream &OS, const Print<NodeAddr<PhiNode*>> &P) {
219 OS << Print<NodeId>(P.Obj.Id, P.G) << ": phi ["
220 << PrintListV<RefNode*>(P.Obj.Addr->members(P.G), P.G) << ']';
224 raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<StmtNode *>> &P) {
225 const MachineInstr &MI = *P.Obj.Addr->getCode();
226 unsigned Opc = MI.getOpcode();
227 OS << Print<NodeId>(P.Obj.Id, P.G) << ": " << P.G.getTII().getName(Opc);
228 // Print the target for calls and branches (for readability).
229 if (MI.isCall() || MI.isBranch()) {
230 MachineInstr::const_mop_iterator T =
231 llvm::find_if(MI.operands(),
232 [] (const MachineOperand &Op) -> bool {
233 return Op.isMBB() || Op.isGlobal() || Op.isSymbol();
235 if (T != MI.operands_end()) {
238 OS << printMBBReference(*T->getMBB());
239 else if (T->isGlobal())
240 OS << T->getGlobal()->getName();
241 else if (T->isSymbol())
242 OS << T->getSymbolName();
245 OS << " [" << PrintListV<RefNode*>(P.Obj.Addr->members(P.G), P.G) << ']';
249 raw_ostream &operator<< (raw_ostream &OS,
250 const Print<NodeAddr<InstrNode*>> &P) {
251 switch (P.Obj.Addr->getKind()) {
253 OS << PrintNode<PhiNode*>(P.Obj, P.G);
255 case NodeAttrs::Stmt:
256 OS << PrintNode<StmtNode*>(P.Obj, P.G);
259 OS << "instr? " << Print<NodeId>(P.Obj.Id, P.G);
265 raw_ostream &operator<< (raw_ostream &OS,
266 const Print<NodeAddr<BlockNode*>> &P) {
267 MachineBasicBlock *BB = P.Obj.Addr->getCode();
268 unsigned NP = BB->pred_size();
270 auto PrintBBs = [&OS] (std::vector<int> Ns) -> void {
271 unsigned N = Ns.size();
279 OS << Print<NodeId>(P.Obj.Id, P.G) << ": --- " << printMBBReference(*BB)
280 << " --- preds(" << NP << "): ";
281 for (MachineBasicBlock *B : BB->predecessors())
282 Ns.push_back(B->getNumber());
285 unsigned NS = BB->succ_size();
286 OS << " succs(" << NS << "): ";
288 for (MachineBasicBlock *B : BB->successors())
289 Ns.push_back(B->getNumber());
293 for (auto I : P.Obj.Addr->members(P.G))
294 OS << PrintNode<InstrNode*>(I, P.G) << '\n';
298 raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<FuncNode *>> &P) {
299 OS << "DFG dump:[\n" << Print<NodeId>(P.Obj.Id, P.G) << ": Function: "
300 << P.Obj.Addr->getCode()->getName() << '\n';
301 for (auto I : P.Obj.Addr->members(P.G))
302 OS << PrintNode<BlockNode*>(I, P.G) << '\n';
307 raw_ostream &operator<< (raw_ostream &OS, const Print<RegisterSet> &P) {
310 OS << ' ' << Print<RegisterRef>(I, P.G);
315 raw_ostream &operator<< (raw_ostream &OS, const Print<RegisterAggr> &P) {
320 raw_ostream &operator<< (raw_ostream &OS,
321 const Print<DataFlowGraph::DefStack> &P) {
322 for (auto I = P.Obj.top(), E = P.Obj.bottom(); I != E; ) {
323 OS << Print<NodeId>(I->Id, P.G)
324 << '<' << Print<RegisterRef>(I->Addr->getRegRef(P.G), P.G) << '>';
332 } // end namespace rdf
333 } // end namespace llvm
335 // Node allocation functions.
337 // Node allocator is like a slab memory allocator: it allocates blocks of
338 // memory in sizes that are multiples of the size of a node. Each block has
339 // the same size. Nodes are allocated from the currently active block, and
340 // when it becomes full, a new one is created.
341 // There is a mapping scheme between node id and its location in a block,
342 // and within that block is described in the header file.
344 void NodeAllocator::startNewBlock() {
345 void *T = MemPool.Allocate(NodesPerBlock*NodeMemSize, NodeMemSize);
346 char *P = static_cast<char*>(T);
348 // Check if the block index is still within the allowed range, i.e. less
349 // than 2^N, where N is the number of bits in NodeId for the block index.
350 // BitsPerIndex is the number of bits per node index.
351 assert((Blocks.size() < ((size_t)1 << (8*sizeof(NodeId)-BitsPerIndex))) &&
352 "Out of bits for block index");
356 bool NodeAllocator::needNewBlock() {
360 char *ActiveBegin = Blocks.back();
361 uint32_t Index = (ActiveEnd-ActiveBegin)/NodeMemSize;
362 return Index >= NodesPerBlock;
365 NodeAddr<NodeBase*> NodeAllocator::New() {
369 uint32_t ActiveB = Blocks.size()-1;
370 uint32_t Index = (ActiveEnd - Blocks[ActiveB])/NodeMemSize;
371 NodeAddr<NodeBase*> NA = { reinterpret_cast<NodeBase*>(ActiveEnd),
372 makeId(ActiveB, Index) };
373 ActiveEnd += NodeMemSize;
377 NodeId NodeAllocator::id(const NodeBase *P) const {
378 uintptr_t A = reinterpret_cast<uintptr_t>(P);
379 for (unsigned i = 0, n = Blocks.size(); i != n; ++i) {
380 uintptr_t B = reinterpret_cast<uintptr_t>(Blocks[i]);
381 if (A < B || A >= B + NodesPerBlock*NodeMemSize)
383 uint32_t Idx = (A-B)/NodeMemSize;
384 return makeId(i, Idx);
386 llvm_unreachable("Invalid node address");
389 void NodeAllocator::clear() {
395 // Insert node NA after "this" in the circular chain.
396 void NodeBase::append(NodeAddr<NodeBase*> NA) {
398 // If NA is already "next", do nothing.
405 // Fundamental node manipulator functions.
407 // Obtain the register reference from a reference node.
408 RegisterRef RefNode::getRegRef(const DataFlowGraph &G) const {
409 assert(NodeAttrs::type(Attrs) == NodeAttrs::Ref);
410 if (NodeAttrs::flags(Attrs) & NodeAttrs::PhiRef)
411 return G.unpack(Ref.PR);
412 assert(Ref.Op != nullptr);
413 return G.makeRegRef(*Ref.Op);
416 // Set the register reference in the reference node directly (for references
418 void RefNode::setRegRef(RegisterRef RR, DataFlowGraph &G) {
419 assert(NodeAttrs::type(Attrs) == NodeAttrs::Ref);
420 assert(NodeAttrs::flags(Attrs) & NodeAttrs::PhiRef);
424 // Set the register reference in the reference node based on a machine
425 // operand (for references in statement nodes).
426 void RefNode::setRegRef(MachineOperand *Op, DataFlowGraph &G) {
427 assert(NodeAttrs::type(Attrs) == NodeAttrs::Ref);
428 assert(!(NodeAttrs::flags(Attrs) & NodeAttrs::PhiRef));
433 // Get the owner of a given reference node.
434 NodeAddr<NodeBase*> RefNode::getOwner(const DataFlowGraph &G) {
435 NodeAddr<NodeBase*> NA = G.addr<NodeBase*>(getNext());
437 while (NA.Addr != this) {
438 if (NA.Addr->getType() == NodeAttrs::Code)
440 NA = G.addr<NodeBase*>(NA.Addr->getNext());
442 llvm_unreachable("No owner in circular list");
445 // Connect the def node to the reaching def node.
446 void DefNode::linkToDef(NodeId Self, NodeAddr<DefNode*> DA) {
448 Ref.Sib = DA.Addr->getReachedDef();
449 DA.Addr->setReachedDef(Self);
452 // Connect the use node to the reaching def node.
453 void UseNode::linkToDef(NodeId Self, NodeAddr<DefNode*> DA) {
455 Ref.Sib = DA.Addr->getReachedUse();
456 DA.Addr->setReachedUse(Self);
459 // Get the first member of the code node.
460 NodeAddr<NodeBase*> CodeNode::getFirstMember(const DataFlowGraph &G) const {
461 if (Code.FirstM == 0)
462 return NodeAddr<NodeBase*>();
463 return G.addr<NodeBase*>(Code.FirstM);
466 // Get the last member of the code node.
467 NodeAddr<NodeBase*> CodeNode::getLastMember(const DataFlowGraph &G) const {
469 return NodeAddr<NodeBase*>();
470 return G.addr<NodeBase*>(Code.LastM);
473 // Add node NA at the end of the member list of the given code node.
474 void CodeNode::addMember(NodeAddr<NodeBase*> NA, const DataFlowGraph &G) {
475 NodeAddr<NodeBase*> ML = getLastMember(G);
480 NodeId Self = G.id(this);
481 NA.Addr->setNext(Self);
486 // Add node NA after member node MA in the given code node.
487 void CodeNode::addMemberAfter(NodeAddr<NodeBase*> MA, NodeAddr<NodeBase*> NA,
488 const DataFlowGraph &G) {
490 if (Code.LastM == MA.Id)
494 // Remove member node NA from the given code node.
495 void CodeNode::removeMember(NodeAddr<NodeBase*> NA, const DataFlowGraph &G) {
496 NodeAddr<NodeBase*> MA = getFirstMember(G);
499 // Special handling if the member to remove is the first member.
500 if (MA.Id == NA.Id) {
501 if (Code.LastM == MA.Id) {
502 // If it is the only member, set both first and last to 0.
503 Code.FirstM = Code.LastM = 0;
505 // Otherwise, advance the first member.
506 Code.FirstM = MA.Addr->getNext();
511 while (MA.Addr != this) {
512 NodeId MX = MA.Addr->getNext();
514 MA.Addr->setNext(NA.Addr->getNext());
515 // If the member to remove happens to be the last one, update the
517 if (Code.LastM == NA.Id)
521 MA = G.addr<NodeBase*>(MX);
523 llvm_unreachable("No such member");
526 // Return the list of all members of the code node.
527 NodeList CodeNode::members(const DataFlowGraph &G) const {
528 static auto True = [] (NodeAddr<NodeBase*>) -> bool { return true; };
529 return members_if(True, G);
532 // Return the owner of the given instr node.
533 NodeAddr<NodeBase*> InstrNode::getOwner(const DataFlowGraph &G) {
534 NodeAddr<NodeBase*> NA = G.addr<NodeBase*>(getNext());
536 while (NA.Addr != this) {
537 assert(NA.Addr->getType() == NodeAttrs::Code);
538 if (NA.Addr->getKind() == NodeAttrs::Block)
540 NA = G.addr<NodeBase*>(NA.Addr->getNext());
542 llvm_unreachable("No owner in circular list");
545 // Add the phi node PA to the given block node.
546 void BlockNode::addPhi(NodeAddr<PhiNode*> PA, const DataFlowGraph &G) {
547 NodeAddr<NodeBase*> M = getFirstMember(G);
553 assert(M.Addr->getType() == NodeAttrs::Code);
554 if (M.Addr->getKind() == NodeAttrs::Stmt) {
555 // If the first member of the block is a statement, insert the phi as
558 PA.Addr->setNext(M.Id);
560 // If the first member is a phi, find the last phi, and append PA to it.
561 assert(M.Addr->getKind() == NodeAttrs::Phi);
562 NodeAddr<NodeBase*> MN = M;
565 MN = G.addr<NodeBase*>(M.Addr->getNext());
566 assert(MN.Addr->getType() == NodeAttrs::Code);
567 } while (MN.Addr->getKind() == NodeAttrs::Phi);
569 // M is the last phi.
570 addMemberAfter(M, PA, G);
574 // Find the block node corresponding to the machine basic block BB in the
576 NodeAddr<BlockNode*> FuncNode::findBlock(const MachineBasicBlock *BB,
577 const DataFlowGraph &G) const {
578 auto EqBB = [BB] (NodeAddr<NodeBase*> NA) -> bool {
579 return NodeAddr<BlockNode*>(NA).Addr->getCode() == BB;
581 NodeList Ms = members_if(EqBB, G);
584 return NodeAddr<BlockNode*>();
587 // Get the block node for the entry block in the given function.
588 NodeAddr<BlockNode*> FuncNode::getEntryBlock(const DataFlowGraph &G) {
589 MachineBasicBlock *EntryB = &getCode()->front();
590 return findBlock(EntryB, G);
593 // Target operand information.
596 // For a given instruction, check if there are any bits of RR that can remain
597 // unchanged across this def.
598 bool TargetOperandInfo::isPreserving(const MachineInstr &In, unsigned OpNum)
600 return TII.isPredicated(In);
603 // Check if the definition of RR produces an unspecified value.
604 bool TargetOperandInfo::isClobbering(const MachineInstr &In, unsigned OpNum)
606 const MachineOperand &Op = In.getOperand(OpNum);
611 if (Op.isDef() && Op.isDead())
616 // Check if the given instruction specifically requires
617 bool TargetOperandInfo::isFixedReg(const MachineInstr &In, unsigned OpNum)
619 if (In.isCall() || In.isReturn() || In.isInlineAsm())
621 // Check for a tail call.
623 for (const MachineOperand &O : In.operands())
624 if (O.isGlobal() || O.isSymbol())
627 const MCInstrDesc &D = In.getDesc();
628 if (!D.getImplicitDefs() && !D.getImplicitUses())
630 const MachineOperand &Op = In.getOperand(OpNum);
631 // If there is a sub-register, treat the operand as non-fixed. Currently,
632 // fixed registers are those that are listed in the descriptor as implicit
633 // uses or defs, and those lists do not allow sub-registers.
634 if (Op.getSubReg() != 0)
636 Register Reg = Op.getReg();
637 const MCPhysReg *ImpR = Op.isDef() ? D.getImplicitDefs()
638 : D.getImplicitUses();
648 // The data flow graph construction.
651 DataFlowGraph::DataFlowGraph(MachineFunction &mf, const TargetInstrInfo &tii,
652 const TargetRegisterInfo &tri, const MachineDominatorTree &mdt,
653 const MachineDominanceFrontier &mdf, const TargetOperandInfo &toi)
654 : MF(mf), TII(tii), TRI(tri), PRI(tri, mf), MDT(mdt), MDF(mdf), TOI(toi),
658 // The implementation of the definition stack.
659 // Each register reference has its own definition stack. In particular,
660 // for a register references "Reg" and "Reg:subreg" will each have their
661 // own definition stacks.
663 // Construct a stack iterator.
664 DataFlowGraph::DefStack::Iterator::Iterator(const DataFlowGraph::DefStack &S,
667 // Initialize to bottom.
671 // Initialize to the top, i.e. top-most non-delimiter (or 0, if empty).
672 Pos = DS.Stack.size();
673 while (Pos > 0 && DS.isDelimiter(DS.Stack[Pos-1]))
677 // Return the size of the stack, including block delimiters.
678 unsigned DataFlowGraph::DefStack::size() const {
680 for (auto I = top(), E = bottom(); I != E; I.down())
685 // Remove the top entry from the stack. Remove all intervening delimiters
686 // so that after this, the stack is either empty, or the top of the stack
687 // is a non-delimiter.
688 void DataFlowGraph::DefStack::pop() {
690 unsigned P = nextDown(Stack.size());
694 // Push a delimiter for block node N on the stack.
695 void DataFlowGraph::DefStack::start_block(NodeId N) {
697 Stack.push_back(NodeAddr<DefNode*>(nullptr, N));
700 // Remove all nodes from the top of the stack, until the delimited for
701 // block node N is encountered. Remove the delimiter as well. In effect,
702 // this will remove from the stack all definitions from block N.
703 void DataFlowGraph::DefStack::clear_block(NodeId N) {
705 unsigned P = Stack.size();
707 bool Found = isDelimiter(Stack[P-1], N);
712 // This will also remove the delimiter, if found.
716 // Move the stack iterator up by one.
717 unsigned DataFlowGraph::DefStack::nextUp(unsigned P) const {
718 // Get the next valid position after P (skipping all delimiters).
719 // The input position P does not have to point to a non-delimiter.
720 unsigned SS = Stack.size();
725 IsDelim = isDelimiter(Stack[P-1]);
726 } while (P < SS && IsDelim);
731 // Move the stack iterator down by one.
732 unsigned DataFlowGraph::DefStack::nextDown(unsigned P) const {
733 // Get the preceding valid position before P (skipping all delimiters).
734 // The input position P does not have to point to a non-delimiter.
735 assert(P > 0 && P <= Stack.size());
736 bool IsDelim = isDelimiter(Stack[P-1]);
740 IsDelim = isDelimiter(Stack[P-1]);
741 } while (P > 0 && IsDelim);
746 // Register information.
748 RegisterSet DataFlowGraph::getLandingPadLiveIns() const {
750 const Function &F = MF.getFunction();
751 const Constant *PF = F.hasPersonalityFn() ? F.getPersonalityFn()
753 const TargetLowering &TLI = *MF.getSubtarget().getTargetLowering();
754 if (RegisterId R = TLI.getExceptionPointerRegister(PF))
755 LR.insert(RegisterRef(R));
756 if (!isFuncletEHPersonality(classifyEHPersonality(PF))) {
757 if (RegisterId R = TLI.getExceptionSelectorRegister(PF))
758 LR.insert(RegisterRef(R));
763 // Node management functions.
765 // Get the pointer to the node with the id N.
766 NodeBase *DataFlowGraph::ptr(NodeId N) const {
769 return Memory.ptr(N);
772 // Get the id of the node at the address P.
773 NodeId DataFlowGraph::id(const NodeBase *P) const {
779 // Allocate a new node and set the attributes to Attrs.
780 NodeAddr<NodeBase*> DataFlowGraph::newNode(uint16_t Attrs) {
781 NodeAddr<NodeBase*> P = Memory.New();
783 P.Addr->setAttrs(Attrs);
787 // Make a copy of the given node B, except for the data-flow links, which
789 NodeAddr<NodeBase*> DataFlowGraph::cloneNode(const NodeAddr<NodeBase*> B) {
790 NodeAddr<NodeBase*> NA = newNode(0);
791 memcpy(NA.Addr, B.Addr, sizeof(NodeBase));
792 // Ref nodes need to have the data-flow links reset.
793 if (NA.Addr->getType() == NodeAttrs::Ref) {
794 NodeAddr<RefNode*> RA = NA;
795 RA.Addr->setReachingDef(0);
796 RA.Addr->setSibling(0);
797 if (NA.Addr->getKind() == NodeAttrs::Def) {
798 NodeAddr<DefNode*> DA = NA;
799 DA.Addr->setReachedDef(0);
800 DA.Addr->setReachedUse(0);
806 // Allocation routines for specific node types/kinds.
808 NodeAddr<UseNode*> DataFlowGraph::newUse(NodeAddr<InstrNode*> Owner,
809 MachineOperand &Op, uint16_t Flags) {
810 NodeAddr<UseNode*> UA = newNode(NodeAttrs::Ref | NodeAttrs::Use | Flags);
811 UA.Addr->setRegRef(&Op, *this);
815 NodeAddr<PhiUseNode*> DataFlowGraph::newPhiUse(NodeAddr<PhiNode*> Owner,
816 RegisterRef RR, NodeAddr<BlockNode*> PredB, uint16_t Flags) {
817 NodeAddr<PhiUseNode*> PUA = newNode(NodeAttrs::Ref | NodeAttrs::Use | Flags);
818 assert(Flags & NodeAttrs::PhiRef);
819 PUA.Addr->setRegRef(RR, *this);
820 PUA.Addr->setPredecessor(PredB.Id);
824 NodeAddr<DefNode*> DataFlowGraph::newDef(NodeAddr<InstrNode*> Owner,
825 MachineOperand &Op, uint16_t Flags) {
826 NodeAddr<DefNode*> DA = newNode(NodeAttrs::Ref | NodeAttrs::Def | Flags);
827 DA.Addr->setRegRef(&Op, *this);
831 NodeAddr<DefNode*> DataFlowGraph::newDef(NodeAddr<InstrNode*> Owner,
832 RegisterRef RR, uint16_t Flags) {
833 NodeAddr<DefNode*> DA = newNode(NodeAttrs::Ref | NodeAttrs::Def | Flags);
834 assert(Flags & NodeAttrs::PhiRef);
835 DA.Addr->setRegRef(RR, *this);
839 NodeAddr<PhiNode*> DataFlowGraph::newPhi(NodeAddr<BlockNode*> Owner) {
840 NodeAddr<PhiNode*> PA = newNode(NodeAttrs::Code | NodeAttrs::Phi);
841 Owner.Addr->addPhi(PA, *this);
845 NodeAddr<StmtNode*> DataFlowGraph::newStmt(NodeAddr<BlockNode*> Owner,
847 NodeAddr<StmtNode*> SA = newNode(NodeAttrs::Code | NodeAttrs::Stmt);
848 SA.Addr->setCode(MI);
849 Owner.Addr->addMember(SA, *this);
853 NodeAddr<BlockNode*> DataFlowGraph::newBlock(NodeAddr<FuncNode*> Owner,
854 MachineBasicBlock *BB) {
855 NodeAddr<BlockNode*> BA = newNode(NodeAttrs::Code | NodeAttrs::Block);
856 BA.Addr->setCode(BB);
857 Owner.Addr->addMember(BA, *this);
861 NodeAddr<FuncNode*> DataFlowGraph::newFunc(MachineFunction *MF) {
862 NodeAddr<FuncNode*> FA = newNode(NodeAttrs::Code | NodeAttrs::Func);
863 FA.Addr->setCode(MF);
867 // Build the data flow graph.
868 void DataFlowGraph::build(unsigned Options) {
875 for (MachineBasicBlock &B : MF) {
876 NodeAddr<BlockNode*> BA = newBlock(Func, &B);
877 BlockNodes.insert(std::make_pair(&B, BA));
878 for (MachineInstr &I : B) {
879 if (I.isDebugInstr())
885 NodeAddr<BlockNode*> EA = Func.Addr->getEntryBlock(*this);
886 NodeList Blocks = Func.Addr->members(*this);
888 // Collect information about block references.
890 for (NodeAddr<BlockNode*> BA : Blocks)
891 for (NodeAddr<InstrNode*> IA : BA.Addr->members(*this))
892 for (NodeAddr<RefNode*> RA : IA.Addr->members(*this))
893 AllRefs.insert(RA.Addr->getRegRef(*this));
895 // Collect function live-ins and entry block live-ins.
896 MachineRegisterInfo &MRI = MF.getRegInfo();
897 MachineBasicBlock &EntryB = *EA.Addr->getCode();
898 assert(EntryB.pred_empty() && "Function entry block has predecessors");
899 for (std::pair<unsigned,unsigned> P : MRI.liveins())
900 LiveIns.insert(RegisterRef(P.first));
901 if (MRI.tracksLiveness()) {
902 for (auto I : EntryB.liveins())
903 LiveIns.insert(RegisterRef(I.PhysReg, I.LaneMask));
906 // Add function-entry phi nodes for the live-in registers.
907 //for (std::pair<RegisterId,LaneBitmask> P : LiveIns) {
908 for (auto I = LiveIns.rr_begin(), E = LiveIns.rr_end(); I != E; ++I) {
910 NodeAddr<PhiNode*> PA = newPhi(EA);
911 uint16_t PhiFlags = NodeAttrs::PhiRef | NodeAttrs::Preserving;
912 NodeAddr<DefNode*> DA = newDef(PA, RR, PhiFlags);
913 PA.Addr->addMember(DA, *this);
916 // Add phis for landing pads.
917 // Landing pads, unlike usual backs blocks, are not entered through
918 // branches in the program, or fall-throughs from other blocks. They
919 // are entered from the exception handling runtime and target's ABI
920 // may define certain registers as defined on entry to such a block.
921 RegisterSet EHRegs = getLandingPadLiveIns();
922 if (!EHRegs.empty()) {
923 for (NodeAddr<BlockNode*> BA : Blocks) {
924 const MachineBasicBlock &B = *BA.Addr->getCode();
928 // Prepare a list of NodeIds of the block's predecessors.
930 for (MachineBasicBlock *PB : B.predecessors())
931 Preds.push_back(findBlock(PB));
933 // Build phi nodes for each live-in.
934 for (RegisterRef RR : EHRegs) {
935 NodeAddr<PhiNode*> PA = newPhi(BA);
936 uint16_t PhiFlags = NodeAttrs::PhiRef | NodeAttrs::Preserving;
938 NodeAddr<DefNode*> DA = newDef(PA, RR, PhiFlags);
939 PA.Addr->addMember(DA, *this);
940 // Add uses (no reaching defs for phi uses):
941 for (NodeAddr<BlockNode*> PBA : Preds) {
942 NodeAddr<PhiUseNode*> PUA = newPhiUse(PA, RR, PBA);
943 PA.Addr->addMember(PUA, *this);
949 // Build a map "PhiM" which will contain, for each block, the set
950 // of references that will require phi definitions in that block.
952 for (NodeAddr<BlockNode*> BA : Blocks)
953 recordDefsForDF(PhiM, BA);
954 for (NodeAddr<BlockNode*> BA : Blocks)
955 buildPhis(PhiM, AllRefs, BA);
957 // Link all the refs. This will recursively traverse the dominator tree.
959 linkBlockRefs(DM, EA);
961 // Finally, remove all unused phi nodes.
962 if (!(Options & BuildOptions::KeepDeadPhis))
966 RegisterRef DataFlowGraph::makeRegRef(unsigned Reg, unsigned Sub) const {
967 assert(PhysicalRegisterInfo::isRegMaskId(Reg) ||
968 Register::isPhysicalRegister(Reg));
971 Reg = TRI.getSubReg(Reg, Sub);
972 return RegisterRef(Reg);
975 RegisterRef DataFlowGraph::makeRegRef(const MachineOperand &Op) const {
976 assert(Op.isReg() || Op.isRegMask());
978 return makeRegRef(Op.getReg(), Op.getSubReg());
979 return RegisterRef(PRI.getRegMaskId(Op.getRegMask()), LaneBitmask::getAll());
982 RegisterRef DataFlowGraph::restrictRef(RegisterRef AR, RegisterRef BR) const {
983 if (AR.Reg == BR.Reg) {
984 LaneBitmask M = AR.Mask & BR.Mask;
985 return M.any() ? RegisterRef(AR.Reg, M) : RegisterRef();
988 // RegisterRef NAR = PRI.normalize(AR);
989 // RegisterRef NBR = PRI.normalize(BR);
990 // assert(NAR.Reg != NBR.Reg);
992 // This isn't strictly correct, because the overlap may happen in the
994 if (PRI.alias(AR, BR))
996 return RegisterRef();
999 // For each stack in the map DefM, push the delimiter for block B on it.
1000 void DataFlowGraph::markBlock(NodeId B, DefStackMap &DefM) {
1001 // Push block delimiters.
1002 for (auto I = DefM.begin(), E = DefM.end(); I != E; ++I)
1003 I->second.start_block(B);
1006 // Remove all definitions coming from block B from each stack in DefM.
1007 void DataFlowGraph::releaseBlock(NodeId B, DefStackMap &DefM) {
1008 // Pop all defs from this block from the definition stack. Defs that were
1009 // added to the map during the traversal of instructions will not have a
1010 // delimiter, but for those, the whole stack will be emptied.
1011 for (auto I = DefM.begin(), E = DefM.end(); I != E; ++I)
1012 I->second.clear_block(B);
1014 // Finally, remove empty stacks from the map.
1015 for (auto I = DefM.begin(), E = DefM.end(), NextI = I; I != E; I = NextI) {
1016 NextI = std::next(I);
1017 // This preserves the validity of iterators other than I.
1018 if (I->second.empty())
1023 // Push all definitions from the instruction node IA to an appropriate
1025 void DataFlowGraph::pushAllDefs(NodeAddr<InstrNode*> IA, DefStackMap &DefM) {
1026 pushClobbers(IA, DefM);
1030 // Push all definitions from the instruction node IA to an appropriate
1032 void DataFlowGraph::pushClobbers(NodeAddr<InstrNode*> IA, DefStackMap &DefM) {
1034 std::set<RegisterId> Defined;
1036 // The important objectives of this function are:
1037 // - to be able to handle instructions both while the graph is being
1038 // constructed, and after the graph has been constructed, and
1039 // - maintain proper ordering of definitions on the stack for each
1040 // register reference:
1041 // - if there are two or more related defs in IA (i.e. coming from
1042 // the same machine operand), then only push one def on the stack,
1043 // - if there are multiple unrelated defs of non-overlapping
1044 // subregisters of S, then the stack for S will have both (in an
1045 // unspecified order), but the order does not matter from the data-
1046 // -flow perspective.
1048 for (NodeAddr<DefNode*> DA : IA.Addr->members_if(IsDef, *this)) {
1049 if (Visited.count(DA.Id))
1051 if (!(DA.Addr->getFlags() & NodeAttrs::Clobbering))
1054 NodeList Rel = getRelatedRefs(IA, DA);
1055 NodeAddr<DefNode*> PDA = Rel.front();
1056 RegisterRef RR = PDA.Addr->getRegRef(*this);
1058 // Push the definition on the stack for the register and all aliases.
1059 // The def stack traversal in linkNodeUp will check the exact aliasing.
1060 DefM[RR.Reg].push(DA);
1061 Defined.insert(RR.Reg);
1062 for (RegisterId A : PRI.getAliasSet(RR.Reg)) {
1063 // Check that we don't push the same def twice.
1064 assert(A != RR.Reg);
1065 if (!Defined.count(A))
1068 // Mark all the related defs as visited.
1069 for (NodeAddr<NodeBase*> T : Rel)
1070 Visited.insert(T.Id);
1074 // Push all definitions from the instruction node IA to an appropriate
1076 void DataFlowGraph::pushDefs(NodeAddr<InstrNode*> IA, DefStackMap &DefM) {
1079 std::set<RegisterId> Defined;
1082 // The important objectives of this function are:
1083 // - to be able to handle instructions both while the graph is being
1084 // constructed, and after the graph has been constructed, and
1085 // - maintain proper ordering of definitions on the stack for each
1086 // register reference:
1087 // - if there are two or more related defs in IA (i.e. coming from
1088 // the same machine operand), then only push one def on the stack,
1089 // - if there are multiple unrelated defs of non-overlapping
1090 // subregisters of S, then the stack for S will have both (in an
1091 // unspecified order), but the order does not matter from the data-
1092 // -flow perspective.
1094 for (NodeAddr<DefNode*> DA : IA.Addr->members_if(IsDef, *this)) {
1095 if (Visited.count(DA.Id))
1097 if (DA.Addr->getFlags() & NodeAttrs::Clobbering)
1100 NodeList Rel = getRelatedRefs(IA, DA);
1101 NodeAddr<DefNode*> PDA = Rel.front();
1102 RegisterRef RR = PDA.Addr->getRegRef(*this);
1104 // Assert if the register is defined in two or more unrelated defs.
1105 // This could happen if there are two or more def operands defining it.
1106 if (!Defined.insert(RR.Reg).second) {
1107 MachineInstr *MI = NodeAddr<StmtNode*>(IA).Addr->getCode();
1108 dbgs() << "Multiple definitions of register: "
1109 << Print<RegisterRef>(RR, *this) << " in\n " << *MI << "in "
1110 << printMBBReference(*MI->getParent()) << '\n';
1111 llvm_unreachable(nullptr);
1114 // Push the definition on the stack for the register and all aliases.
1115 // The def stack traversal in linkNodeUp will check the exact aliasing.
1116 DefM[RR.Reg].push(DA);
1117 for (RegisterId A : PRI.getAliasSet(RR.Reg)) {
1118 // Check that we don't push the same def twice.
1119 assert(A != RR.Reg);
1122 // Mark all the related defs as visited.
1123 for (NodeAddr<NodeBase*> T : Rel)
1124 Visited.insert(T.Id);
1128 // Return the list of all reference nodes related to RA, including RA itself.
1129 // See "getNextRelated" for the meaning of a "related reference".
1130 NodeList DataFlowGraph::getRelatedRefs(NodeAddr<InstrNode*> IA,
1131 NodeAddr<RefNode*> RA) const {
1132 assert(IA.Id != 0 && RA.Id != 0);
1135 NodeId Start = RA.Id;
1138 RA = getNextRelated(IA, RA);
1139 } while (RA.Id != 0 && RA.Id != Start);
1143 // Clear all information in the graph.
1144 void DataFlowGraph::reset() {
1147 Func = NodeAddr<FuncNode*>();
1150 // Return the next reference node in the instruction node IA that is related
1151 // to RA. Conceptually, two reference nodes are related if they refer to the
1152 // same instance of a register access, but differ in flags or other minor
1153 // characteristics. Specific examples of related nodes are shadow reference
1155 // Return the equivalent of nullptr if there are no more related references.
1156 NodeAddr<RefNode*> DataFlowGraph::getNextRelated(NodeAddr<InstrNode*> IA,
1157 NodeAddr<RefNode*> RA) const {
1158 assert(IA.Id != 0 && RA.Id != 0);
1160 auto Related = [this,RA](NodeAddr<RefNode*> TA) -> bool {
1161 if (TA.Addr->getKind() != RA.Addr->getKind())
1163 if (TA.Addr->getRegRef(*this) != RA.Addr->getRegRef(*this))
1167 auto RelatedStmt = [&Related,RA](NodeAddr<RefNode*> TA) -> bool {
1168 return Related(TA) &&
1169 &RA.Addr->getOp() == &TA.Addr->getOp();
1171 auto RelatedPhi = [&Related,RA](NodeAddr<RefNode*> TA) -> bool {
1174 if (TA.Addr->getKind() != NodeAttrs::Use)
1176 // For phi uses, compare predecessor blocks.
1177 const NodeAddr<const PhiUseNode*> TUA = TA;
1178 const NodeAddr<const PhiUseNode*> RUA = RA;
1179 return TUA.Addr->getPredecessor() == RUA.Addr->getPredecessor();
1182 RegisterRef RR = RA.Addr->getRegRef(*this);
1183 if (IA.Addr->getKind() == NodeAttrs::Stmt)
1184 return RA.Addr->getNextRef(RR, RelatedStmt, true, *this);
1185 return RA.Addr->getNextRef(RR, RelatedPhi, true, *this);
1188 // Find the next node related to RA in IA that satisfies condition P.
1189 // If such a node was found, return a pair where the second element is the
1190 // located node. If such a node does not exist, return a pair where the
1191 // first element is the element after which such a node should be inserted,
1192 // and the second element is a null-address.
1193 template <typename Predicate>
1194 std::pair<NodeAddr<RefNode*>,NodeAddr<RefNode*>>
1195 DataFlowGraph::locateNextRef(NodeAddr<InstrNode*> IA, NodeAddr<RefNode*> RA,
1196 Predicate P) const {
1197 assert(IA.Id != 0 && RA.Id != 0);
1199 NodeAddr<RefNode*> NA;
1200 NodeId Start = RA.Id;
1202 NA = getNextRelated(IA, RA);
1203 if (NA.Id == 0 || NA.Id == Start)
1210 if (NA.Id != 0 && NA.Id != Start)
1211 return std::make_pair(RA, NA);
1212 return std::make_pair(RA, NodeAddr<RefNode*>());
1215 // Get the next shadow node in IA corresponding to RA, and optionally create
1216 // such a node if it does not exist.
1217 NodeAddr<RefNode*> DataFlowGraph::getNextShadow(NodeAddr<InstrNode*> IA,
1218 NodeAddr<RefNode*> RA, bool Create) {
1219 assert(IA.Id != 0 && RA.Id != 0);
1221 uint16_t Flags = RA.Addr->getFlags() | NodeAttrs::Shadow;
1222 auto IsShadow = [Flags] (NodeAddr<RefNode*> TA) -> bool {
1223 return TA.Addr->getFlags() == Flags;
1225 auto Loc = locateNextRef(IA, RA, IsShadow);
1226 if (Loc.second.Id != 0 || !Create)
1229 // Create a copy of RA and mark is as shadow.
1230 NodeAddr<RefNode*> NA = cloneNode(RA);
1231 NA.Addr->setFlags(Flags | NodeAttrs::Shadow);
1232 IA.Addr->addMemberAfter(Loc.first, NA, *this);
1236 // Get the next shadow node in IA corresponding to RA. Return null-address
1237 // if such a node does not exist.
1238 NodeAddr<RefNode*> DataFlowGraph::getNextShadow(NodeAddr<InstrNode*> IA,
1239 NodeAddr<RefNode*> RA) const {
1240 assert(IA.Id != 0 && RA.Id != 0);
1241 uint16_t Flags = RA.Addr->getFlags() | NodeAttrs::Shadow;
1242 auto IsShadow = [Flags] (NodeAddr<RefNode*> TA) -> bool {
1243 return TA.Addr->getFlags() == Flags;
1245 return locateNextRef(IA, RA, IsShadow).second;
1248 // Create a new statement node in the block node BA that corresponds to
1249 // the machine instruction MI.
1250 void DataFlowGraph::buildStmt(NodeAddr<BlockNode*> BA, MachineInstr &In) {
1251 NodeAddr<StmtNode*> SA = newStmt(BA, &In);
1253 auto isCall = [] (const MachineInstr &In) -> bool {
1257 if (In.isBranch()) {
1258 for (const MachineOperand &Op : In.operands())
1259 if (Op.isGlobal() || Op.isSymbol())
1261 // Assume indirect branches are calls. This is for the purpose of
1262 // keeping implicit operands, and so it won't hurt on intra-function
1263 // indirect branches.
1264 if (In.isIndirectBranch())
1270 auto isDefUndef = [this] (const MachineInstr &In, RegisterRef DR) -> bool {
1271 // This instruction defines DR. Check if there is a use operand that
1272 // would make DR live on entry to the instruction.
1273 for (const MachineOperand &Op : In.operands()) {
1274 if (!Op.isReg() || Op.getReg() == 0 || !Op.isUse() || Op.isUndef())
1276 RegisterRef UR = makeRegRef(Op);
1277 if (PRI.alias(DR, UR))
1283 bool IsCall = isCall(In);
1284 unsigned NumOps = In.getNumOperands();
1286 // Avoid duplicate implicit defs. This will not detect cases of implicit
1287 // defs that define registers that overlap, but it is not clear how to
1288 // interpret that in the absence of explicit defs. Overlapping explicit
1289 // defs are likely illegal already.
1290 BitVector DoneDefs(TRI.getNumRegs());
1291 // Process explicit defs first.
1292 for (unsigned OpN = 0; OpN < NumOps; ++OpN) {
1293 MachineOperand &Op = In.getOperand(OpN);
1294 if (!Op.isReg() || !Op.isDef() || Op.isImplicit())
1296 Register R = Op.getReg();
1297 if (!R || !Register::isPhysicalRegister(R))
1299 uint16_t Flags = NodeAttrs::None;
1300 if (TOI.isPreserving(In, OpN)) {
1301 Flags |= NodeAttrs::Preserving;
1302 // If the def is preserving, check if it is also undefined.
1303 if (isDefUndef(In, makeRegRef(Op)))
1304 Flags |= NodeAttrs::Undef;
1306 if (TOI.isClobbering(In, OpN))
1307 Flags |= NodeAttrs::Clobbering;
1308 if (TOI.isFixedReg(In, OpN))
1309 Flags |= NodeAttrs::Fixed;
1310 if (IsCall && Op.isDead())
1311 Flags |= NodeAttrs::Dead;
1312 NodeAddr<DefNode*> DA = newDef(SA, Op, Flags);
1313 SA.Addr->addMember(DA, *this);
1314 assert(!DoneDefs.test(R));
1318 // Process reg-masks (as clobbers).
1319 BitVector DoneClobbers(TRI.getNumRegs());
1320 for (unsigned OpN = 0; OpN < NumOps; ++OpN) {
1321 MachineOperand &Op = In.getOperand(OpN);
1322 if (!Op.isRegMask())
1324 uint16_t Flags = NodeAttrs::Clobbering | NodeAttrs::Fixed |
1326 NodeAddr<DefNode*> DA = newDef(SA, Op, Flags);
1327 SA.Addr->addMember(DA, *this);
1328 // Record all clobbered registers in DoneDefs.
1329 const uint32_t *RM = Op.getRegMask();
1330 for (unsigned i = 1, e = TRI.getNumRegs(); i != e; ++i)
1331 if (!(RM[i/32] & (1u << (i%32))))
1332 DoneClobbers.set(i);
1335 // Process implicit defs, skipping those that have already been added
1337 for (unsigned OpN = 0; OpN < NumOps; ++OpN) {
1338 MachineOperand &Op = In.getOperand(OpN);
1339 if (!Op.isReg() || !Op.isDef() || !Op.isImplicit())
1341 Register R = Op.getReg();
1342 if (!R || !Register::isPhysicalRegister(R) || DoneDefs.test(R))
1344 RegisterRef RR = makeRegRef(Op);
1345 uint16_t Flags = NodeAttrs::None;
1346 if (TOI.isPreserving(In, OpN)) {
1347 Flags |= NodeAttrs::Preserving;
1348 // If the def is preserving, check if it is also undefined.
1349 if (isDefUndef(In, RR))
1350 Flags |= NodeAttrs::Undef;
1352 if (TOI.isClobbering(In, OpN))
1353 Flags |= NodeAttrs::Clobbering;
1354 if (TOI.isFixedReg(In, OpN))
1355 Flags |= NodeAttrs::Fixed;
1356 if (IsCall && Op.isDead()) {
1357 if (DoneClobbers.test(R))
1359 Flags |= NodeAttrs::Dead;
1361 NodeAddr<DefNode*> DA = newDef(SA, Op, Flags);
1362 SA.Addr->addMember(DA, *this);
1366 for (unsigned OpN = 0; OpN < NumOps; ++OpN) {
1367 MachineOperand &Op = In.getOperand(OpN);
1368 if (!Op.isReg() || !Op.isUse())
1370 Register R = Op.getReg();
1371 if (!R || !Register::isPhysicalRegister(R))
1373 uint16_t Flags = NodeAttrs::None;
1375 Flags |= NodeAttrs::Undef;
1376 if (TOI.isFixedReg(In, OpN))
1377 Flags |= NodeAttrs::Fixed;
1378 NodeAddr<UseNode*> UA = newUse(SA, Op, Flags);
1379 SA.Addr->addMember(UA, *this);
1383 // Scan all defs in the block node BA and record in PhiM the locations of
1384 // phi nodes corresponding to these defs.
1385 void DataFlowGraph::recordDefsForDF(BlockRefsMap &PhiM,
1386 NodeAddr<BlockNode*> BA) {
1387 // Check all defs from block BA and record them in each block in BA's
1388 // iterated dominance frontier. This information will later be used to
1389 // create phi nodes.
1390 MachineBasicBlock *BB = BA.Addr->getCode();
1392 auto DFLoc = MDF.find(BB);
1393 if (DFLoc == MDF.end() || DFLoc->second.empty())
1396 // Traverse all instructions in the block and collect the set of all
1397 // defined references. For each reference there will be a phi created
1398 // in the block's iterated dominance frontier.
1399 // This is done to make sure that each defined reference gets only one
1400 // phi node, even if it is defined multiple times.
1402 for (NodeAddr<InstrNode*> IA : BA.Addr->members(*this))
1403 for (NodeAddr<RefNode*> RA : IA.Addr->members_if(IsDef, *this))
1404 Defs.insert(RA.Addr->getRegRef(*this));
1406 // Calculate the iterated dominance frontier of BB.
1407 const MachineDominanceFrontier::DomSetType &DF = DFLoc->second;
1408 SetVector<MachineBasicBlock*> IDF(DF.begin(), DF.end());
1409 for (unsigned i = 0; i < IDF.size(); ++i) {
1410 auto F = MDF.find(IDF[i]);
1412 IDF.insert(F->second.begin(), F->second.end());
1415 // Finally, add the set of defs to each block in the iterated dominance
1417 for (auto DB : IDF) {
1418 NodeAddr<BlockNode*> DBA = findBlock(DB);
1419 PhiM[DBA.Id].insert(Defs.begin(), Defs.end());
1423 // Given the locations of phi nodes in the map PhiM, create the phi nodes
1424 // that are located in the block node BA.
1425 void DataFlowGraph::buildPhis(BlockRefsMap &PhiM, RegisterSet &AllRefs,
1426 NodeAddr<BlockNode*> BA) {
1427 // Check if this blocks has any DF defs, i.e. if there are any defs
1428 // that this block is in the iterated dominance frontier of.
1429 auto HasDF = PhiM.find(BA.Id);
1430 if (HasDF == PhiM.end() || HasDF->second.empty())
1433 // First, remove all R in Refs in such that there exists T in Refs
1434 // such that T covers R. In other words, only leave those refs that
1435 // are not covered by another ref (i.e. maximal with respect to covering).
1437 auto MaxCoverIn = [this] (RegisterRef RR, RegisterSet &RRs) -> RegisterRef {
1438 for (RegisterRef I : RRs)
1439 if (I != RR && RegisterAggr::isCoverOf(I, RR, PRI))
1445 for (RegisterRef I : HasDF->second)
1446 MaxDF.insert(MaxCoverIn(I, HasDF->second));
1448 std::vector<RegisterRef> MaxRefs;
1449 for (RegisterRef I : MaxDF)
1450 MaxRefs.push_back(MaxCoverIn(I, AllRefs));
1452 // Now, for each R in MaxRefs, get the alias closure of R. If the closure
1453 // only has R in it, create a phi a def for R. Otherwise, create a phi,
1454 // and add a def for each S in the closure.
1456 // Sort the refs so that the phis will be created in a deterministic order.
1457 llvm::sort(MaxRefs);
1458 // Remove duplicates.
1459 auto NewEnd = std::unique(MaxRefs.begin(), MaxRefs.end());
1460 MaxRefs.erase(NewEnd, MaxRefs.end());
1462 auto Aliased = [this,&MaxRefs](RegisterRef RR,
1463 std::vector<unsigned> &Closure) -> bool {
1464 for (unsigned I : Closure)
1465 if (PRI.alias(RR, MaxRefs[I]))
1470 // Prepare a list of NodeIds of the block's predecessors.
1472 const MachineBasicBlock *MBB = BA.Addr->getCode();
1473 for (MachineBasicBlock *PB : MBB->predecessors())
1474 Preds.push_back(findBlock(PB));
1476 while (!MaxRefs.empty()) {
1477 // Put the first element in the closure, and then add all subsequent
1478 // elements from MaxRefs to it, if they alias at least one element
1479 // already in the closure.
1480 // ClosureIdx: vector of indices in MaxRefs of members of the closure.
1481 std::vector<unsigned> ClosureIdx = { 0 };
1482 for (unsigned i = 1; i != MaxRefs.size(); ++i)
1483 if (Aliased(MaxRefs[i], ClosureIdx))
1484 ClosureIdx.push_back(i);
1486 // Build a phi for the closure.
1487 unsigned CS = ClosureIdx.size();
1488 NodeAddr<PhiNode*> PA = newPhi(BA);
1491 for (unsigned X = 0; X != CS; ++X) {
1492 RegisterRef RR = MaxRefs[ClosureIdx[X]];
1493 uint16_t PhiFlags = NodeAttrs::PhiRef | NodeAttrs::Preserving;
1494 NodeAddr<DefNode*> DA = newDef(PA, RR, PhiFlags);
1495 PA.Addr->addMember(DA, *this);
1498 for (NodeAddr<BlockNode*> PBA : Preds) {
1499 for (unsigned X = 0; X != CS; ++X) {
1500 RegisterRef RR = MaxRefs[ClosureIdx[X]];
1501 NodeAddr<PhiUseNode*> PUA = newPhiUse(PA, RR, PBA);
1502 PA.Addr->addMember(PUA, *this);
1506 // Erase from MaxRefs all elements in the closure.
1507 auto Begin = MaxRefs.begin();
1508 for (unsigned i = ClosureIdx.size(); i != 0; --i)
1509 MaxRefs.erase(Begin + ClosureIdx[i-1]);
1513 // Remove any unneeded phi nodes that were created during the build process.
1514 void DataFlowGraph::removeUnusedPhis() {
1515 // This will remove unused phis, i.e. phis where each def does not reach
1516 // any uses or other defs. This will not detect or remove circular phi
1517 // chains that are otherwise dead. Unused/dead phis are created during
1518 // the build process and this function is intended to remove these cases
1519 // that are easily determinable to be unnecessary.
1521 SetVector<NodeId> PhiQ;
1522 for (NodeAddr<BlockNode*> BA : Func.Addr->members(*this)) {
1523 for (auto P : BA.Addr->members_if(IsPhi, *this))
1527 static auto HasUsedDef = [](NodeList &Ms) -> bool {
1528 for (NodeAddr<NodeBase*> M : Ms) {
1529 if (M.Addr->getKind() != NodeAttrs::Def)
1531 NodeAddr<DefNode*> DA = M;
1532 if (DA.Addr->getReachedDef() != 0 || DA.Addr->getReachedUse() != 0)
1538 // Any phi, if it is removed, may affect other phis (make them dead).
1539 // For each removed phi, collect the potentially affected phis and add
1540 // them back to the queue.
1541 while (!PhiQ.empty()) {
1542 auto PA = addr<PhiNode*>(PhiQ[0]);
1544 NodeList Refs = PA.Addr->members(*this);
1545 if (HasUsedDef(Refs))
1547 for (NodeAddr<RefNode*> RA : Refs) {
1548 if (NodeId RD = RA.Addr->getReachingDef()) {
1549 auto RDA = addr<DefNode*>(RD);
1550 NodeAddr<InstrNode*> OA = RDA.Addr->getOwner(*this);
1554 if (RA.Addr->isDef())
1555 unlinkDef(RA, true);
1557 unlinkUse(RA, true);
1559 NodeAddr<BlockNode*> BA = PA.Addr->getOwner(*this);
1560 BA.Addr->removeMember(PA, *this);
1564 // For a given reference node TA in an instruction node IA, connect the
1565 // reaching def of TA to the appropriate def node. Create any shadow nodes
1567 template <typename T>
1568 void DataFlowGraph::linkRefUp(NodeAddr<InstrNode*> IA, NodeAddr<T> TA,
1572 RegisterRef RR = TA.Addr->getRegRef(*this);
1575 // References from the def stack that have been examined so far.
1576 RegisterAggr Defs(PRI);
1578 for (auto I = DS.top(), E = DS.bottom(); I != E; I.down()) {
1579 RegisterRef QR = I->Addr->getRegRef(*this);
1581 // Skip all defs that are aliased to any of the defs that we have already
1582 // seen. If this completes a cover of RR, stop the stack traversal.
1583 bool Alias = Defs.hasAliasOf(QR);
1584 bool Cover = Defs.insert(QR).hasCoverOf(RR);
1591 // The reaching def.
1592 NodeAddr<DefNode*> RDA = *I;
1594 // Pick the reached node.
1598 // Mark the existing ref as "shadow" and create a new shadow.
1599 TAP.Addr->setFlags(TAP.Addr->getFlags() | NodeAttrs::Shadow);
1600 TAP = getNextShadow(IA, TAP, true);
1604 TAP.Addr->linkToDef(TAP.Id, RDA);
1611 // Create data-flow links for all reference nodes in the statement node SA.
1612 template <typename Predicate>
1613 void DataFlowGraph::linkStmtRefs(DefStackMap &DefM, NodeAddr<StmtNode*> SA,
1619 // Link all nodes (upwards in the data-flow) with their reaching defs.
1620 for (NodeAddr<RefNode*> RA : SA.Addr->members_if(P, *this)) {
1621 uint16_t Kind = RA.Addr->getKind();
1622 assert(Kind == NodeAttrs::Def || Kind == NodeAttrs::Use);
1623 RegisterRef RR = RA.Addr->getRegRef(*this);
1625 // Do not expect multiple defs of the same reference.
1626 assert(Kind != NodeAttrs::Def || !Defs.count(RR));
1630 auto F = DefM.find(RR.Reg);
1631 if (F == DefM.end())
1633 DefStack &DS = F->second;
1634 if (Kind == NodeAttrs::Use)
1635 linkRefUp<UseNode*>(SA, RA, DS);
1636 else if (Kind == NodeAttrs::Def)
1637 linkRefUp<DefNode*>(SA, RA, DS);
1639 llvm_unreachable("Unexpected node in instruction");
1643 // Create data-flow links for all instructions in the block node BA. This
1644 // will include updating any phi nodes in BA.
1645 void DataFlowGraph::linkBlockRefs(DefStackMap &DefM, NodeAddr<BlockNode*> BA) {
1646 // Push block delimiters.
1647 markBlock(BA.Id, DefM);
1649 auto IsClobber = [] (NodeAddr<RefNode*> RA) -> bool {
1650 return IsDef(RA) && (RA.Addr->getFlags() & NodeAttrs::Clobbering);
1652 auto IsNoClobber = [] (NodeAddr<RefNode*> RA) -> bool {
1653 return IsDef(RA) && !(RA.Addr->getFlags() & NodeAttrs::Clobbering);
1656 assert(BA.Addr && "block node address is needed to create a data-flow link");
1657 // For each non-phi instruction in the block, link all the defs and uses
1658 // to their reaching defs. For any member of the block (including phis),
1659 // push the defs on the corresponding stacks.
1660 for (NodeAddr<InstrNode*> IA : BA.Addr->members(*this)) {
1661 // Ignore phi nodes here. They will be linked part by part from the
1663 if (IA.Addr->getKind() == NodeAttrs::Stmt) {
1664 linkStmtRefs(DefM, IA, IsUse);
1665 linkStmtRefs(DefM, IA, IsClobber);
1668 // Push the definitions on the stack.
1669 pushClobbers(IA, DefM);
1671 if (IA.Addr->getKind() == NodeAttrs::Stmt)
1672 linkStmtRefs(DefM, IA, IsNoClobber);
1677 // Recursively process all children in the dominator tree.
1678 MachineDomTreeNode *N = MDT.getNode(BA.Addr->getCode());
1680 MachineBasicBlock *SB = I->getBlock();
1681 NodeAddr<BlockNode*> SBA = findBlock(SB);
1682 linkBlockRefs(DefM, SBA);
1685 // Link the phi uses from the successor blocks.
1686 auto IsUseForBA = [BA](NodeAddr<NodeBase*> NA) -> bool {
1687 if (NA.Addr->getKind() != NodeAttrs::Use)
1689 assert(NA.Addr->getFlags() & NodeAttrs::PhiRef);
1690 NodeAddr<PhiUseNode*> PUA = NA;
1691 return PUA.Addr->getPredecessor() == BA.Id;
1694 RegisterSet EHLiveIns = getLandingPadLiveIns();
1695 MachineBasicBlock *MBB = BA.Addr->getCode();
1697 for (MachineBasicBlock *SB : MBB->successors()) {
1698 bool IsEHPad = SB->isEHPad();
1699 NodeAddr<BlockNode*> SBA = findBlock(SB);
1700 for (NodeAddr<InstrNode*> IA : SBA.Addr->members_if(IsPhi, *this)) {
1701 // Do not link phi uses for landing pad live-ins.
1703 // Find what register this phi is for.
1704 NodeAddr<RefNode*> RA = IA.Addr->getFirstMember(*this);
1706 if (EHLiveIns.count(RA.Addr->getRegRef(*this)))
1709 // Go over each phi use associated with MBB, and link it.
1710 for (auto U : IA.Addr->members_if(IsUseForBA, *this)) {
1711 NodeAddr<PhiUseNode*> PUA = U;
1712 RegisterRef RR = PUA.Addr->getRegRef(*this);
1713 linkRefUp<UseNode*>(IA, PUA, DefM[RR.Reg]);
1718 // Pop all defs from this block from the definition stacks.
1719 releaseBlock(BA.Id, DefM);
1722 // Remove the use node UA from any data-flow and structural links.
1723 void DataFlowGraph::unlinkUseDF(NodeAddr<UseNode*> UA) {
1724 NodeId RD = UA.Addr->getReachingDef();
1725 NodeId Sib = UA.Addr->getSibling();
1732 auto RDA = addr<DefNode*>(RD);
1733 auto TA = addr<UseNode*>(RDA.Addr->getReachedUse());
1734 if (TA.Id == UA.Id) {
1735 RDA.Addr->setReachedUse(Sib);
1739 while (TA.Id != 0) {
1740 NodeId S = TA.Addr->getSibling();
1742 TA.Addr->setSibling(UA.Addr->getSibling());
1745 TA = addr<UseNode*>(S);
1749 // Remove the def node DA from any data-flow and structural links.
1750 void DataFlowGraph::unlinkDefDF(NodeAddr<DefNode*> DA) {
1758 // ... -- | DA | -- ... -- 0 : sibling chain of DA
1763 // | ... : Siblings (defs)
1767 // ... : sibling chain of reached uses
1769 NodeId RD = DA.Addr->getReachingDef();
1771 // Visit all siblings of the reached def and reset their reaching defs.
1772 // Also, defs reached by DA are now "promoted" to being reached by RD,
1773 // so all of them will need to be spliced into the sibling chain where
1775 auto getAllNodes = [this] (NodeId N) -> NodeList {
1778 auto RA = addr<RefNode*>(N);
1779 // Keep the nodes in the exact sibling order.
1781 N = RA.Addr->getSibling();
1785 NodeList ReachedDefs = getAllNodes(DA.Addr->getReachedDef());
1786 NodeList ReachedUses = getAllNodes(DA.Addr->getReachedUse());
1789 for (NodeAddr<RefNode*> I : ReachedDefs)
1790 I.Addr->setSibling(0);
1791 for (NodeAddr<RefNode*> I : ReachedUses)
1792 I.Addr->setSibling(0);
1794 for (NodeAddr<DefNode*> I : ReachedDefs)
1795 I.Addr->setReachingDef(RD);
1796 for (NodeAddr<UseNode*> I : ReachedUses)
1797 I.Addr->setReachingDef(RD);
1799 NodeId Sib = DA.Addr->getSibling();
1805 // Update the reaching def node and remove DA from the sibling list.
1806 auto RDA = addr<DefNode*>(RD);
1807 auto TA = addr<DefNode*>(RDA.Addr->getReachedDef());
1808 if (TA.Id == DA.Id) {
1809 // If DA is the first reached def, just update the RD's reached def
1810 // to the DA's sibling.
1811 RDA.Addr->setReachedDef(Sib);
1813 // Otherwise, traverse the sibling list of the reached defs and remove
1815 while (TA.Id != 0) {
1816 NodeId S = TA.Addr->getSibling();
1818 TA.Addr->setSibling(Sib);
1821 TA = addr<DefNode*>(S);
1825 // Splice the DA's reached defs into the RDA's reached def chain.
1826 if (!ReachedDefs.empty()) {
1827 auto Last = NodeAddr<DefNode*>(ReachedDefs.back());
1828 Last.Addr->setSibling(RDA.Addr->getReachedDef());
1829 RDA.Addr->setReachedDef(ReachedDefs.front().Id);
1831 // Splice the DA's reached uses into the RDA's reached use chain.
1832 if (!ReachedUses.empty()) {
1833 auto Last = NodeAddr<UseNode*>(ReachedUses.back());
1834 Last.Addr->setSibling(RDA.Addr->getReachedUse());
1835 RDA.Addr->setReachedUse(ReachedUses.front().Id);