1 //===- AArch64LegalizerInfo --------------------------------------*- C++ -*-==//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 /// This file declares the targeting of the Machinelegalizer class for
11 /// \todo This should be generated by TableGen.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64MACHINELEGALIZER_H
15 #define LLVM_LIB_TARGET_AARCH64_AARCH64MACHINELEGALIZER_H
17 #include "llvm/CodeGen/GlobalISel/GISelChangeObserver.h"
18 #include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
23 class AArch64Subtarget;
25 /// This class provides the information for the target register banks.
26 class AArch64LegalizerInfo : public LegalizerInfo {
28 AArch64LegalizerInfo(const AArch64Subtarget &ST);
30 bool legalizeCustom(MachineInstr &MI, MachineRegisterInfo &MRI,
31 MachineIRBuilder &MIRBuilder,
32 GISelChangeObserver &Observer) const override;
34 bool legalizeIntrinsic(MachineInstr &MI, MachineRegisterInfo &MRI,
35 MachineIRBuilder &MIRBuilder) const override;
38 bool legalizeVaArg(MachineInstr &MI, MachineRegisterInfo &MRI,
39 MachineIRBuilder &MIRBuilder) const;
40 bool legalizeLoadStore(MachineInstr &MI, MachineRegisterInfo &MRI,
41 MachineIRBuilder &MIRBuilder,
42 GISelChangeObserver &Observer) const;
43 bool legalizeShlAshrLshr(MachineInstr &MI, MachineRegisterInfo &MRI,
44 MachineIRBuilder &MIRBuilder,
45 GISelChangeObserver &Observer) const;
47 } // End llvm namespace.