1 //=- AArch64SVEInstrInfo.td - AArch64 SVE Instructions -*- tablegen -*-----=//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // AArch64 Scalable Vector Extension (SVE) Instruction definitions.
11 //===----------------------------------------------------------------------===//
13 let Predicates = [HasSVE] in {
15 def RDFFR_PPz : sve_int_rdffr_pred<0b0, "rdffr">;
16 def RDFFRS_PPz : sve_int_rdffr_pred<0b1, "rdffrs">;
17 def RDFFR_P : sve_int_rdffr_unpred<"rdffr">;
18 def SETFFR : sve_int_setffr<"setffr">;
19 def WRFFR : sve_int_wrffr<"wrffr">;
21 defm ADD_ZZZ : sve_int_bin_cons_arit_0<0b000, "add">;
22 defm SUB_ZZZ : sve_int_bin_cons_arit_0<0b001, "sub">;
23 defm SQADD_ZZZ : sve_int_bin_cons_arit_0<0b100, "sqadd">;
24 defm UQADD_ZZZ : sve_int_bin_cons_arit_0<0b101, "uqadd">;
25 defm SQSUB_ZZZ : sve_int_bin_cons_arit_0<0b110, "sqsub">;
26 defm UQSUB_ZZZ : sve_int_bin_cons_arit_0<0b111, "uqsub">;
28 defm AND_ZZZ : sve_int_bin_cons_log<0b00, "and">;
29 defm ORR_ZZZ : sve_int_bin_cons_log<0b01, "orr">;
30 defm EOR_ZZZ : sve_int_bin_cons_log<0b10, "eor">;
31 defm BIC_ZZZ : sve_int_bin_cons_log<0b11, "bic">;
33 defm ADD_ZPmZ : sve_int_bin_pred_arit_0<0b000, "add">;
34 defm SUB_ZPmZ : sve_int_bin_pred_arit_0<0b001, "sub">;
35 defm SUBR_ZPmZ : sve_int_bin_pred_arit_0<0b011, "subr">;
37 defm ORR_ZPmZ : sve_int_bin_pred_log<0b000, "orr">;
38 defm EOR_ZPmZ : sve_int_bin_pred_log<0b001, "eor">;
39 defm AND_ZPmZ : sve_int_bin_pred_log<0b010, "and">;
40 defm BIC_ZPmZ : sve_int_bin_pred_log<0b011, "bic">;
42 defm ADD_ZI : sve_int_arith_imm0<0b000, "add">;
43 defm SUB_ZI : sve_int_arith_imm0<0b001, "sub">;
44 defm SUBR_ZI : sve_int_arith_imm0<0b011, "subr">;
45 defm SQADD_ZI : sve_int_arith_imm0<0b100, "sqadd">;
46 defm UQADD_ZI : sve_int_arith_imm0<0b101, "uqadd">;
47 defm SQSUB_ZI : sve_int_arith_imm0<0b110, "sqsub">;
48 defm UQSUB_ZI : sve_int_arith_imm0<0b111, "uqsub">;
50 defm MAD_ZPmZZ : sve_int_mladdsub_vvv_pred<0b0, "mad">;
51 defm MSB_ZPmZZ : sve_int_mladdsub_vvv_pred<0b1, "msb">;
52 defm MLA_ZPmZZ : sve_int_mlas_vvv_pred<0b0, "mla">;
53 defm MLS_ZPmZZ : sve_int_mlas_vvv_pred<0b1, "mls">;
55 // SVE predicated integer reductions.
56 defm SADDV_VPZ : sve_int_reduce_0_saddv<0b000, "saddv">;
57 defm UADDV_VPZ : sve_int_reduce_0_uaddv<0b001, "uaddv">;
58 defm SMAXV_VPZ : sve_int_reduce_1<0b000, "smaxv">;
59 defm UMAXV_VPZ : sve_int_reduce_1<0b001, "umaxv">;
60 defm SMINV_VPZ : sve_int_reduce_1<0b010, "sminv">;
61 defm UMINV_VPZ : sve_int_reduce_1<0b011, "uminv">;
62 defm ORV_VPZ : sve_int_reduce_2<0b000, "orv">;
63 defm EORV_VPZ : sve_int_reduce_2<0b001, "eorv">;
64 defm ANDV_VPZ : sve_int_reduce_2<0b010, "andv">;
66 defm ORR_ZI : sve_int_log_imm<0b00, "orr", "orn">;
67 defm EOR_ZI : sve_int_log_imm<0b01, "eor", "eon">;
68 defm AND_ZI : sve_int_log_imm<0b10, "and", "bic">;
70 defm SMAX_ZI : sve_int_arith_imm1<0b00, "smax", simm8>;
71 defm SMIN_ZI : sve_int_arith_imm1<0b10, "smin", simm8>;
72 defm UMAX_ZI : sve_int_arith_imm1<0b01, "umax", imm0_255>;
73 defm UMIN_ZI : sve_int_arith_imm1<0b11, "umin", imm0_255>;
75 defm MUL_ZI : sve_int_arith_imm2<"mul">;
76 defm MUL_ZPmZ : sve_int_bin_pred_arit_2<0b000, "mul">;
77 defm SMULH_ZPmZ : sve_int_bin_pred_arit_2<0b010, "smulh">;
78 defm UMULH_ZPmZ : sve_int_bin_pred_arit_2<0b011, "umulh">;
80 defm SDIV_ZPmZ : sve_int_bin_pred_arit_2_div<0b100, "sdiv">;
81 defm UDIV_ZPmZ : sve_int_bin_pred_arit_2_div<0b101, "udiv">;
82 defm SDIVR_ZPmZ : sve_int_bin_pred_arit_2_div<0b110, "sdivr">;
83 defm UDIVR_ZPmZ : sve_int_bin_pred_arit_2_div<0b111, "udivr">;
85 defm SDOT_ZZZ : sve_intx_dot<0b0, "sdot">;
86 defm UDOT_ZZZ : sve_intx_dot<0b1, "udot">;
88 defm SDOT_ZZZI : sve_intx_dot_by_indexed_elem<0b0, "sdot">;
89 defm UDOT_ZZZI : sve_intx_dot_by_indexed_elem<0b1, "udot">;
91 defm SXTB_ZPmZ : sve_int_un_pred_arit_0_h<0b000, "sxtb">;
92 defm UXTB_ZPmZ : sve_int_un_pred_arit_0_h<0b001, "uxtb">;
93 defm SXTH_ZPmZ : sve_int_un_pred_arit_0_w<0b010, "sxth">;
94 defm UXTH_ZPmZ : sve_int_un_pred_arit_0_w<0b011, "uxth">;
95 defm SXTW_ZPmZ : sve_int_un_pred_arit_0_d<0b100, "sxtw">;
96 defm UXTW_ZPmZ : sve_int_un_pred_arit_0_d<0b101, "uxtw">;
97 defm ABS_ZPmZ : sve_int_un_pred_arit_0< 0b110, "abs">;
98 defm NEG_ZPmZ : sve_int_un_pred_arit_0< 0b111, "neg">;
100 defm CLS_ZPmZ : sve_int_un_pred_arit_1< 0b000, "cls">;
101 defm CLZ_ZPmZ : sve_int_un_pred_arit_1< 0b001, "clz">;
102 defm CNT_ZPmZ : sve_int_un_pred_arit_1< 0b010, "cnt">;
103 defm CNOT_ZPmZ : sve_int_un_pred_arit_1< 0b011, "cnot">;
104 defm NOT_ZPmZ : sve_int_un_pred_arit_1< 0b110, "not">;
105 defm FABS_ZPmZ : sve_int_un_pred_arit_1_fp<0b100, "fabs">;
106 defm FNEG_ZPmZ : sve_int_un_pred_arit_1_fp<0b101, "fneg">;
108 defm SMAX_ZPmZ : sve_int_bin_pred_arit_1<0b000, "smax">;
109 defm UMAX_ZPmZ : sve_int_bin_pred_arit_1<0b001, "umax">;
110 defm SMIN_ZPmZ : sve_int_bin_pred_arit_1<0b010, "smin">;
111 defm UMIN_ZPmZ : sve_int_bin_pred_arit_1<0b011, "umin">;
112 defm SABD_ZPmZ : sve_int_bin_pred_arit_1<0b100, "sabd">;
113 defm UABD_ZPmZ : sve_int_bin_pred_arit_1<0b101, "uabd">;
115 defm FRECPE_ZZ : sve_fp_2op_u_zd<0b110, "frecpe">;
116 defm FRSQRTE_ZZ : sve_fp_2op_u_zd<0b111, "frsqrte">;
118 defm FADD_ZPmI : sve_fp_2op_i_p_zds<0b000, "fadd", sve_fpimm_half_one>;
119 defm FSUB_ZPmI : sve_fp_2op_i_p_zds<0b001, "fsub", sve_fpimm_half_one>;
120 defm FMUL_ZPmI : sve_fp_2op_i_p_zds<0b010, "fmul", sve_fpimm_half_two>;
121 defm FSUBR_ZPmI : sve_fp_2op_i_p_zds<0b011, "fsubr", sve_fpimm_half_one>;
122 defm FMAXNM_ZPmI : sve_fp_2op_i_p_zds<0b100, "fmaxnm", sve_fpimm_zero_one>;
123 defm FMINNM_ZPmI : sve_fp_2op_i_p_zds<0b101, "fminnm", sve_fpimm_zero_one>;
124 defm FMAX_ZPmI : sve_fp_2op_i_p_zds<0b110, "fmax", sve_fpimm_zero_one>;
125 defm FMIN_ZPmI : sve_fp_2op_i_p_zds<0b111, "fmin", sve_fpimm_zero_one>;
127 defm FADD_ZPmZ : sve_fp_2op_p_zds<0b0000, "fadd">;
128 defm FSUB_ZPmZ : sve_fp_2op_p_zds<0b0001, "fsub">;
129 defm FMUL_ZPmZ : sve_fp_2op_p_zds<0b0010, "fmul">;
130 defm FSUBR_ZPmZ : sve_fp_2op_p_zds<0b0011, "fsubr">;
131 defm FMAXNM_ZPmZ : sve_fp_2op_p_zds<0b0100, "fmaxnm">;
132 defm FMINNM_ZPmZ : sve_fp_2op_p_zds<0b0101, "fminnm">;
133 defm FMAX_ZPmZ : sve_fp_2op_p_zds<0b0110, "fmax">;
134 defm FMIN_ZPmZ : sve_fp_2op_p_zds<0b0111, "fmin">;
135 defm FABD_ZPmZ : sve_fp_2op_p_zds<0b1000, "fabd">;
136 defm FSCALE_ZPmZ : sve_fp_2op_p_zds<0b1001, "fscale">;
137 defm FMULX_ZPmZ : sve_fp_2op_p_zds<0b1010, "fmulx">;
138 defm FDIVR_ZPmZ : sve_fp_2op_p_zds<0b1100, "fdivr">;
139 defm FDIV_ZPmZ : sve_fp_2op_p_zds<0b1101, "fdiv">;
141 defm FADD_ZZZ : sve_fp_3op_u_zd<0b000, "fadd">;
142 defm FSUB_ZZZ : sve_fp_3op_u_zd<0b001, "fsub">;
143 defm FMUL_ZZZ : sve_fp_3op_u_zd<0b010, "fmul">;
144 defm FTSMUL_ZZZ : sve_fp_3op_u_zd<0b011, "ftsmul">;
145 defm FRECPS_ZZZ : sve_fp_3op_u_zd<0b110, "frecps">;
146 defm FRSQRTS_ZZZ : sve_fp_3op_u_zd<0b111, "frsqrts">;
148 defm FTSSEL_ZZZ : sve_int_bin_cons_misc_0_b<"ftssel">;
150 defm FCADD_ZPmZ : sve_fp_fcadd<"fcadd">;
151 defm FCMLA_ZPmZZ : sve_fp_fcmla<"fcmla">;
153 defm FMLA_ZPmZZ : sve_fp_3op_p_zds_a<0b00, "fmla">;
154 defm FMLS_ZPmZZ : sve_fp_3op_p_zds_a<0b01, "fmls">;
155 defm FNMLA_ZPmZZ : sve_fp_3op_p_zds_a<0b10, "fnmla">;
156 defm FNMLS_ZPmZZ : sve_fp_3op_p_zds_a<0b11, "fnmls">;
158 defm FMAD_ZPmZZ : sve_fp_3op_p_zds_b<0b00, "fmad">;
159 defm FMSB_ZPmZZ : sve_fp_3op_p_zds_b<0b01, "fmsb">;
160 defm FNMAD_ZPmZZ : sve_fp_3op_p_zds_b<0b10, "fnmad">;
161 defm FNMSB_ZPmZZ : sve_fp_3op_p_zds_b<0b11, "fnmsb">;
163 defm FTMAD_ZZI : sve_fp_ftmad<"ftmad">;
165 defm FMLA_ZZZI : sve_fp_fma_by_indexed_elem<0b0, "fmla">;
166 defm FMLS_ZZZI : sve_fp_fma_by_indexed_elem<0b1, "fmls">;
168 defm FCMLA_ZZZI : sve_fp_fcmla_by_indexed_elem<"fcmla">;
169 defm FMUL_ZZZI : sve_fp_fmul_by_indexed_elem<"fmul">;
171 // SVE floating point reductions.
172 defm FADDA_VPZ : sve_fp_2op_p_vd<0b000, "fadda">;
173 defm FADDV_VPZ : sve_fp_fast_red<0b000, "faddv">;
174 defm FMAXNMV_VPZ : sve_fp_fast_red<0b100, "fmaxnmv">;
175 defm FMINNMV_VPZ : sve_fp_fast_red<0b101, "fminnmv">;
176 defm FMAXV_VPZ : sve_fp_fast_red<0b110, "fmaxv">;
177 defm FMINV_VPZ : sve_fp_fast_red<0b111, "fminv">;
179 // Splat immediate (unpredicated)
180 defm DUP_ZI : sve_int_dup_imm<"dup">;
181 defm FDUP_ZI : sve_int_dup_fpimm<"fdup">;
182 defm DUPM_ZI : sve_int_dup_mask_imm<"dupm">;
184 // Splat immediate (predicated)
185 defm CPY_ZPmI : sve_int_dup_imm_pred_merge<"cpy">;
186 defm CPY_ZPzI : sve_int_dup_imm_pred_zero<"cpy">;
187 defm FCPY_ZPmI : sve_int_dup_fpimm_pred<"fcpy">;
189 // Splat scalar register (unpredicated, GPR or vector + element index)
190 defm DUP_ZR : sve_int_perm_dup_r<"dup">;
191 defm DUP_ZZI : sve_int_perm_dup_i<"dup">;
193 // Splat scalar register (predicated)
194 defm CPY_ZPmR : sve_int_perm_cpy_r<"cpy">;
195 defm CPY_ZPmV : sve_int_perm_cpy_v<"cpy">;
197 // Select elements from either vector (predicated)
198 defm SEL_ZPZZ : sve_int_sel_vvv<"sel">;
200 defm SPLICE_ZPZ : sve_int_perm_splice<"splice">;
201 defm COMPACT_ZPZ : sve_int_perm_compact<"compact">;
202 defm INSR_ZR : sve_int_perm_insrs<"insr">;
203 defm INSR_ZV : sve_int_perm_insrv<"insr">;
204 def EXT_ZZI : sve_int_perm_extract_i<"ext">;
206 defm RBIT_ZPmZ : sve_int_perm_rev_rbit<"rbit">;
207 defm REVB_ZPmZ : sve_int_perm_rev_revb<"revb">;
208 defm REVH_ZPmZ : sve_int_perm_rev_revh<"revh">;
209 defm REVW_ZPmZ : sve_int_perm_rev_revw<"revw">;
211 defm REV_PP : sve_int_perm_reverse_p<"rev">;
212 defm REV_ZZ : sve_int_perm_reverse_z<"rev">;
214 defm SUNPKLO_ZZ : sve_int_perm_unpk<0b00, "sunpklo">;
215 defm SUNPKHI_ZZ : sve_int_perm_unpk<0b01, "sunpkhi">;
216 defm UUNPKLO_ZZ : sve_int_perm_unpk<0b10, "uunpklo">;
217 defm UUNPKHI_ZZ : sve_int_perm_unpk<0b11, "uunpkhi">;
219 def PUNPKLO_PP : sve_int_perm_punpk<0b0, "punpklo">;
220 def PUNPKHI_PP : sve_int_perm_punpk<0b1, "punpkhi">;
222 defm MOVPRFX_ZPzZ : sve_int_movprfx_pred_zero<0b000, "movprfx">;
223 defm MOVPRFX_ZPmZ : sve_int_movprfx_pred_merge<0b001, "movprfx">;
224 def MOVPRFX_ZZ : sve_int_bin_cons_misc_0_c<0b00000001, "movprfx", ZPRAny>;
225 def FEXPA_ZZ_H : sve_int_bin_cons_misc_0_c<0b01000000, "fexpa", ZPR16>;
226 def FEXPA_ZZ_S : sve_int_bin_cons_misc_0_c<0b10000000, "fexpa", ZPR32>;
227 def FEXPA_ZZ_D : sve_int_bin_cons_misc_0_c<0b11000000, "fexpa", ZPR64>;
229 def BRKPA_PPzPP : sve_int_brkp<0b00, "brkpa">;
230 def BRKPAS_PPzPP : sve_int_brkp<0b10, "brkpas">;
231 def BRKPB_PPzPP : sve_int_brkp<0b01, "brkpb">;
232 def BRKPBS_PPzPP : sve_int_brkp<0b11, "brkpbs">;
234 def BRKN_PPzP : sve_int_brkn<0b0, "brkn">;
235 def BRKNS_PPzP : sve_int_brkn<0b1, "brkns">;
237 defm BRKA_PPzP : sve_int_break_z<0b000, "brka">;
238 defm BRKA_PPmP : sve_int_break_m<0b001, "brka">;
239 defm BRKAS_PPzP : sve_int_break_z<0b010, "brkas">;
240 defm BRKB_PPzP : sve_int_break_z<0b100, "brkb">;
241 defm BRKB_PPmP : sve_int_break_m<0b101, "brkb">;
242 defm BRKBS_PPzP : sve_int_break_z<0b110, "brkbs">;
244 def PTEST_PP : sve_int_ptest<0b010000, "ptest">;
245 def PFALSE : sve_int_pfalse<0b000000, "pfalse">;
246 defm PFIRST : sve_int_pfirst<0b00000, "pfirst">;
247 defm PNEXT : sve_int_pnext<0b00110, "pnext">;
249 def AND_PPzPP : sve_int_pred_log<0b0000, "and">;
250 def BIC_PPzPP : sve_int_pred_log<0b0001, "bic">;
251 def EOR_PPzPP : sve_int_pred_log<0b0010, "eor">;
252 def SEL_PPPP : sve_int_pred_log<0b0011, "sel">;
253 def ANDS_PPzPP : sve_int_pred_log<0b0100, "ands">;
254 def BICS_PPzPP : sve_int_pred_log<0b0101, "bics">;
255 def EORS_PPzPP : sve_int_pred_log<0b0110, "eors">;
256 def ORR_PPzPP : sve_int_pred_log<0b1000, "orr">;
257 def ORN_PPzPP : sve_int_pred_log<0b1001, "orn">;
258 def NOR_PPzPP : sve_int_pred_log<0b1010, "nor">;
259 def NAND_PPzPP : sve_int_pred_log<0b1011, "nand">;
260 def ORRS_PPzPP : sve_int_pred_log<0b1100, "orrs">;
261 def ORNS_PPzPP : sve_int_pred_log<0b1101, "orns">;
262 def NORS_PPzPP : sve_int_pred_log<0b1110, "nors">;
263 def NANDS_PPzPP : sve_int_pred_log<0b1111, "nands">;
265 defm CLASTA_RPZ : sve_int_perm_clast_rz<0, "clasta">;
266 defm CLASTB_RPZ : sve_int_perm_clast_rz<1, "clastb">;
267 defm CLASTA_VPZ : sve_int_perm_clast_vz<0, "clasta">;
268 defm CLASTB_VPZ : sve_int_perm_clast_vz<1, "clastb">;
269 defm CLASTA_ZPZ : sve_int_perm_clast_zz<0, "clasta">;
270 defm CLASTB_ZPZ : sve_int_perm_clast_zz<1, "clastb">;
272 defm LASTA_RPZ : sve_int_perm_last_r<0, "lasta">;
273 defm LASTB_RPZ : sve_int_perm_last_r<1, "lastb">;
274 defm LASTA_VPZ : sve_int_perm_last_v<0, "lasta">;
275 defm LASTB_VPZ : sve_int_perm_last_v<1, "lastb">;
277 // continuous load with reg+immediate
278 defm LD1B_IMM : sve_mem_cld_si<0b0000, "ld1b", Z_b, ZPR8>;
279 defm LD1B_H_IMM : sve_mem_cld_si<0b0001, "ld1b", Z_h, ZPR16>;
280 defm LD1B_S_IMM : sve_mem_cld_si<0b0010, "ld1b", Z_s, ZPR32>;
281 defm LD1B_D_IMM : sve_mem_cld_si<0b0011, "ld1b", Z_d, ZPR64>;
282 defm LD1SW_D_IMM : sve_mem_cld_si<0b0100, "ld1sw", Z_d, ZPR64>;
283 defm LD1H_IMM : sve_mem_cld_si<0b0101, "ld1h", Z_h, ZPR16>;
284 defm LD1H_S_IMM : sve_mem_cld_si<0b0110, "ld1h", Z_s, ZPR32>;
285 defm LD1H_D_IMM : sve_mem_cld_si<0b0111, "ld1h", Z_d, ZPR64>;
286 defm LD1SH_D_IMM : sve_mem_cld_si<0b1000, "ld1sh", Z_d, ZPR64>;
287 defm LD1SH_S_IMM : sve_mem_cld_si<0b1001, "ld1sh", Z_s, ZPR32>;
288 defm LD1W_IMM : sve_mem_cld_si<0b1010, "ld1w", Z_s, ZPR32>;
289 defm LD1W_D_IMM : sve_mem_cld_si<0b1011, "ld1w", Z_d, ZPR64>;
290 defm LD1SB_D_IMM : sve_mem_cld_si<0b1100, "ld1sb", Z_d, ZPR64>;
291 defm LD1SB_S_IMM : sve_mem_cld_si<0b1101, "ld1sb", Z_s, ZPR32>;
292 defm LD1SB_H_IMM : sve_mem_cld_si<0b1110, "ld1sb", Z_h, ZPR16>;
293 defm LD1D_IMM : sve_mem_cld_si<0b1111, "ld1d", Z_d, ZPR64>;
295 // LD1R loads (splat scalar to vector)
296 defm LD1RB_IMM : sve_mem_ld_dup<0b00, 0b00, "ld1rb", Z_b, ZPR8, uimm6s1>;
297 defm LD1RB_H_IMM : sve_mem_ld_dup<0b00, 0b01, "ld1rb", Z_h, ZPR16, uimm6s1>;
298 defm LD1RB_S_IMM : sve_mem_ld_dup<0b00, 0b10, "ld1rb", Z_s, ZPR32, uimm6s1>;
299 defm LD1RB_D_IMM : sve_mem_ld_dup<0b00, 0b11, "ld1rb", Z_d, ZPR64, uimm6s1>;
300 defm LD1RSW_IMM : sve_mem_ld_dup<0b01, 0b00, "ld1rsw", Z_d, ZPR64, uimm6s4>;
301 defm LD1RH_IMM : sve_mem_ld_dup<0b01, 0b01, "ld1rh", Z_h, ZPR16, uimm6s2>;
302 defm LD1RH_S_IMM : sve_mem_ld_dup<0b01, 0b10, "ld1rh", Z_s, ZPR32, uimm6s2>;
303 defm LD1RH_D_IMM : sve_mem_ld_dup<0b01, 0b11, "ld1rh", Z_d, ZPR64, uimm6s2>;
304 defm LD1RSH_D_IMM : sve_mem_ld_dup<0b10, 0b00, "ld1rsh", Z_d, ZPR64, uimm6s2>;
305 defm LD1RSH_S_IMM : sve_mem_ld_dup<0b10, 0b01, "ld1rsh", Z_s, ZPR32, uimm6s2>;
306 defm LD1RW_IMM : sve_mem_ld_dup<0b10, 0b10, "ld1rw", Z_s, ZPR32, uimm6s4>;
307 defm LD1RW_D_IMM : sve_mem_ld_dup<0b10, 0b11, "ld1rw", Z_d, ZPR64, uimm6s4>;
308 defm LD1RSB_D_IMM : sve_mem_ld_dup<0b11, 0b00, "ld1rsb", Z_d, ZPR64, uimm6s1>;
309 defm LD1RSB_S_IMM : sve_mem_ld_dup<0b11, 0b01, "ld1rsb", Z_s, ZPR32, uimm6s1>;
310 defm LD1RSB_H_IMM : sve_mem_ld_dup<0b11, 0b10, "ld1rsb", Z_h, ZPR16, uimm6s1>;
311 defm LD1RD_IMM : sve_mem_ld_dup<0b11, 0b11, "ld1rd", Z_d, ZPR64, uimm6s8>;
313 // LD1RQ loads (load quadword-vector and splat to scalable vector)
314 defm LD1RQ_B_IMM : sve_mem_ldqr_si<0b00, "ld1rqb", Z_b, ZPR8>;
315 defm LD1RQ_H_IMM : sve_mem_ldqr_si<0b01, "ld1rqh", Z_h, ZPR16>;
316 defm LD1RQ_W_IMM : sve_mem_ldqr_si<0b10, "ld1rqw", Z_s, ZPR32>;
317 defm LD1RQ_D_IMM : sve_mem_ldqr_si<0b11, "ld1rqd", Z_d, ZPR64>;
318 defm LD1RQ_B : sve_mem_ldqr_ss<0b00, "ld1rqb", Z_b, ZPR8, GPR64NoXZRshifted8>;
319 defm LD1RQ_H : sve_mem_ldqr_ss<0b01, "ld1rqh", Z_h, ZPR16, GPR64NoXZRshifted16>;
320 defm LD1RQ_W : sve_mem_ldqr_ss<0b10, "ld1rqw", Z_s, ZPR32, GPR64NoXZRshifted32>;
321 defm LD1RQ_D : sve_mem_ldqr_ss<0b11, "ld1rqd", Z_d, ZPR64, GPR64NoXZRshifted64>;
323 // continuous load with reg+reg addressing.
324 defm LD1B : sve_mem_cld_ss<0b0000, "ld1b", Z_b, ZPR8, GPR64NoXZRshifted8>;
325 defm LD1B_H : sve_mem_cld_ss<0b0001, "ld1b", Z_h, ZPR16, GPR64NoXZRshifted8>;
326 defm LD1B_S : sve_mem_cld_ss<0b0010, "ld1b", Z_s, ZPR32, GPR64NoXZRshifted8>;
327 defm LD1B_D : sve_mem_cld_ss<0b0011, "ld1b", Z_d, ZPR64, GPR64NoXZRshifted8>;
328 defm LD1SW_D : sve_mem_cld_ss<0b0100, "ld1sw", Z_d, ZPR64, GPR64NoXZRshifted32>;
329 defm LD1H : sve_mem_cld_ss<0b0101, "ld1h", Z_h, ZPR16, GPR64NoXZRshifted16>;
330 defm LD1H_S : sve_mem_cld_ss<0b0110, "ld1h", Z_s, ZPR32, GPR64NoXZRshifted16>;
331 defm LD1H_D : sve_mem_cld_ss<0b0111, "ld1h", Z_d, ZPR64, GPR64NoXZRshifted16>;
332 defm LD1SH_D : sve_mem_cld_ss<0b1000, "ld1sh", Z_d, ZPR64, GPR64NoXZRshifted16>;
333 defm LD1SH_S : sve_mem_cld_ss<0b1001, "ld1sh", Z_s, ZPR32, GPR64NoXZRshifted16>;
334 defm LD1W : sve_mem_cld_ss<0b1010, "ld1w", Z_s, ZPR32, GPR64NoXZRshifted32>;
335 defm LD1W_D : sve_mem_cld_ss<0b1011, "ld1w", Z_d, ZPR64, GPR64NoXZRshifted32>;
336 defm LD1SB_D : sve_mem_cld_ss<0b1100, "ld1sb", Z_d, ZPR64, GPR64NoXZRshifted8>;
337 defm LD1SB_S : sve_mem_cld_ss<0b1101, "ld1sb", Z_s, ZPR32, GPR64NoXZRshifted8>;
338 defm LD1SB_H : sve_mem_cld_ss<0b1110, "ld1sb", Z_h, ZPR16, GPR64NoXZRshifted8>;
339 defm LD1D : sve_mem_cld_ss<0b1111, "ld1d", Z_d, ZPR64, GPR64NoXZRshifted64>;
341 // non-faulting continuous load with reg+immediate
342 defm LDNF1B_IMM : sve_mem_cldnf_si<0b0000, "ldnf1b", Z_b, ZPR8>;
343 defm LDNF1B_H_IMM : sve_mem_cldnf_si<0b0001, "ldnf1b", Z_h, ZPR16>;
344 defm LDNF1B_S_IMM : sve_mem_cldnf_si<0b0010, "ldnf1b", Z_s, ZPR32>;
345 defm LDNF1B_D_IMM : sve_mem_cldnf_si<0b0011, "ldnf1b", Z_d, ZPR64>;
346 defm LDNF1SW_D_IMM : sve_mem_cldnf_si<0b0100, "ldnf1sw", Z_d, ZPR64>;
347 defm LDNF1H_IMM : sve_mem_cldnf_si<0b0101, "ldnf1h", Z_h, ZPR16>;
348 defm LDNF1H_S_IMM : sve_mem_cldnf_si<0b0110, "ldnf1h", Z_s, ZPR32>;
349 defm LDNF1H_D_IMM : sve_mem_cldnf_si<0b0111, "ldnf1h", Z_d, ZPR64>;
350 defm LDNF1SH_D_IMM : sve_mem_cldnf_si<0b1000, "ldnf1sh", Z_d, ZPR64>;
351 defm LDNF1SH_S_IMM : sve_mem_cldnf_si<0b1001, "ldnf1sh", Z_s, ZPR32>;
352 defm LDNF1W_IMM : sve_mem_cldnf_si<0b1010, "ldnf1w", Z_s, ZPR32>;
353 defm LDNF1W_D_IMM : sve_mem_cldnf_si<0b1011, "ldnf1w", Z_d, ZPR64>;
354 defm LDNF1SB_D_IMM : sve_mem_cldnf_si<0b1100, "ldnf1sb", Z_d, ZPR64>;
355 defm LDNF1SB_S_IMM : sve_mem_cldnf_si<0b1101, "ldnf1sb", Z_s, ZPR32>;
356 defm LDNF1SB_H_IMM : sve_mem_cldnf_si<0b1110, "ldnf1sb", Z_h, ZPR16>;
357 defm LDNF1D_IMM : sve_mem_cldnf_si<0b1111, "ldnf1d", Z_d, ZPR64>;
359 // First-faulting loads with reg+reg addressing.
360 defm LDFF1B : sve_mem_cldff_ss<0b0000, "ldff1b", Z_b, ZPR8, GPR64shifted8>;
361 defm LDFF1B_H : sve_mem_cldff_ss<0b0001, "ldff1b", Z_h, ZPR16, GPR64shifted8>;
362 defm LDFF1B_S : sve_mem_cldff_ss<0b0010, "ldff1b", Z_s, ZPR32, GPR64shifted8>;
363 defm LDFF1B_D : sve_mem_cldff_ss<0b0011, "ldff1b", Z_d, ZPR64, GPR64shifted8>;
364 defm LDFF1SW_D : sve_mem_cldff_ss<0b0100, "ldff1sw", Z_d, ZPR64, GPR64shifted32>;
365 defm LDFF1H : sve_mem_cldff_ss<0b0101, "ldff1h", Z_h, ZPR16, GPR64shifted16>;
366 defm LDFF1H_S : sve_mem_cldff_ss<0b0110, "ldff1h", Z_s, ZPR32, GPR64shifted16>;
367 defm LDFF1H_D : sve_mem_cldff_ss<0b0111, "ldff1h", Z_d, ZPR64, GPR64shifted16>;
368 defm LDFF1SH_D : sve_mem_cldff_ss<0b1000, "ldff1sh", Z_d, ZPR64, GPR64shifted16>;
369 defm LDFF1SH_S : sve_mem_cldff_ss<0b1001, "ldff1sh", Z_s, ZPR32, GPR64shifted16>;
370 defm LDFF1W : sve_mem_cldff_ss<0b1010, "ldff1w", Z_s, ZPR32, GPR64shifted32>;
371 defm LDFF1W_D : sve_mem_cldff_ss<0b1011, "ldff1w", Z_d, ZPR64, GPR64shifted32>;
372 defm LDFF1SB_D : sve_mem_cldff_ss<0b1100, "ldff1sb", Z_d, ZPR64, GPR64shifted8>;
373 defm LDFF1SB_S : sve_mem_cldff_ss<0b1101, "ldff1sb", Z_s, ZPR32, GPR64shifted8>;
374 defm LDFF1SB_H : sve_mem_cldff_ss<0b1110, "ldff1sb", Z_h, ZPR16, GPR64shifted8>;
375 defm LDFF1D : sve_mem_cldff_ss<0b1111, "ldff1d", Z_d, ZPR64, GPR64shifted64>;
377 // LD(2|3|4) structured loads with reg+immediate
378 defm LD2B_IMM : sve_mem_eld_si<0b00, 0b01, ZZ_b, "ld2b", simm4s2>;
379 defm LD3B_IMM : sve_mem_eld_si<0b00, 0b10, ZZZ_b, "ld3b", simm4s3>;
380 defm LD4B_IMM : sve_mem_eld_si<0b00, 0b11, ZZZZ_b, "ld4b", simm4s4>;
381 defm LD2H_IMM : sve_mem_eld_si<0b01, 0b01, ZZ_h, "ld2h", simm4s2>;
382 defm LD3H_IMM : sve_mem_eld_si<0b01, 0b10, ZZZ_h, "ld3h", simm4s3>;
383 defm LD4H_IMM : sve_mem_eld_si<0b01, 0b11, ZZZZ_h, "ld4h", simm4s4>;
384 defm LD2W_IMM : sve_mem_eld_si<0b10, 0b01, ZZ_s, "ld2w", simm4s2>;
385 defm LD3W_IMM : sve_mem_eld_si<0b10, 0b10, ZZZ_s, "ld3w", simm4s3>;
386 defm LD4W_IMM : sve_mem_eld_si<0b10, 0b11, ZZZZ_s, "ld4w", simm4s4>;
387 defm LD2D_IMM : sve_mem_eld_si<0b11, 0b01, ZZ_d, "ld2d", simm4s2>;
388 defm LD3D_IMM : sve_mem_eld_si<0b11, 0b10, ZZZ_d, "ld3d", simm4s3>;
389 defm LD4D_IMM : sve_mem_eld_si<0b11, 0b11, ZZZZ_d, "ld4d", simm4s4>;
391 // LD(2|3|4) structured loads (register + register)
392 def LD2B : sve_mem_eld_ss<0b00, 0b01, ZZ_b, "ld2b", GPR64NoXZRshifted8>;
393 def LD3B : sve_mem_eld_ss<0b00, 0b10, ZZZ_b, "ld3b", GPR64NoXZRshifted8>;
394 def LD4B : sve_mem_eld_ss<0b00, 0b11, ZZZZ_b, "ld4b", GPR64NoXZRshifted8>;
395 def LD2H : sve_mem_eld_ss<0b01, 0b01, ZZ_h, "ld2h", GPR64NoXZRshifted16>;
396 def LD3H : sve_mem_eld_ss<0b01, 0b10, ZZZ_h, "ld3h", GPR64NoXZRshifted16>;
397 def LD4H : sve_mem_eld_ss<0b01, 0b11, ZZZZ_h, "ld4h", GPR64NoXZRshifted16>;
398 def LD2W : sve_mem_eld_ss<0b10, 0b01, ZZ_s, "ld2w", GPR64NoXZRshifted32>;
399 def LD3W : sve_mem_eld_ss<0b10, 0b10, ZZZ_s, "ld3w", GPR64NoXZRshifted32>;
400 def LD4W : sve_mem_eld_ss<0b10, 0b11, ZZZZ_s, "ld4w", GPR64NoXZRshifted32>;
401 def LD2D : sve_mem_eld_ss<0b11, 0b01, ZZ_d, "ld2d", GPR64NoXZRshifted64>;
402 def LD3D : sve_mem_eld_ss<0b11, 0b10, ZZZ_d, "ld3d", GPR64NoXZRshifted64>;
403 def LD4D : sve_mem_eld_ss<0b11, 0b11, ZZZZ_d, "ld4d", GPR64NoXZRshifted64>;
405 // Gathers using unscaled 32-bit offsets, e.g.
406 // ld1h z0.s, p0/z, [x0, z0.s, uxtw]
407 defm GLD1SB_S : sve_mem_32b_gld_vs_32_unscaled<0b0000, "ld1sb", ZPR32ExtSXTW8Only, ZPR32ExtUXTW8Only>;
408 defm GLDFF1SB_S : sve_mem_32b_gld_vs_32_unscaled<0b0001, "ldff1sb", ZPR32ExtSXTW8Only, ZPR32ExtUXTW8Only>;
409 defm GLD1B_S : sve_mem_32b_gld_vs_32_unscaled<0b0010, "ld1b", ZPR32ExtSXTW8Only, ZPR32ExtUXTW8Only>;
410 defm GLDFF1B_S : sve_mem_32b_gld_vs_32_unscaled<0b0011, "ldff1b", ZPR32ExtSXTW8Only, ZPR32ExtUXTW8Only>;
411 defm GLD1SH_S : sve_mem_32b_gld_vs_32_unscaled<0b0100, "ld1sh", ZPR32ExtSXTW8, ZPR32ExtUXTW8>;
412 defm GLDFF1SH_S : sve_mem_32b_gld_vs_32_unscaled<0b0101, "ldff1sh", ZPR32ExtSXTW8, ZPR32ExtUXTW8>;
413 defm GLD1H_S : sve_mem_32b_gld_vs_32_unscaled<0b0110, "ld1h", ZPR32ExtSXTW8, ZPR32ExtUXTW8>;
414 defm GLDFF1H_S : sve_mem_32b_gld_vs_32_unscaled<0b0111, "ldff1h", ZPR32ExtSXTW8, ZPR32ExtUXTW8>;
415 defm GLD1W : sve_mem_32b_gld_vs_32_unscaled<0b1010, "ld1w", ZPR32ExtSXTW8, ZPR32ExtUXTW8>;
416 defm GLDFF1W : sve_mem_32b_gld_vs_32_unscaled<0b1011, "ldff1w", ZPR32ExtSXTW8, ZPR32ExtUXTW8>;
418 // Gathers using scaled 32-bit offsets, e.g.
419 // ld1h z0.s, p0/z, [x0, z0.s, uxtw #1]
420 defm GLD1SH_S : sve_mem_32b_gld_sv_32_scaled<0b0100, "ld1sh", ZPR32ExtSXTW16, ZPR32ExtUXTW16>;
421 defm GLDFF1SH_S : sve_mem_32b_gld_sv_32_scaled<0b0101, "ldff1sh", ZPR32ExtSXTW16, ZPR32ExtUXTW16>;
422 defm GLD1H_S : sve_mem_32b_gld_sv_32_scaled<0b0110, "ld1h", ZPR32ExtSXTW16, ZPR32ExtUXTW16>;
423 defm GLDFF1H_S : sve_mem_32b_gld_sv_32_scaled<0b0111, "ldff1h", ZPR32ExtSXTW16, ZPR32ExtUXTW16>;
424 defm GLD1W : sve_mem_32b_gld_sv_32_scaled<0b1010, "ld1w", ZPR32ExtSXTW32, ZPR32ExtUXTW32>;
425 defm GLDFF1W : sve_mem_32b_gld_sv_32_scaled<0b1011, "ldff1w", ZPR32ExtSXTW32, ZPR32ExtUXTW32>;
427 // Gathers using scaled 32-bit pointers with offset, e.g.
428 // ld1h z0.s, p0/z, [z0.s, #16]
429 defm GLD1SB_S : sve_mem_32b_gld_vi_32_ptrs<0b0000, "ld1sb", imm0_31>;
430 defm GLDFF1SB_S : sve_mem_32b_gld_vi_32_ptrs<0b0001, "ldff1sb", imm0_31>;
431 defm GLD1B_S : sve_mem_32b_gld_vi_32_ptrs<0b0010, "ld1b", imm0_31>;
432 defm GLDFF1B_S : sve_mem_32b_gld_vi_32_ptrs<0b0011, "ldff1b", imm0_31>;
433 defm GLD1SH_S : sve_mem_32b_gld_vi_32_ptrs<0b0100, "ld1sh", uimm5s2>;
434 defm GLDFF1SH_S : sve_mem_32b_gld_vi_32_ptrs<0b0101, "ldff1sh", uimm5s2>;
435 defm GLD1H_S : sve_mem_32b_gld_vi_32_ptrs<0b0110, "ld1h", uimm5s2>;
436 defm GLDFF1H_S : sve_mem_32b_gld_vi_32_ptrs<0b0111, "ldff1h", uimm5s2>;
437 defm GLD1W : sve_mem_32b_gld_vi_32_ptrs<0b1010, "ld1w", uimm5s4>;
438 defm GLDFF1W : sve_mem_32b_gld_vi_32_ptrs<0b1011, "ldff1w", uimm5s4>;
440 // Gathers using scaled 64-bit pointers with offset, e.g.
441 // ld1h z0.d, p0/z, [z0.d, #16]
442 defm GLD1SB_D : sve_mem_64b_gld_vi_64_ptrs<0b0000, "ld1sb", imm0_31>;
443 defm GLDFF1SB_D : sve_mem_64b_gld_vi_64_ptrs<0b0001, "ldff1sb", imm0_31>;
444 defm GLD1B_D : sve_mem_64b_gld_vi_64_ptrs<0b0010, "ld1b", imm0_31>;
445 defm GLDFF1B_D : sve_mem_64b_gld_vi_64_ptrs<0b0011, "ldff1b", imm0_31>;
446 defm GLD1SH_D : sve_mem_64b_gld_vi_64_ptrs<0b0100, "ld1sh", uimm5s2>;
447 defm GLDFF1SH_D : sve_mem_64b_gld_vi_64_ptrs<0b0101, "ldff1sh", uimm5s2>;
448 defm GLD1H_D : sve_mem_64b_gld_vi_64_ptrs<0b0110, "ld1h", uimm5s2>;
449 defm GLDFF1H_D : sve_mem_64b_gld_vi_64_ptrs<0b0111, "ldff1h", uimm5s2>;
450 defm GLD1SW_D : sve_mem_64b_gld_vi_64_ptrs<0b1000, "ld1sw", uimm5s4>;
451 defm GLDFF1SW_D : sve_mem_64b_gld_vi_64_ptrs<0b1001, "ldff1sw", uimm5s4>;
452 defm GLD1W_D : sve_mem_64b_gld_vi_64_ptrs<0b1010, "ld1w", uimm5s4>;
453 defm GLDFF1W_D : sve_mem_64b_gld_vi_64_ptrs<0b1011, "ldff1w", uimm5s4>;
454 defm GLD1D : sve_mem_64b_gld_vi_64_ptrs<0b1110, "ld1d", uimm5s8>;
455 defm GLDFF1D : sve_mem_64b_gld_vi_64_ptrs<0b1111, "ldff1d", uimm5s8>;
457 // Gathers using unscaled 64-bit offsets, e.g.
458 // ld1h z0.d, p0/z, [x0, z0.d]
459 defm GLD1SB_D : sve_mem_64b_gld_vs2_64_unscaled<0b0000, "ld1sb">;
460 defm GLDFF1SB_D : sve_mem_64b_gld_vs2_64_unscaled<0b0001, "ldff1sb">;
461 defm GLD1B_D : sve_mem_64b_gld_vs2_64_unscaled<0b0010, "ld1b">;
462 defm GLDFF1B_D : sve_mem_64b_gld_vs2_64_unscaled<0b0011, "ldff1b">;
463 defm GLD1SH_D : sve_mem_64b_gld_vs2_64_unscaled<0b0100, "ld1sh">;
464 defm GLDFF1SH_D : sve_mem_64b_gld_vs2_64_unscaled<0b0101, "ldff1sh">;
465 defm GLD1H_D : sve_mem_64b_gld_vs2_64_unscaled<0b0110, "ld1h">;
466 defm GLDFF1H_D : sve_mem_64b_gld_vs2_64_unscaled<0b0111, "ldff1h">;
467 defm GLD1SW_D : sve_mem_64b_gld_vs2_64_unscaled<0b1000, "ld1sw">;
468 defm GLDFF1SW_D : sve_mem_64b_gld_vs2_64_unscaled<0b1001, "ldff1sw">;
469 defm GLD1W_D : sve_mem_64b_gld_vs2_64_unscaled<0b1010, "ld1w">;
470 defm GLDFF1W_D : sve_mem_64b_gld_vs2_64_unscaled<0b1011, "ldff1w">;
471 defm GLD1D : sve_mem_64b_gld_vs2_64_unscaled<0b1110, "ld1d">;
472 defm GLDFF1D : sve_mem_64b_gld_vs2_64_unscaled<0b1111, "ldff1d">;
474 // Gathers using scaled 64-bit offsets, e.g.
475 // ld1h z0.d, p0/z, [x0, z0.d, lsl #1]
476 defm GLD1SH_D : sve_mem_64b_gld_sv2_64_scaled<0b0100, "ld1sh", ZPR64ExtLSL16>;
477 defm GLDFF1SH_D : sve_mem_64b_gld_sv2_64_scaled<0b0101, "ldff1sh", ZPR64ExtLSL16>;
478 defm GLD1H_D : sve_mem_64b_gld_sv2_64_scaled<0b0110, "ld1h", ZPR64ExtLSL16>;
479 defm GLDFF1H_D : sve_mem_64b_gld_sv2_64_scaled<0b0111, "ldff1h", ZPR64ExtLSL16>;
480 defm GLD1SW_D : sve_mem_64b_gld_sv2_64_scaled<0b1000, "ld1sw", ZPR64ExtLSL32>;
481 defm GLDFF1SW_D : sve_mem_64b_gld_sv2_64_scaled<0b1001, "ldff1sw", ZPR64ExtLSL32>;
482 defm GLD1W_D : sve_mem_64b_gld_sv2_64_scaled<0b1010, "ld1w", ZPR64ExtLSL32>;
483 defm GLDFF1W_D : sve_mem_64b_gld_sv2_64_scaled<0b1011, "ldff1w", ZPR64ExtLSL32>;
484 defm GLD1D : sve_mem_64b_gld_sv2_64_scaled<0b1110, "ld1d", ZPR64ExtLSL64>;
485 defm GLDFF1D : sve_mem_64b_gld_sv2_64_scaled<0b1111, "ldff1d", ZPR64ExtLSL64>;
487 // Gathers using unscaled 32-bit offsets unpacked in 64-bits elements, e.g.
488 // ld1h z0.d, p0/z, [x0, z0.d, uxtw]
489 defm GLD1SB_D : sve_mem_64b_gld_vs_32_unscaled<0b0000, "ld1sb", ZPR64ExtSXTW8Only, ZPR64ExtUXTW8Only>;
490 defm GLDFF1SB_D : sve_mem_64b_gld_vs_32_unscaled<0b0001, "ldff1sb", ZPR64ExtSXTW8Only, ZPR64ExtUXTW8Only>;
491 defm GLD1B_D : sve_mem_64b_gld_vs_32_unscaled<0b0010, "ld1b", ZPR64ExtSXTW8Only, ZPR64ExtUXTW8Only>;
492 defm GLDFF1B_D : sve_mem_64b_gld_vs_32_unscaled<0b0011, "ldff1b", ZPR64ExtSXTW8Only, ZPR64ExtUXTW8Only>;
493 defm GLD1SH_D : sve_mem_64b_gld_vs_32_unscaled<0b0100, "ld1sh", ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
494 defm GLDFF1SH_D : sve_mem_64b_gld_vs_32_unscaled<0b0101, "ldff1sh", ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
495 defm GLD1H_D : sve_mem_64b_gld_vs_32_unscaled<0b0110, "ld1h", ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
496 defm GLDFF1H_D : sve_mem_64b_gld_vs_32_unscaled<0b0111, "ldff1h", ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
497 defm GLD1SW_D : sve_mem_64b_gld_vs_32_unscaled<0b1000, "ld1sw", ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
498 defm GLDFF1SW_D : sve_mem_64b_gld_vs_32_unscaled<0b1001, "ldff1sw", ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
499 defm GLD1W_D : sve_mem_64b_gld_vs_32_unscaled<0b1010, "ld1w", ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
500 defm GLDFF1W_D : sve_mem_64b_gld_vs_32_unscaled<0b1011, "ldff1w", ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
501 defm GLD1D : sve_mem_64b_gld_vs_32_unscaled<0b1110, "ld1d", ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
502 defm GLDFF1D : sve_mem_64b_gld_vs_32_unscaled<0b1111, "ldff1d", ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
504 // Gathers using scaled 32-bit offsets unpacked in 64-bits elements, e.g.
505 // ld1h z0.d, p0/z, [x0, z0.d, uxtw #1]
506 defm GLD1SH_D : sve_mem_64b_gld_sv_32_scaled<0b0100, "ld1sh", ZPR64ExtSXTW16, ZPR64ExtUXTW16>;
507 defm GLDFF1SH_D : sve_mem_64b_gld_sv_32_scaled<0b0101, "ldff1sh",ZPR64ExtSXTW16, ZPR64ExtUXTW16>;
508 defm GLD1H_D : sve_mem_64b_gld_sv_32_scaled<0b0110, "ld1h", ZPR64ExtSXTW16, ZPR64ExtUXTW16>;
509 defm GLDFF1H_D : sve_mem_64b_gld_sv_32_scaled<0b0111, "ldff1h", ZPR64ExtSXTW16, ZPR64ExtUXTW16>;
510 defm GLD1SW_D : sve_mem_64b_gld_sv_32_scaled<0b1000, "ld1sw", ZPR64ExtSXTW32, ZPR64ExtUXTW32>;
511 defm GLDFF1SW_D : sve_mem_64b_gld_sv_32_scaled<0b1001, "ldff1sw",ZPR64ExtSXTW32, ZPR64ExtUXTW32>;
512 defm GLD1W_D : sve_mem_64b_gld_sv_32_scaled<0b1010, "ld1w", ZPR64ExtSXTW32, ZPR64ExtUXTW32>;
513 defm GLDFF1W_D : sve_mem_64b_gld_sv_32_scaled<0b1011, "ldff1w", ZPR64ExtSXTW32, ZPR64ExtUXTW32>;
514 defm GLD1D : sve_mem_64b_gld_sv_32_scaled<0b1110, "ld1d", ZPR64ExtSXTW64, ZPR64ExtUXTW64>;
515 defm GLDFF1D : sve_mem_64b_gld_sv_32_scaled<0b1111, "ldff1d", ZPR64ExtSXTW64, ZPR64ExtUXTW64>;
517 // Non-temporal contiguous loads (register + immediate)
518 defm LDNT1B_ZRI : sve_mem_cldnt_si<0b00, "ldnt1b", Z_b, ZPR8>;
519 defm LDNT1H_ZRI : sve_mem_cldnt_si<0b01, "ldnt1h", Z_h, ZPR16>;
520 defm LDNT1W_ZRI : sve_mem_cldnt_si<0b10, "ldnt1w", Z_s, ZPR32>;
521 defm LDNT1D_ZRI : sve_mem_cldnt_si<0b11, "ldnt1d", Z_d, ZPR64>;
523 // Non-temporal contiguous loads (register + register)
524 defm LDNT1B_ZRR : sve_mem_cldnt_ss<0b00, "ldnt1b", Z_b, ZPR8, GPR64NoXZRshifted8>;
525 defm LDNT1H_ZRR : sve_mem_cldnt_ss<0b01, "ldnt1h", Z_h, ZPR16, GPR64NoXZRshifted16>;
526 defm LDNT1W_ZRR : sve_mem_cldnt_ss<0b10, "ldnt1w", Z_s, ZPR32, GPR64NoXZRshifted32>;
527 defm LDNT1D_ZRR : sve_mem_cldnt_ss<0b11, "ldnt1d", Z_d, ZPR64, GPR64NoXZRshifted64>;
529 // contiguous store with immediates
530 defm ST1B_IMM : sve_mem_cst_si<0b00, 0b00, "st1b", Z_b, ZPR8>;
531 defm ST1B_H_IMM : sve_mem_cst_si<0b00, 0b01, "st1b", Z_h, ZPR16>;
532 defm ST1B_S_IMM : sve_mem_cst_si<0b00, 0b10, "st1b", Z_s, ZPR32>;
533 defm ST1B_D_IMM : sve_mem_cst_si<0b00, 0b11, "st1b", Z_d, ZPR64>;
534 defm ST1H_IMM : sve_mem_cst_si<0b01, 0b01, "st1h", Z_h, ZPR16>;
535 defm ST1H_S_IMM : sve_mem_cst_si<0b01, 0b10, "st1h", Z_s, ZPR32>;
536 defm ST1H_D_IMM : sve_mem_cst_si<0b01, 0b11, "st1h", Z_d, ZPR64>;
537 defm ST1W_IMM : sve_mem_cst_si<0b10, 0b10, "st1w", Z_s, ZPR32>;
538 defm ST1W_D_IMM : sve_mem_cst_si<0b10, 0b11, "st1w", Z_d, ZPR64>;
539 defm ST1D_IMM : sve_mem_cst_si<0b11, 0b11, "st1d", Z_d, ZPR64>;
541 // contiguous store with reg+reg addressing.
542 defm ST1B : sve_mem_cst_ss<0b0000, "st1b", Z_b, ZPR8, GPR64NoXZRshifted8>;
543 defm ST1B_H : sve_mem_cst_ss<0b0001, "st1b", Z_h, ZPR16, GPR64NoXZRshifted8>;
544 defm ST1B_S : sve_mem_cst_ss<0b0010, "st1b", Z_s, ZPR32, GPR64NoXZRshifted8>;
545 defm ST1B_D : sve_mem_cst_ss<0b0011, "st1b", Z_d, ZPR64, GPR64NoXZRshifted8>;
546 defm ST1H : sve_mem_cst_ss<0b0101, "st1h", Z_h, ZPR16, GPR64NoXZRshifted16>;
547 defm ST1H_S : sve_mem_cst_ss<0b0110, "st1h", Z_s, ZPR32, GPR64NoXZRshifted16>;
548 defm ST1H_D : sve_mem_cst_ss<0b0111, "st1h", Z_d, ZPR64, GPR64NoXZRshifted16>;
549 defm ST1W : sve_mem_cst_ss<0b1010, "st1w", Z_s, ZPR32, GPR64NoXZRshifted32>;
550 defm ST1W_D : sve_mem_cst_ss<0b1011, "st1w", Z_d, ZPR64, GPR64NoXZRshifted32>;
551 defm ST1D : sve_mem_cst_ss<0b1111, "st1d", Z_d, ZPR64, GPR64NoXZRshifted64>;
553 // Scatters using unscaled 32-bit offsets, e.g.
554 // st1h z0.s, p0, [x0, z0.s, uxtw]
556 // st1h z0.d, p0, [x0, z0.d, uxtw]
557 defm SST1B_D : sve_mem_sst_sv_32_unscaled<0b000, "st1b", Z_d, ZPR64, ZPR64ExtSXTW8Only, ZPR64ExtUXTW8Only>;
558 defm SST1B_S : sve_mem_sst_sv_32_unscaled<0b001, "st1b", Z_s, ZPR32, ZPR32ExtSXTW8Only, ZPR32ExtUXTW8Only>;
559 defm SST1H_D : sve_mem_sst_sv_32_unscaled<0b010, "st1h", Z_d, ZPR64, ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
560 defm SST1H_S : sve_mem_sst_sv_32_unscaled<0b011, "st1h", Z_s, ZPR32, ZPR32ExtSXTW8, ZPR32ExtUXTW8>;
561 defm SST1W_D : sve_mem_sst_sv_32_unscaled<0b100, "st1w", Z_d, ZPR64, ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
562 defm SST1W : sve_mem_sst_sv_32_unscaled<0b101, "st1w", Z_s, ZPR32, ZPR32ExtSXTW8, ZPR32ExtUXTW8>;
563 defm SST1D : sve_mem_sst_sv_32_unscaled<0b110, "st1d", Z_d, ZPR64, ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
565 // Scatters using scaled 32-bit offsets, e.g.
566 // st1h z0.s, p0, [x0, z0.s, uxtw #1]
568 // st1h z0.d, p0, [x0, z0.d, uxtw #1]
569 defm SST1H_D : sve_mem_sst_sv_32_scaled<0b010, "st1h", Z_d, ZPR64, ZPR64ExtSXTW16, ZPR64ExtUXTW16>;
570 defm SST1H_S : sve_mem_sst_sv_32_scaled<0b011, "st1h", Z_s, ZPR32, ZPR32ExtSXTW16, ZPR32ExtUXTW16>;
571 defm SST1W_D : sve_mem_sst_sv_32_scaled<0b100, "st1w", Z_d, ZPR64, ZPR64ExtSXTW32, ZPR64ExtUXTW32>;
572 defm SST1W : sve_mem_sst_sv_32_scaled<0b101, "st1w", Z_s, ZPR32, ZPR32ExtSXTW32, ZPR32ExtUXTW32>;
573 defm SST1D : sve_mem_sst_sv_32_scaled<0b110, "st1d", Z_d, ZPR64, ZPR64ExtSXTW64, ZPR64ExtUXTW64>;
575 // Scatters using 32/64-bit pointers with offset, e.g.
576 // st1h z0.s, p0, [z0.s, #16]
577 // st1h z0.d, p0, [z0.d, #16]
578 defm SST1B_D : sve_mem_sst_vi_ptrs<0b000, "st1b", Z_d, ZPR64, imm0_31>;
579 defm SST1B_S : sve_mem_sst_vi_ptrs<0b001, "st1b", Z_s, ZPR32, imm0_31>;
580 defm SST1H_D : sve_mem_sst_vi_ptrs<0b010, "st1h", Z_d, ZPR64, uimm5s2>;
581 defm SST1H_S : sve_mem_sst_vi_ptrs<0b011, "st1h", Z_s, ZPR32, uimm5s2>;
582 defm SST1W_D : sve_mem_sst_vi_ptrs<0b100, "st1w", Z_d, ZPR64, uimm5s4>;
583 defm SST1W : sve_mem_sst_vi_ptrs<0b101, "st1w", Z_s, ZPR32, uimm5s4>;
584 defm SST1D : sve_mem_sst_vi_ptrs<0b110, "st1d", Z_d, ZPR64, uimm5s8>;
586 // Scatters using unscaled 64-bit offsets, e.g.
587 // st1h z0.d, p0, [x0, z0.d]
588 defm SST1B_D : sve_mem_sst_sv_64_unscaled<0b00, "st1b">;
589 defm SST1H_D : sve_mem_sst_sv_64_unscaled<0b01, "st1h">;
590 defm SST1W_D : sve_mem_sst_sv_64_unscaled<0b10, "st1w">;
591 defm SST1D : sve_mem_sst_sv_64_unscaled<0b11, "st1d">;
593 // Scatters using scaled 64-bit offsets, e.g.
594 // st1h z0.d, p0, [x0, z0.d, lsl #1]
595 defm SST1H_D_SCALED : sve_mem_sst_sv_64_scaled<0b01, "st1h", ZPR64ExtLSL16>;
596 defm SST1W_D_SCALED : sve_mem_sst_sv_64_scaled<0b10, "st1w", ZPR64ExtLSL32>;
597 defm SST1D_SCALED : sve_mem_sst_sv_64_scaled<0b11, "st1d", ZPR64ExtLSL64>;
599 // ST(2|3|4) structured stores (register + immediate)
600 defm ST2B_IMM : sve_mem_est_si<0b00, 0b01, ZZ_b, "st2b", simm4s2>;
601 defm ST3B_IMM : sve_mem_est_si<0b00, 0b10, ZZZ_b, "st3b", simm4s3>;
602 defm ST4B_IMM : sve_mem_est_si<0b00, 0b11, ZZZZ_b, "st4b", simm4s4>;
603 defm ST2H_IMM : sve_mem_est_si<0b01, 0b01, ZZ_h, "st2h", simm4s2>;
604 defm ST3H_IMM : sve_mem_est_si<0b01, 0b10, ZZZ_h, "st3h", simm4s3>;
605 defm ST4H_IMM : sve_mem_est_si<0b01, 0b11, ZZZZ_h, "st4h", simm4s4>;
606 defm ST2W_IMM : sve_mem_est_si<0b10, 0b01, ZZ_s, "st2w", simm4s2>;
607 defm ST3W_IMM : sve_mem_est_si<0b10, 0b10, ZZZ_s, "st3w", simm4s3>;
608 defm ST4W_IMM : sve_mem_est_si<0b10, 0b11, ZZZZ_s, "st4w", simm4s4>;
609 defm ST2D_IMM : sve_mem_est_si<0b11, 0b01, ZZ_d, "st2d", simm4s2>;
610 defm ST3D_IMM : sve_mem_est_si<0b11, 0b10, ZZZ_d, "st3d", simm4s3>;
611 defm ST4D_IMM : sve_mem_est_si<0b11, 0b11, ZZZZ_d, "st4d", simm4s4>;
613 // ST(2|3|4) structured stores (register + register)
614 def ST2B : sve_mem_est_ss<0b00, 0b01, ZZ_b, "st2b", GPR64NoXZRshifted8>;
615 def ST3B : sve_mem_est_ss<0b00, 0b10, ZZZ_b, "st3b", GPR64NoXZRshifted8>;
616 def ST4B : sve_mem_est_ss<0b00, 0b11, ZZZZ_b, "st4b", GPR64NoXZRshifted8>;
617 def ST2H : sve_mem_est_ss<0b01, 0b01, ZZ_h, "st2h", GPR64NoXZRshifted16>;
618 def ST3H : sve_mem_est_ss<0b01, 0b10, ZZZ_h, "st3h", GPR64NoXZRshifted16>;
619 def ST4H : sve_mem_est_ss<0b01, 0b11, ZZZZ_h, "st4h", GPR64NoXZRshifted16>;
620 def ST2W : sve_mem_est_ss<0b10, 0b01, ZZ_s, "st2w", GPR64NoXZRshifted32>;
621 def ST3W : sve_mem_est_ss<0b10, 0b10, ZZZ_s, "st3w", GPR64NoXZRshifted32>;
622 def ST4W : sve_mem_est_ss<0b10, 0b11, ZZZZ_s, "st4w", GPR64NoXZRshifted32>;
623 def ST2D : sve_mem_est_ss<0b11, 0b01, ZZ_d, "st2d", GPR64NoXZRshifted64>;
624 def ST3D : sve_mem_est_ss<0b11, 0b10, ZZZ_d, "st3d", GPR64NoXZRshifted64>;
625 def ST4D : sve_mem_est_ss<0b11, 0b11, ZZZZ_d, "st4d", GPR64NoXZRshifted64>;
627 // Non-temporal contiguous stores (register + immediate)
628 defm STNT1B_ZRI : sve_mem_cstnt_si<0b00, "stnt1b", Z_b, ZPR8>;
629 defm STNT1H_ZRI : sve_mem_cstnt_si<0b01, "stnt1h", Z_h, ZPR16>;
630 defm STNT1W_ZRI : sve_mem_cstnt_si<0b10, "stnt1w", Z_s, ZPR32>;
631 defm STNT1D_ZRI : sve_mem_cstnt_si<0b11, "stnt1d", Z_d, ZPR64>;
633 // Non-temporal contiguous stores (register + register)
634 defm STNT1B_ZRR : sve_mem_cstnt_ss<0b00, "stnt1b", Z_b, ZPR8, GPR64NoXZRshifted8>;
635 defm STNT1H_ZRR : sve_mem_cstnt_ss<0b01, "stnt1h", Z_h, ZPR16, GPR64NoXZRshifted16>;
636 defm STNT1W_ZRR : sve_mem_cstnt_ss<0b10, "stnt1w", Z_s, ZPR32, GPR64NoXZRshifted32>;
637 defm STNT1D_ZRR : sve_mem_cstnt_ss<0b11, "stnt1d", Z_d, ZPR64, GPR64NoXZRshifted64>;
640 defm LDR_ZXI : sve_mem_z_fill<"ldr">;
641 defm LDR_PXI : sve_mem_p_fill<"ldr">;
642 defm STR_ZXI : sve_mem_z_spill<"str">;
643 defm STR_PXI : sve_mem_p_spill<"str">;
645 // Contiguous prefetch (register + immediate)
646 defm PRFB_PRI : sve_mem_prfm_si<0b00, "prfb">;
647 defm PRFH_PRI : sve_mem_prfm_si<0b01, "prfh">;
648 defm PRFW_PRI : sve_mem_prfm_si<0b10, "prfw">;
649 defm PRFD_PRI : sve_mem_prfm_si<0b11, "prfd">;
651 // Contiguous prefetch (register + register)
652 def PRFB_PRR : sve_mem_prfm_ss<0b001, "prfb", GPR64NoXZRshifted8>;
653 def PRFH_PRR : sve_mem_prfm_ss<0b011, "prfh", GPR64NoXZRshifted16>;
654 def PRFS_PRR : sve_mem_prfm_ss<0b101, "prfw", GPR64NoXZRshifted32>;
655 def PRFD_PRR : sve_mem_prfm_ss<0b111, "prfd", GPR64NoXZRshifted64>;
657 // Gather prefetch using scaled 32-bit offsets, e.g.
658 // prfh pldl1keep, p0, [x0, z0.s, uxtw #1]
659 defm PRFB_S : sve_mem_32b_prfm_sv_scaled<0b00, "prfb", ZPR32ExtSXTW8Only, ZPR32ExtUXTW8Only>;
660 defm PRFH_S : sve_mem_32b_prfm_sv_scaled<0b01, "prfh", ZPR32ExtSXTW16, ZPR32ExtUXTW16>;
661 defm PRFW_S : sve_mem_32b_prfm_sv_scaled<0b10, "prfw", ZPR32ExtSXTW32, ZPR32ExtUXTW32>;
662 defm PRFD_S : sve_mem_32b_prfm_sv_scaled<0b11, "prfd", ZPR32ExtSXTW64, ZPR32ExtUXTW64>;
664 // Gather prefetch using unpacked, scaled 32-bit offsets, e.g.
665 // prfh pldl1keep, p0, [x0, z0.d, uxtw #1]
666 defm PRFB_D : sve_mem_64b_prfm_sv_ext_scaled<0b00, "prfb", ZPR64ExtSXTW8Only, ZPR64ExtUXTW8Only>;
667 defm PRFH_D : sve_mem_64b_prfm_sv_ext_scaled<0b01, "prfh", ZPR64ExtSXTW16, ZPR64ExtUXTW16>;
668 defm PRFW_D : sve_mem_64b_prfm_sv_ext_scaled<0b10, "prfw", ZPR64ExtSXTW32, ZPR64ExtUXTW32>;
669 defm PRFD_D : sve_mem_64b_prfm_sv_ext_scaled<0b11, "prfd", ZPR64ExtSXTW64, ZPR64ExtUXTW64>;
671 // Gather prefetch using scaled 64-bit offsets, e.g.
672 // prfh pldl1keep, p0, [x0, z0.d, lsl #1]
673 defm PRFB_D_SCALED : sve_mem_64b_prfm_sv_lsl_scaled<0b00, "prfb", ZPR64ExtLSL8>;
674 defm PRFH_D_SCALED : sve_mem_64b_prfm_sv_lsl_scaled<0b01, "prfh", ZPR64ExtLSL16>;
675 defm PRFW_D_SCALED : sve_mem_64b_prfm_sv_lsl_scaled<0b10, "prfw", ZPR64ExtLSL32>;
676 defm PRFD_D_SCALED : sve_mem_64b_prfm_sv_lsl_scaled<0b11, "prfd", ZPR64ExtLSL64>;
678 // Gather prefetch using 32/64-bit pointers with offset, e.g.
679 // prfh pldl1keep, p0, [z0.s, #16]
680 // prfh pldl1keep, p0, [z0.d, #16]
681 defm PRFB_S_PZI : sve_mem_32b_prfm_vi<0b00, "prfb", imm0_31>;
682 defm PRFH_S_PZI : sve_mem_32b_prfm_vi<0b01, "prfh", uimm5s2>;
683 defm PRFW_S_PZI : sve_mem_32b_prfm_vi<0b10, "prfw", uimm5s4>;
684 defm PRFD_S_PZI : sve_mem_32b_prfm_vi<0b11, "prfd", uimm5s8>;
686 defm PRFB_D_PZI : sve_mem_64b_prfm_vi<0b00, "prfb", imm0_31>;
687 defm PRFH_D_PZI : sve_mem_64b_prfm_vi<0b01, "prfh", uimm5s2>;
688 defm PRFW_D_PZI : sve_mem_64b_prfm_vi<0b10, "prfw", uimm5s4>;
689 defm PRFD_D_PZI : sve_mem_64b_prfm_vi<0b11, "prfd", uimm5s8>;
691 defm ADR_SXTW_ZZZ_D : sve_int_bin_cons_misc_0_a_sxtw<0b00, "adr">;
692 defm ADR_UXTW_ZZZ_D : sve_int_bin_cons_misc_0_a_uxtw<0b01, "adr">;
693 defm ADR_LSL_ZZZ_S : sve_int_bin_cons_misc_0_a_32_lsl<0b10, "adr">;
694 defm ADR_LSL_ZZZ_D : sve_int_bin_cons_misc_0_a_64_lsl<0b11, "adr">;
696 defm TBL_ZZZ : sve_int_perm_tbl<"tbl">;
698 defm ZIP1_ZZZ : sve_int_perm_bin_perm_zz<0b000, "zip1">;
699 defm ZIP2_ZZZ : sve_int_perm_bin_perm_zz<0b001, "zip2">;
700 defm UZP1_ZZZ : sve_int_perm_bin_perm_zz<0b010, "uzp1">;
701 defm UZP2_ZZZ : sve_int_perm_bin_perm_zz<0b011, "uzp2">;
702 defm TRN1_ZZZ : sve_int_perm_bin_perm_zz<0b100, "trn1">;
703 defm TRN2_ZZZ : sve_int_perm_bin_perm_zz<0b101, "trn2">;
705 defm ZIP1_PPP : sve_int_perm_bin_perm_pp<0b000, "zip1">;
706 defm ZIP2_PPP : sve_int_perm_bin_perm_pp<0b001, "zip2">;
707 defm UZP1_PPP : sve_int_perm_bin_perm_pp<0b010, "uzp1">;
708 defm UZP2_PPP : sve_int_perm_bin_perm_pp<0b011, "uzp2">;
709 defm TRN1_PPP : sve_int_perm_bin_perm_pp<0b100, "trn1">;
710 defm TRN2_PPP : sve_int_perm_bin_perm_pp<0b101, "trn2">;
712 defm CMPHS_PPzZZ : sve_int_cmp_0<0b000, "cmphs">;
713 defm CMPHI_PPzZZ : sve_int_cmp_0<0b001, "cmphi">;
714 defm CMPGE_PPzZZ : sve_int_cmp_0<0b100, "cmpge">;
715 defm CMPGT_PPzZZ : sve_int_cmp_0<0b101, "cmpgt">;
716 defm CMPEQ_PPzZZ : sve_int_cmp_0<0b110, "cmpeq">;
717 defm CMPNE_PPzZZ : sve_int_cmp_0<0b111, "cmpne">;
719 defm CMPEQ_WIDE_PPzZZ : sve_int_cmp_0_wide<0b010, "cmpeq">;
720 defm CMPNE_WIDE_PPzZZ : sve_int_cmp_0_wide<0b011, "cmpne">;
721 defm CMPGE_WIDE_PPzZZ : sve_int_cmp_1_wide<0b000, "cmpge">;
722 defm CMPGT_WIDE_PPzZZ : sve_int_cmp_1_wide<0b001, "cmpgt">;
723 defm CMPLT_WIDE_PPzZZ : sve_int_cmp_1_wide<0b010, "cmplt">;
724 defm CMPLE_WIDE_PPzZZ : sve_int_cmp_1_wide<0b011, "cmple">;
725 defm CMPHS_WIDE_PPzZZ : sve_int_cmp_1_wide<0b100, "cmphs">;
726 defm CMPHI_WIDE_PPzZZ : sve_int_cmp_1_wide<0b101, "cmphi">;
727 defm CMPLO_WIDE_PPzZZ : sve_int_cmp_1_wide<0b110, "cmplo">;
728 defm CMPLS_WIDE_PPzZZ : sve_int_cmp_1_wide<0b111, "cmpls">;
730 defm CMPGE_PPzZI : sve_int_scmp_vi<0b000, "cmpge">;
731 defm CMPGT_PPzZI : sve_int_scmp_vi<0b001, "cmpgt">;
732 defm CMPLT_PPzZI : sve_int_scmp_vi<0b010, "cmplt">;
733 defm CMPLE_PPzZI : sve_int_scmp_vi<0b011, "cmple">;
734 defm CMPEQ_PPzZI : sve_int_scmp_vi<0b100, "cmpeq">;
735 defm CMPNE_PPzZI : sve_int_scmp_vi<0b101, "cmpne">;
736 defm CMPHS_PPzZI : sve_int_ucmp_vi<0b00, "cmphs">;
737 defm CMPHI_PPzZI : sve_int_ucmp_vi<0b01, "cmphi">;
738 defm CMPLO_PPzZI : sve_int_ucmp_vi<0b10, "cmplo">;
739 defm CMPLS_PPzZI : sve_int_ucmp_vi<0b11, "cmpls">;
741 defm FCMGE_PPzZZ : sve_fp_3op_p_pd<0b000, "fcmge">;
742 defm FCMGT_PPzZZ : sve_fp_3op_p_pd<0b001, "fcmgt">;
743 defm FCMEQ_PPzZZ : sve_fp_3op_p_pd<0b010, "fcmeq">;
744 defm FCMNE_PPzZZ : sve_fp_3op_p_pd<0b011, "fcmne">;
745 defm FCMUO_PPzZZ : sve_fp_3op_p_pd<0b100, "fcmuo">;
746 defm FACGE_PPzZZ : sve_fp_3op_p_pd<0b101, "facge">;
747 defm FACGT_PPzZZ : sve_fp_3op_p_pd<0b111, "facgt">;
749 defm FCMGE_PPzZ0 : sve_fp_2op_p_pd<0b000, "fcmge">;
750 defm FCMGT_PPzZ0 : sve_fp_2op_p_pd<0b001, "fcmgt">;
751 defm FCMLT_PPzZ0 : sve_fp_2op_p_pd<0b010, "fcmlt">;
752 defm FCMLE_PPzZ0 : sve_fp_2op_p_pd<0b011, "fcmle">;
753 defm FCMEQ_PPzZ0 : sve_fp_2op_p_pd<0b100, "fcmeq">;
754 defm FCMNE_PPzZ0 : sve_fp_2op_p_pd<0b110, "fcmne">;
756 defm WHILELT_PWW : sve_int_while4_rr<0b010, "whilelt">;
757 defm WHILELE_PWW : sve_int_while4_rr<0b011, "whilele">;
758 defm WHILELO_PWW : sve_int_while4_rr<0b110, "whilelo">;
759 defm WHILELS_PWW : sve_int_while4_rr<0b111, "whilels">;
761 defm WHILELT_PXX : sve_int_while8_rr<0b010, "whilelt">;
762 defm WHILELE_PXX : sve_int_while8_rr<0b011, "whilele">;
763 defm WHILELO_PXX : sve_int_while8_rr<0b110, "whilelo">;
764 defm WHILELS_PXX : sve_int_while8_rr<0b111, "whilels">;
766 def CTERMEQ_WW : sve_int_cterm<0b0, 0b0, "ctermeq", GPR32>;
767 def CTERMNE_WW : sve_int_cterm<0b0, 0b1, "ctermne", GPR32>;
768 def CTERMEQ_XX : sve_int_cterm<0b1, 0b0, "ctermeq", GPR64>;
769 def CTERMNE_XX : sve_int_cterm<0b1, 0b1, "ctermne", GPR64>;
771 def RDVLI_XI : sve_int_read_vl_a<0b0, 0b11111, "rdvl">;
772 def ADDVL_XXI : sve_int_arith_vl<0b0, "addvl">;
773 def ADDPL_XXI : sve_int_arith_vl<0b1, "addpl">;
775 defm CNTB_XPiI : sve_int_count<0b000, "cntb">;
776 defm CNTH_XPiI : sve_int_count<0b010, "cnth">;
777 defm CNTW_XPiI : sve_int_count<0b100, "cntw">;
778 defm CNTD_XPiI : sve_int_count<0b110, "cntd">;
779 defm CNTP_XPP : sve_int_pcount_pred<0b0000, "cntp">;
781 defm INCB_XPiI : sve_int_pred_pattern_a<0b000, "incb">;
782 defm DECB_XPiI : sve_int_pred_pattern_a<0b001, "decb">;
783 defm INCH_XPiI : sve_int_pred_pattern_a<0b010, "inch">;
784 defm DECH_XPiI : sve_int_pred_pattern_a<0b011, "dech">;
785 defm INCW_XPiI : sve_int_pred_pattern_a<0b100, "incw">;
786 defm DECW_XPiI : sve_int_pred_pattern_a<0b101, "decw">;
787 defm INCD_XPiI : sve_int_pred_pattern_a<0b110, "incd">;
788 defm DECD_XPiI : sve_int_pred_pattern_a<0b111, "decd">;
790 defm SQINCB_XPiWdI : sve_int_pred_pattern_b_s32<0b00000, "sqincb">;
791 defm UQINCB_WPiI : sve_int_pred_pattern_b_u32<0b00001, "uqincb">;
792 defm SQDECB_XPiWdI : sve_int_pred_pattern_b_s32<0b00010, "sqdecb">;
793 defm UQDECB_WPiI : sve_int_pred_pattern_b_u32<0b00011, "uqdecb">;
794 defm SQINCB_XPiI : sve_int_pred_pattern_b_x64<0b00100, "sqincb">;
795 defm UQINCB_XPiI : sve_int_pred_pattern_b_x64<0b00101, "uqincb">;
796 defm SQDECB_XPiI : sve_int_pred_pattern_b_x64<0b00110, "sqdecb">;
797 defm UQDECB_XPiI : sve_int_pred_pattern_b_x64<0b00111, "uqdecb">;
799 defm SQINCH_XPiWdI : sve_int_pred_pattern_b_s32<0b01000, "sqinch">;
800 defm UQINCH_WPiI : sve_int_pred_pattern_b_u32<0b01001, "uqinch">;
801 defm SQDECH_XPiWdI : sve_int_pred_pattern_b_s32<0b01010, "sqdech">;
802 defm UQDECH_WPiI : sve_int_pred_pattern_b_u32<0b01011, "uqdech">;
803 defm SQINCH_XPiI : sve_int_pred_pattern_b_x64<0b01100, "sqinch">;
804 defm UQINCH_XPiI : sve_int_pred_pattern_b_x64<0b01101, "uqinch">;
805 defm SQDECH_XPiI : sve_int_pred_pattern_b_x64<0b01110, "sqdech">;
806 defm UQDECH_XPiI : sve_int_pred_pattern_b_x64<0b01111, "uqdech">;
808 defm SQINCW_XPiWdI : sve_int_pred_pattern_b_s32<0b10000, "sqincw">;
809 defm UQINCW_WPiI : sve_int_pred_pattern_b_u32<0b10001, "uqincw">;
810 defm SQDECW_XPiWdI : sve_int_pred_pattern_b_s32<0b10010, "sqdecw">;
811 defm UQDECW_WPiI : sve_int_pred_pattern_b_u32<0b10011, "uqdecw">;
812 defm SQINCW_XPiI : sve_int_pred_pattern_b_x64<0b10100, "sqincw">;
813 defm UQINCW_XPiI : sve_int_pred_pattern_b_x64<0b10101, "uqincw">;
814 defm SQDECW_XPiI : sve_int_pred_pattern_b_x64<0b10110, "sqdecw">;
815 defm UQDECW_XPiI : sve_int_pred_pattern_b_x64<0b10111, "uqdecw">;
817 defm SQINCD_XPiWdI : sve_int_pred_pattern_b_s32<0b11000, "sqincd">;
818 defm UQINCD_WPiI : sve_int_pred_pattern_b_u32<0b11001, "uqincd">;
819 defm SQDECD_XPiWdI : sve_int_pred_pattern_b_s32<0b11010, "sqdecd">;
820 defm UQDECD_WPiI : sve_int_pred_pattern_b_u32<0b11011, "uqdecd">;
821 defm SQINCD_XPiI : sve_int_pred_pattern_b_x64<0b11100, "sqincd">;
822 defm UQINCD_XPiI : sve_int_pred_pattern_b_x64<0b11101, "uqincd">;
823 defm SQDECD_XPiI : sve_int_pred_pattern_b_x64<0b11110, "sqdecd">;
824 defm UQDECD_XPiI : sve_int_pred_pattern_b_x64<0b11111, "uqdecd">;
826 defm SQINCH_ZPiI : sve_int_countvlv<0b01000, "sqinch", ZPR16>;
827 defm UQINCH_ZPiI : sve_int_countvlv<0b01001, "uqinch", ZPR16>;
828 defm SQDECH_ZPiI : sve_int_countvlv<0b01010, "sqdech", ZPR16>;
829 defm UQDECH_ZPiI : sve_int_countvlv<0b01011, "uqdech", ZPR16>;
830 defm INCH_ZPiI : sve_int_countvlv<0b01100, "inch", ZPR16>;
831 defm DECH_ZPiI : sve_int_countvlv<0b01101, "dech", ZPR16>;
832 defm SQINCW_ZPiI : sve_int_countvlv<0b10000, "sqincw", ZPR32>;
833 defm UQINCW_ZPiI : sve_int_countvlv<0b10001, "uqincw", ZPR32>;
834 defm SQDECW_ZPiI : sve_int_countvlv<0b10010, "sqdecw", ZPR32>;
835 defm UQDECW_ZPiI : sve_int_countvlv<0b10011, "uqdecw", ZPR32>;
836 defm INCW_ZPiI : sve_int_countvlv<0b10100, "incw", ZPR32>;
837 defm DECW_ZPiI : sve_int_countvlv<0b10101, "decw", ZPR32>;
838 defm SQINCD_ZPiI : sve_int_countvlv<0b11000, "sqincd", ZPR64>;
839 defm UQINCD_ZPiI : sve_int_countvlv<0b11001, "uqincd", ZPR64>;
840 defm SQDECD_ZPiI : sve_int_countvlv<0b11010, "sqdecd", ZPR64>;
841 defm UQDECD_ZPiI : sve_int_countvlv<0b11011, "uqdecd", ZPR64>;
842 defm INCD_ZPiI : sve_int_countvlv<0b11100, "incd", ZPR64>;
843 defm DECD_ZPiI : sve_int_countvlv<0b11101, "decd", ZPR64>;
845 defm SQINCP_XPWd : sve_int_count_r_s32<0b00000, "sqincp">;
846 defm SQINCP_XP : sve_int_count_r_x64<0b00010, "sqincp">;
847 defm UQINCP_WP : sve_int_count_r_u32<0b00100, "uqincp">;
848 defm UQINCP_XP : sve_int_count_r_x64<0b00110, "uqincp">;
849 defm SQDECP_XPWd : sve_int_count_r_s32<0b01000, "sqdecp">;
850 defm SQDECP_XP : sve_int_count_r_x64<0b01010, "sqdecp">;
851 defm UQDECP_WP : sve_int_count_r_u32<0b01100, "uqdecp">;
852 defm UQDECP_XP : sve_int_count_r_x64<0b01110, "uqdecp">;
853 defm INCP_XP : sve_int_count_r_x64<0b10000, "incp">;
854 defm DECP_XP : sve_int_count_r_x64<0b10100, "decp">;
856 defm SQINCP_ZP : sve_int_count_v<0b00000, "sqincp">;
857 defm UQINCP_ZP : sve_int_count_v<0b00100, "uqincp">;
858 defm SQDECP_ZP : sve_int_count_v<0b01000, "sqdecp">;
859 defm UQDECP_ZP : sve_int_count_v<0b01100, "uqdecp">;
860 defm INCP_ZP : sve_int_count_v<0b10000, "incp">;
861 defm DECP_ZP : sve_int_count_v<0b10100, "decp">;
863 defm INDEX_RR : sve_int_index_rr<"index">;
864 defm INDEX_IR : sve_int_index_ir<"index">;
865 defm INDEX_RI : sve_int_index_ri<"index">;
866 defm INDEX_II : sve_int_index_ii<"index">;
868 // Unpredicated shifts
869 defm ASR_ZZI : sve_int_bin_cons_shift_imm_right<0b00, "asr">;
870 defm LSR_ZZI : sve_int_bin_cons_shift_imm_right<0b01, "lsr">;
871 defm LSL_ZZI : sve_int_bin_cons_shift_imm_left< 0b11, "lsl">;
873 defm ASR_WIDE_ZZZ : sve_int_bin_cons_shift_wide<0b00, "asr">;
874 defm LSR_WIDE_ZZZ : sve_int_bin_cons_shift_wide<0b01, "lsr">;
875 defm LSL_WIDE_ZZZ : sve_int_bin_cons_shift_wide<0b11, "lsl">;
878 defm ASR_ZPmI : sve_int_bin_pred_shift_imm_right<0b0000, "asr">;
879 defm LSR_ZPmI : sve_int_bin_pred_shift_imm_right<0b0001, "lsr">;
880 defm LSL_ZPmI : sve_int_bin_pred_shift_imm_left< 0b0011, "lsl">;
881 defm ASRD_ZPmI : sve_int_bin_pred_shift_imm_right<0b0100, "asrd">;
883 defm ASR_ZPmZ : sve_int_bin_pred_shift<0b000, "asr">;
884 defm LSR_ZPmZ : sve_int_bin_pred_shift<0b001, "lsr">;
885 defm LSL_ZPmZ : sve_int_bin_pred_shift<0b011, "lsl">;
886 defm ASRR_ZPmZ : sve_int_bin_pred_shift<0b100, "asrr">;
887 defm LSRR_ZPmZ : sve_int_bin_pred_shift<0b101, "lsrr">;
888 defm LSLR_ZPmZ : sve_int_bin_pred_shift<0b111, "lslr">;
890 defm ASR_WIDE_ZPmZ : sve_int_bin_pred_shift_wide<0b000, "asr">;
891 defm LSR_WIDE_ZPmZ : sve_int_bin_pred_shift_wide<0b001, "lsr">;
892 defm LSL_WIDE_ZPmZ : sve_int_bin_pred_shift_wide<0b011, "lsl">;
894 def FCVT_ZPmZ_StoH : sve_fp_2op_p_zd<0b1001000, "fcvt", ZPR32, ZPR16, ElementSizeS>;
895 def FCVT_ZPmZ_HtoS : sve_fp_2op_p_zd<0b1001001, "fcvt", ZPR16, ZPR32, ElementSizeS>;
896 def SCVTF_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0110010, "scvtf", ZPR16, ZPR16, ElementSizeH>;
897 def SCVTF_ZPmZ_StoS : sve_fp_2op_p_zd<0b1010100, "scvtf", ZPR32, ZPR32, ElementSizeS>;
898 def UCVTF_ZPmZ_StoS : sve_fp_2op_p_zd<0b1010101, "ucvtf", ZPR32, ZPR32, ElementSizeS>;
899 def UCVTF_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0110011, "ucvtf", ZPR16, ZPR16, ElementSizeH>;
900 def FCVTZS_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0111010, "fcvtzs", ZPR16, ZPR16, ElementSizeH>;
901 def FCVTZS_ZPmZ_StoS : sve_fp_2op_p_zd<0b1011100, "fcvtzs", ZPR32, ZPR32, ElementSizeS>;
902 def FCVTZU_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0111011, "fcvtzu", ZPR16, ZPR16, ElementSizeH>;
903 def FCVTZU_ZPmZ_StoS : sve_fp_2op_p_zd<0b1011101, "fcvtzu", ZPR32, ZPR32, ElementSizeS>;
904 def FCVT_ZPmZ_DtoH : sve_fp_2op_p_zd<0b1101000, "fcvt", ZPR64, ZPR16, ElementSizeD>;
905 def FCVT_ZPmZ_HtoD : sve_fp_2op_p_zd<0b1101001, "fcvt", ZPR16, ZPR64, ElementSizeD>;
906 def FCVT_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1101010, "fcvt", ZPR64, ZPR32, ElementSizeD>;
907 def FCVT_ZPmZ_StoD : sve_fp_2op_p_zd<0b1101011, "fcvt", ZPR32, ZPR64, ElementSizeD>;
908 def SCVTF_ZPmZ_StoD : sve_fp_2op_p_zd<0b1110000, "scvtf", ZPR32, ZPR64, ElementSizeD>;
909 def UCVTF_ZPmZ_StoD : sve_fp_2op_p_zd<0b1110001, "ucvtf", ZPR32, ZPR64, ElementSizeD>;
910 def UCVTF_ZPmZ_StoH : sve_fp_2op_p_zd<0b0110101, "ucvtf", ZPR32, ZPR16, ElementSizeS>;
911 def SCVTF_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1110100, "scvtf", ZPR64, ZPR32, ElementSizeD>;
912 def SCVTF_ZPmZ_StoH : sve_fp_2op_p_zd<0b0110100, "scvtf", ZPR32, ZPR16, ElementSizeS>;
913 def SCVTF_ZPmZ_DtoH : sve_fp_2op_p_zd<0b0110110, "scvtf", ZPR64, ZPR16, ElementSizeD>;
914 def UCVTF_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1110101, "ucvtf", ZPR64, ZPR32, ElementSizeD>;
915 def UCVTF_ZPmZ_DtoH : sve_fp_2op_p_zd<0b0110111, "ucvtf", ZPR64, ZPR16, ElementSizeD>;
916 def SCVTF_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1110110, "scvtf", ZPR64, ZPR64, ElementSizeD>;
917 def UCVTF_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1110111, "ucvtf", ZPR64, ZPR64, ElementSizeD>;
918 def FCVTZS_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1111000, "fcvtzs", ZPR64, ZPR32, ElementSizeD>;
919 def FCVTZU_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1111001, "fcvtzu", ZPR64, ZPR32, ElementSizeD>;
920 def FCVTZS_ZPmZ_StoD : sve_fp_2op_p_zd<0b1111100, "fcvtzs", ZPR32, ZPR64, ElementSizeD>;
921 def FCVTZS_ZPmZ_HtoS : sve_fp_2op_p_zd<0b0111100, "fcvtzs", ZPR16, ZPR32, ElementSizeS>;
922 def FCVTZS_ZPmZ_HtoD : sve_fp_2op_p_zd<0b0111110, "fcvtzs", ZPR16, ZPR64, ElementSizeD>;
923 def FCVTZU_ZPmZ_HtoS : sve_fp_2op_p_zd<0b0111101, "fcvtzu", ZPR16, ZPR32, ElementSizeS>;
924 def FCVTZU_ZPmZ_HtoD : sve_fp_2op_p_zd<0b0111111, "fcvtzu", ZPR16, ZPR64, ElementSizeD>;
925 def FCVTZU_ZPmZ_StoD : sve_fp_2op_p_zd<0b1111101, "fcvtzu", ZPR32, ZPR64, ElementSizeD>;
926 def FCVTZS_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1111110, "fcvtzs", ZPR64, ZPR64, ElementSizeD>;
927 def FCVTZU_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1111111, "fcvtzu", ZPR64, ZPR64, ElementSizeD>;
929 defm FRINTN_ZPmZ : sve_fp_2op_p_zd_HSD<0b00000, "frintn">;
930 defm FRINTP_ZPmZ : sve_fp_2op_p_zd_HSD<0b00001, "frintp">;
931 defm FRINTM_ZPmZ : sve_fp_2op_p_zd_HSD<0b00010, "frintm">;
932 defm FRINTZ_ZPmZ : sve_fp_2op_p_zd_HSD<0b00011, "frintz">;
933 defm FRINTA_ZPmZ : sve_fp_2op_p_zd_HSD<0b00100, "frinta">;
934 defm FRINTX_ZPmZ : sve_fp_2op_p_zd_HSD<0b00110, "frintx">;
935 defm FRINTI_ZPmZ : sve_fp_2op_p_zd_HSD<0b00111, "frinti">;
936 defm FRECPX_ZPmZ : sve_fp_2op_p_zd_HSD<0b01100, "frecpx">;
937 defm FSQRT_ZPmZ : sve_fp_2op_p_zd_HSD<0b01101, "fsqrt">;
940 def : InstAlias<"mov $Zd, $Zn",
941 (ORR_ZZZ ZPR64:$Zd, ZPR64:$Zn, ZPR64:$Zn), 1>;
942 def : InstAlias<"mov $Pd, $Pg/m, $Pn",
943 (SEL_PPPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPR8:$Pd), 1>;
944 def : InstAlias<"mov $Pd, $Pn",
945 (ORR_PPzPP PPR8:$Pd, PPR8:$Pn, PPR8:$Pn, PPR8:$Pn), 1>;
946 def : InstAlias<"mov $Pd, $Pg/z, $Pn",
947 (AND_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPR8:$Pn), 1>;
949 def : InstAlias<"movs $Pd, $Pn",
950 (ORRS_PPzPP PPR8:$Pd, PPR8:$Pn, PPR8:$Pn, PPR8:$Pn), 1>;
951 def : InstAlias<"movs $Pd, $Pg/z, $Pn",
952 (ANDS_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPR8:$Pn), 1>;
954 def : InstAlias<"not $Pd, $Pg/z, $Pn",
955 (EOR_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPRAny:$Pg), 1>;
957 def : InstAlias<"nots $Pd, $Pg/z, $Pn",
958 (EORS_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPRAny:$Pg), 1>;
960 def : InstAlias<"cmple $Zd, $Pg/z, $Zm, $Zn",
961 (CMPGE_PPzZZ_B PPR8:$Zd, PPR3bAny:$Pg, ZPR8:$Zn, ZPR8:$Zm), 0>;
962 def : InstAlias<"cmple $Zd, $Pg/z, $Zm, $Zn",
963 (CMPGE_PPzZZ_H PPR16:$Zd, PPR3bAny:$Pg, ZPR16:$Zn, ZPR16:$Zm), 0>;
964 def : InstAlias<"cmple $Zd, $Pg/z, $Zm, $Zn",
965 (CMPGE_PPzZZ_S PPR32:$Zd, PPR3bAny:$Pg, ZPR32:$Zn, ZPR32:$Zm), 0>;
966 def : InstAlias<"cmple $Zd, $Pg/z, $Zm, $Zn",
967 (CMPGE_PPzZZ_D PPR64:$Zd, PPR3bAny:$Pg, ZPR64:$Zn, ZPR64:$Zm), 0>;
969 def : InstAlias<"cmplo $Zd, $Pg/z, $Zm, $Zn",
970 (CMPHI_PPzZZ_B PPR8:$Zd, PPR3bAny:$Pg, ZPR8:$Zn, ZPR8:$Zm), 0>;
971 def : InstAlias<"cmplo $Zd, $Pg/z, $Zm, $Zn",
972 (CMPHI_PPzZZ_H PPR16:$Zd, PPR3bAny:$Pg, ZPR16:$Zn, ZPR16:$Zm), 0>;
973 def : InstAlias<"cmplo $Zd, $Pg/z, $Zm, $Zn",
974 (CMPHI_PPzZZ_S PPR32:$Zd, PPR3bAny:$Pg, ZPR32:$Zn, ZPR32:$Zm), 0>;
975 def : InstAlias<"cmplo $Zd, $Pg/z, $Zm, $Zn",
976 (CMPHI_PPzZZ_D PPR64:$Zd, PPR3bAny:$Pg, ZPR64:$Zn, ZPR64:$Zm), 0>;
978 def : InstAlias<"cmpls $Zd, $Pg/z, $Zm, $Zn",
979 (CMPHS_PPzZZ_B PPR8:$Zd, PPR3bAny:$Pg, ZPR8:$Zn, ZPR8:$Zm), 0>;
980 def : InstAlias<"cmpls $Zd, $Pg/z, $Zm, $Zn",
981 (CMPHS_PPzZZ_H PPR16:$Zd, PPR3bAny:$Pg, ZPR16:$Zn, ZPR16:$Zm), 0>;
982 def : InstAlias<"cmpls $Zd, $Pg/z, $Zm, $Zn",
983 (CMPHS_PPzZZ_S PPR32:$Zd, PPR3bAny:$Pg, ZPR32:$Zn, ZPR32:$Zm), 0>;
984 def : InstAlias<"cmpls $Zd, $Pg/z, $Zm, $Zn",
985 (CMPHS_PPzZZ_D PPR64:$Zd, PPR3bAny:$Pg, ZPR64:$Zn, ZPR64:$Zm), 0>;
987 def : InstAlias<"cmplt $Zd, $Pg/z, $Zm, $Zn",
988 (CMPGT_PPzZZ_B PPR8:$Zd, PPR3bAny:$Pg, ZPR8:$Zn, ZPR8:$Zm), 0>;
989 def : InstAlias<"cmplt $Zd, $Pg/z, $Zm, $Zn",
990 (CMPGT_PPzZZ_H PPR16:$Zd, PPR3bAny:$Pg, ZPR16:$Zn, ZPR16:$Zm), 0>;
991 def : InstAlias<"cmplt $Zd, $Pg/z, $Zm, $Zn",
992 (CMPGT_PPzZZ_S PPR32:$Zd, PPR3bAny:$Pg, ZPR32:$Zn, ZPR32:$Zm), 0>;
993 def : InstAlias<"cmplt $Zd, $Pg/z, $Zm, $Zn",
994 (CMPGT_PPzZZ_D PPR64:$Zd, PPR3bAny:$Pg, ZPR64:$Zn, ZPR64:$Zm), 0>;
996 def : InstAlias<"facle $Zd, $Pg/z, $Zm, $Zn",
997 (FACGE_PPzZZ_H PPR16:$Zd, PPR3bAny:$Pg, ZPR16:$Zn, ZPR16:$Zm), 0>;
998 def : InstAlias<"facle $Zd, $Pg/z, $Zm, $Zn",
999 (FACGE_PPzZZ_S PPR32:$Zd, PPR3bAny:$Pg, ZPR32:$Zn, ZPR32:$Zm), 0>;
1000 def : InstAlias<"facle $Zd, $Pg/z, $Zm, $Zn",
1001 (FACGE_PPzZZ_D PPR64:$Zd, PPR3bAny:$Pg, ZPR64:$Zn, ZPR64:$Zm), 0>;
1003 def : InstAlias<"faclt $Zd, $Pg/z, $Zm, $Zn",
1004 (FACGT_PPzZZ_H PPR16:$Zd, PPR3bAny:$Pg, ZPR16:$Zn, ZPR16:$Zm), 0>;
1005 def : InstAlias<"faclt $Zd, $Pg/z, $Zm, $Zn",
1006 (FACGT_PPzZZ_S PPR32:$Zd, PPR3bAny:$Pg, ZPR32:$Zn, ZPR32:$Zm), 0>;
1007 def : InstAlias<"faclt $Zd, $Pg/z, $Zm, $Zn",
1008 (FACGT_PPzZZ_D PPR64:$Zd, PPR3bAny:$Pg, ZPR64:$Zn, ZPR64:$Zm), 0>;
1010 def : InstAlias<"fcmle $Zd, $Pg/z, $Zm, $Zn",
1011 (FCMGE_PPzZZ_H PPR16:$Zd, PPR3bAny:$Pg, ZPR16:$Zn, ZPR16:$Zm), 0>;
1012 def : InstAlias<"fcmle $Zd, $Pg/z, $Zm, $Zn",
1013 (FCMGE_PPzZZ_S PPR32:$Zd, PPR3bAny:$Pg, ZPR32:$Zn, ZPR32:$Zm), 0>;
1014 def : InstAlias<"fcmle $Zd, $Pg/z, $Zm, $Zn",
1015 (FCMGE_PPzZZ_D PPR64:$Zd, PPR3bAny:$Pg, ZPR64:$Zn, ZPR64:$Zm), 0>;
1017 def : InstAlias<"fcmlt $Zd, $Pg/z, $Zm, $Zn",
1018 (FCMGT_PPzZZ_H PPR16:$Zd, PPR3bAny:$Pg, ZPR16:$Zn, ZPR16:$Zm), 0>;
1019 def : InstAlias<"fcmlt $Zd, $Pg/z, $Zm, $Zn",
1020 (FCMGT_PPzZZ_S PPR32:$Zd, PPR3bAny:$Pg, ZPR32:$Zn, ZPR32:$Zm), 0>;
1021 def : InstAlias<"fcmlt $Zd, $Pg/z, $Zm, $Zn",
1022 (FCMGT_PPzZZ_D PPR64:$Zd, PPR3bAny:$Pg, ZPR64:$Zn, ZPR64:$Zm), 0>;
1025 let Predicates = [HasSVE2] in {
1026 // SVE2 integer multiply-add (indexed)
1027 defm MLA_ZZZI : sve2_int_mla_by_indexed_elem<0b01, 0b0, "mla">;
1028 defm MLS_ZZZI : sve2_int_mla_by_indexed_elem<0b01, 0b1, "mls">;
1030 // SVE2 saturating multiply-add high (indexed)
1031 defm SQRDMLAH_ZZZI : sve2_int_mla_by_indexed_elem<0b10, 0b0, "sqrdmlah">;
1032 defm SQRDMLSH_ZZZI : sve2_int_mla_by_indexed_elem<0b10, 0b1, "sqrdmlsh">;
1034 // SVE2 saturating multiply-add high (vectors, unpredicated)
1035 defm SQRDMLAH_ZZZ : sve2_int_mla<0b0, "sqrdmlah">;
1036 defm SQRDMLSH_ZZZ : sve2_int_mla<0b1, "sqrdmlsh">;
1038 // SVE2 integer multiply (indexed)
1039 defm MUL_ZZZI : sve2_int_mul_by_indexed_elem<0b1110, "mul">;
1041 // SVE2 saturating multiply high (indexed)
1042 defm SQDMULH_ZZZI : sve2_int_mul_by_indexed_elem<0b1100, "sqdmulh">;
1043 defm SQRDMULH_ZZZI : sve2_int_mul_by_indexed_elem<0b1101, "sqrdmulh">;
1045 // SVE2 signed saturating doubling multiply high (unpredicated)
1046 defm SQDMULH_ZZZ : sve2_int_mul<0b100, "sqdmulh">;
1047 defm SQRDMULH_ZZZ : sve2_int_mul<0b101, "sqrdmulh">;
1049 // SVE2 integer multiply vectors (unpredicated)
1050 defm MUL_ZZZ : sve2_int_mul<0b000, "mul">;
1051 defm SMULH_ZZZ : sve2_int_mul<0b010, "smulh">;
1052 defm UMULH_ZZZ : sve2_int_mul<0b011, "umulh">;
1053 def PMUL_ZZZ_B : sve2_int_mul<0b00, 0b001, "pmul", ZPR8>;
1055 // SVE2 complex integer dot product (indexed)
1056 defm CDOT_ZZZI : sve2_cintx_dot_by_indexed_elem<"cdot">;
1058 // SVE2 complex integer dot product
1059 defm CDOT_ZZZ : sve2_cintx_dot<"cdot">;
1061 // SVE2 complex integer multiply-add (indexed)
1062 defm CMLA_ZZZI : sve2_cmla_by_indexed_elem<0b0, "cmla">;
1063 // SVE2 complex saturating multiply-add (indexed)
1064 defm SQRDCMLAH_ZZZI : sve2_cmla_by_indexed_elem<0b1, "sqrdcmlah">;
1066 // SVE2 complex integer multiply-add
1067 defm CMLA_ZZZ : sve2_int_cmla<0b0, "cmla">;
1068 defm SQRDCMLAH_ZZZ : sve2_int_cmla<0b1, "sqrdcmlah">;
1070 // SVE2 integer multiply long (indexed)
1071 defm SMULLB_ZZZI : sve2_int_mul_long_by_indexed_elem<0b000, "smullb">;
1072 defm SMULLT_ZZZI : sve2_int_mul_long_by_indexed_elem<0b001, "smullt">;
1073 defm UMULLB_ZZZI : sve2_int_mul_long_by_indexed_elem<0b010, "umullb">;
1074 defm UMULLT_ZZZI : sve2_int_mul_long_by_indexed_elem<0b011, "umullt">;
1076 // SVE2 saturating multiply (indexed)
1077 defm SQDMULLB_ZZZI : sve2_int_mul_long_by_indexed_elem<0b100, "sqdmullb">;
1078 defm SQDMULLT_ZZZI : sve2_int_mul_long_by_indexed_elem<0b101, "sqdmullt">;
1080 // SVE2 integer multiply-add long (indexed)
1081 defm SMLALB_ZZZI : sve2_int_mla_long_by_indexed_elem<0b1000, "smlalb">;
1082 defm SMLALT_ZZZI : sve2_int_mla_long_by_indexed_elem<0b1001, "smlalt">;
1083 defm UMLALB_ZZZI : sve2_int_mla_long_by_indexed_elem<0b1010, "umlalb">;
1084 defm UMLALT_ZZZI : sve2_int_mla_long_by_indexed_elem<0b1011, "umlalt">;
1085 defm SMLSLB_ZZZI : sve2_int_mla_long_by_indexed_elem<0b1100, "smlslb">;
1086 defm SMLSLT_ZZZI : sve2_int_mla_long_by_indexed_elem<0b1101, "smlslt">;
1087 defm UMLSLB_ZZZI : sve2_int_mla_long_by_indexed_elem<0b1110, "umlslb">;
1088 defm UMLSLT_ZZZI : sve2_int_mla_long_by_indexed_elem<0b1111, "umlslt">;
1090 // SVE2 integer multiply-add long (vectors, unpredicated)
1091 defm SMLALB_ZZZ : sve2_int_mla_long<0b10000, "smlalb">;
1092 defm SMLALT_ZZZ : sve2_int_mla_long<0b10001, "smlalt">;
1093 defm UMLALB_ZZZ : sve2_int_mla_long<0b10010, "umlalb">;
1094 defm UMLALT_ZZZ : sve2_int_mla_long<0b10011, "umlalt">;
1095 defm SMLSLB_ZZZ : sve2_int_mla_long<0b10100, "smlslb">;
1096 defm SMLSLT_ZZZ : sve2_int_mla_long<0b10101, "smlslt">;
1097 defm UMLSLB_ZZZ : sve2_int_mla_long<0b10110, "umlslb">;
1098 defm UMLSLT_ZZZ : sve2_int_mla_long<0b10111, "umlslt">;
1100 // SVE2 saturating multiply-add long (indexed)
1101 defm SQDMLALB_ZZZI : sve2_int_mla_long_by_indexed_elem<0b0100, "sqdmlalb">;
1102 defm SQDMLALT_ZZZI : sve2_int_mla_long_by_indexed_elem<0b0101, "sqdmlalt">;
1103 defm SQDMLSLB_ZZZI : sve2_int_mla_long_by_indexed_elem<0b0110, "sqdmlslb">;
1104 defm SQDMLSLT_ZZZI : sve2_int_mla_long_by_indexed_elem<0b0111, "sqdmlslt">;
1106 // SVE2 saturating multiply-add long (vectors, unpredicated)
1107 defm SQDMLALB_ZZZ : sve2_int_mla_long<0b11000, "sqdmlalb">;
1108 defm SQDMLALT_ZZZ : sve2_int_mla_long<0b11001, "sqdmlalt">;
1109 defm SQDMLSLB_ZZZ : sve2_int_mla_long<0b11010, "sqdmlslb">;
1110 defm SQDMLSLT_ZZZ : sve2_int_mla_long<0b11011, "sqdmlslt">;
1112 // SVE2 saturating multiply-add interleaved long
1113 defm SQDMLALBT_ZZZ : sve2_int_mla_long<0b00010, "sqdmlalbt">;
1114 defm SQDMLSLBT_ZZZ : sve2_int_mla_long<0b00011, "sqdmlslbt">;
1116 // SVE2 integer halving add/subtract (predicated)
1117 defm SHADD_ZPmZ : sve2_int_arith_pred<0b100000, "shadd">;
1118 defm UHADD_ZPmZ : sve2_int_arith_pred<0b100010, "uhadd">;
1119 defm SHSUB_ZPmZ : sve2_int_arith_pred<0b100100, "shsub">;
1120 defm UHSUB_ZPmZ : sve2_int_arith_pred<0b100110, "uhsub">;
1121 defm SRHADD_ZPmZ : sve2_int_arith_pred<0b101000, "srhadd">;
1122 defm URHADD_ZPmZ : sve2_int_arith_pred<0b101010, "urhadd">;
1123 defm SHSUBR_ZPmZ : sve2_int_arith_pred<0b101100, "shsubr">;
1124 defm UHSUBR_ZPmZ : sve2_int_arith_pred<0b101110, "uhsubr">;
1126 // SVE2 integer pairwise add and accumulate long
1127 defm SADALP_ZPmZ : sve2_int_sadd_long_accum_pairwise<0, "sadalp">;
1128 defm UADALP_ZPmZ : sve2_int_sadd_long_accum_pairwise<1, "uadalp">;
1130 // SVE2 integer pairwise arithmetic
1131 defm ADDP_ZPmZ : sve2_int_arith_pred<0b100011, "addp">;
1132 defm SMAXP_ZPmZ : sve2_int_arith_pred<0b101001, "smaxp">;
1133 defm UMAXP_ZPmZ : sve2_int_arith_pred<0b101011, "umaxp">;
1134 defm SMINP_ZPmZ : sve2_int_arith_pred<0b101101, "sminp">;
1135 defm UMINP_ZPmZ : sve2_int_arith_pred<0b101111, "uminp">;
1137 // SVE2 integer unary operations (predicated)
1138 defm URECPE_ZPmZ : sve2_int_un_pred_arit_s<0b000, "urecpe">;
1139 defm URSQRTE_ZPmZ : sve2_int_un_pred_arit_s<0b001, "ursqrte">;
1140 defm SQABS_ZPmZ : sve2_int_un_pred_arit<0b100, "sqabs">;
1141 defm SQNEG_ZPmZ : sve2_int_un_pred_arit<0b101, "sqneg">;
1143 // SVE2 saturating add/subtract
1144 defm SQADD_ZPmZ : sve2_int_arith_pred<0b110000, "sqadd">;
1145 defm UQADD_ZPmZ : sve2_int_arith_pred<0b110010, "uqadd">;
1146 defm SQSUB_ZPmZ : sve2_int_arith_pred<0b110100, "sqsub">;
1147 defm UQSUB_ZPmZ : sve2_int_arith_pred<0b110110, "uqsub">;
1148 defm SUQADD_ZPmZ : sve2_int_arith_pred<0b111000, "suqadd">;
1149 defm USQADD_ZPmZ : sve2_int_arith_pred<0b111010, "usqadd">;
1150 defm SQSUBR_ZPmZ : sve2_int_arith_pred<0b111100, "sqsubr">;
1151 defm UQSUBR_ZPmZ : sve2_int_arith_pred<0b111110, "uqsubr">;
1153 // SVE2 saturating/rounding bitwise shift left (predicated)
1154 defm SRSHL_ZPmZ : sve2_int_arith_pred<0b000100, "srshl">;
1155 defm URSHL_ZPmZ : sve2_int_arith_pred<0b000110, "urshl">;
1156 defm SRSHLR_ZPmZ : sve2_int_arith_pred<0b001100, "srshlr">;
1157 defm URSHLR_ZPmZ : sve2_int_arith_pred<0b001110, "urshlr">;
1158 defm SQSHL_ZPmZ : sve2_int_arith_pred<0b010000, "sqshl">;
1159 defm UQSHL_ZPmZ : sve2_int_arith_pred<0b010010, "uqshl">;
1160 defm SQRSHL_ZPmZ : sve2_int_arith_pred<0b010100, "sqrshl">;
1161 defm UQRSHL_ZPmZ : sve2_int_arith_pred<0b010110, "uqrshl">;
1162 defm SQSHLR_ZPmZ : sve2_int_arith_pred<0b011000, "sqshlr">;
1163 defm UQSHLR_ZPmZ : sve2_int_arith_pred<0b011010, "uqshlr">;
1164 defm SQRSHLR_ZPmZ : sve2_int_arith_pred<0b011100, "sqrshlr">;
1165 defm UQRSHLR_ZPmZ : sve2_int_arith_pred<0b011110, "uqrshlr">;
1167 // SVE2 predicated shifts
1168 defm SQSHL_ZPmI : sve_int_bin_pred_shift_imm_left< 0b0110, "sqshl">;
1169 defm UQSHL_ZPmI : sve_int_bin_pred_shift_imm_left< 0b0111, "uqshl">;
1170 defm SRSHR_ZPmI : sve_int_bin_pred_shift_imm_right<0b1100, "srshr">;
1171 defm URSHR_ZPmI : sve_int_bin_pred_shift_imm_right<0b1101, "urshr">;
1172 defm SQSHLU_ZPmI : sve_int_bin_pred_shift_imm_left< 0b1111, "sqshlu">;
1174 // SVE2 integer add/subtract long
1175 defm SADDLB_ZZZ : sve2_wide_int_arith_long<0b00000, "saddlb">;
1176 defm SADDLT_ZZZ : sve2_wide_int_arith_long<0b00001, "saddlt">;
1177 defm UADDLB_ZZZ : sve2_wide_int_arith_long<0b00010, "uaddlb">;
1178 defm UADDLT_ZZZ : sve2_wide_int_arith_long<0b00011, "uaddlt">;
1179 defm SSUBLB_ZZZ : sve2_wide_int_arith_long<0b00100, "ssublb">;
1180 defm SSUBLT_ZZZ : sve2_wide_int_arith_long<0b00101, "ssublt">;
1181 defm USUBLB_ZZZ : sve2_wide_int_arith_long<0b00110, "usublb">;
1182 defm USUBLT_ZZZ : sve2_wide_int_arith_long<0b00111, "usublt">;
1183 defm SABDLB_ZZZ : sve2_wide_int_arith_long<0b01100, "sabdlb">;
1184 defm SABDLT_ZZZ : sve2_wide_int_arith_long<0b01101, "sabdlt">;
1185 defm UABDLB_ZZZ : sve2_wide_int_arith_long<0b01110, "uabdlb">;
1186 defm UABDLT_ZZZ : sve2_wide_int_arith_long<0b01111, "uabdlt">;
1188 // SVE2 integer add/subtract wide
1189 defm SADDWB_ZZZ : sve2_wide_int_arith_wide<0b000, "saddwb">;
1190 defm SADDWT_ZZZ : sve2_wide_int_arith_wide<0b001, "saddwt">;
1191 defm UADDWB_ZZZ : sve2_wide_int_arith_wide<0b010, "uaddwb">;
1192 defm UADDWT_ZZZ : sve2_wide_int_arith_wide<0b011, "uaddwt">;
1193 defm SSUBWB_ZZZ : sve2_wide_int_arith_wide<0b100, "ssubwb">;
1194 defm SSUBWT_ZZZ : sve2_wide_int_arith_wide<0b101, "ssubwt">;
1195 defm USUBWB_ZZZ : sve2_wide_int_arith_wide<0b110, "usubwb">;
1196 defm USUBWT_ZZZ : sve2_wide_int_arith_wide<0b111, "usubwt">;
1198 // SVE2 integer multiply long
1199 defm SQDMULLB_ZZZ : sve2_wide_int_arith_long<0b11000, "sqdmullb">;
1200 defm SQDMULLT_ZZZ : sve2_wide_int_arith_long<0b11001, "sqdmullt">;
1201 defm SMULLB_ZZZ : sve2_wide_int_arith_long<0b11100, "smullb">;
1202 defm SMULLT_ZZZ : sve2_wide_int_arith_long<0b11101, "smullt">;
1203 defm UMULLB_ZZZ : sve2_wide_int_arith_long<0b11110, "umullb">;
1204 defm UMULLT_ZZZ : sve2_wide_int_arith_long<0b11111, "umullt">;
1205 defm PMULLB_ZZZ : sve2_pmul_long<0b0, "pmullb">;
1206 defm PMULLT_ZZZ : sve2_pmul_long<0b1, "pmullt">;
1208 // SVE2 bitwise shift and insert
1209 defm SRI_ZZI : sve2_int_bin_shift_imm_right<0b0, "sri">;
1210 defm SLI_ZZI : sve2_int_bin_shift_imm_left< 0b1, "sli">;
1212 // SVE2 bitwise shift right and accumulate
1213 defm SSRA_ZZI : sve2_int_bin_accum_shift_imm_right<0b00, "ssra">;
1214 defm USRA_ZZI : sve2_int_bin_accum_shift_imm_right<0b01, "usra">;
1215 defm SRSRA_ZZI : sve2_int_bin_accum_shift_imm_right<0b10, "srsra">;
1216 defm URSRA_ZZI : sve2_int_bin_accum_shift_imm_right<0b11, "ursra">;
1218 // SVE2 complex integer add
1219 defm CADD_ZZI : sve2_int_cadd<0b0, "cadd">;
1220 defm SQCADD_ZZI : sve2_int_cadd<0b1, "sqcadd">;
1222 // SVE2 integer absolute difference and accumulate
1223 defm SABA_ZZZ : sve2_int_absdiff_accum<0b0, "saba">;
1224 defm UABA_ZZZ : sve2_int_absdiff_accum<0b1, "uaba">;
1226 // SVE2 integer absolute difference and accumulate long
1227 defm SABALB_ZZZ : sve2_int_absdiff_accum_long<0b00, "sabalb">;
1228 defm SABALT_ZZZ : sve2_int_absdiff_accum_long<0b01, "sabalt">;
1229 defm UABALB_ZZZ : sve2_int_absdiff_accum_long<0b10, "uabalb">;
1230 defm UABALT_ZZZ : sve2_int_absdiff_accum_long<0b11, "uabalt">;
1232 // SVE2 integer add/subtract long with carry
1233 defm ADCLB_ZZZ : sve2_int_addsub_long_carry<0b00, "adclb">;
1234 defm ADCLT_ZZZ : sve2_int_addsub_long_carry<0b01, "adclt">;
1235 defm SBCLB_ZZZ : sve2_int_addsub_long_carry<0b10, "sbclb">;
1236 defm SBCLT_ZZZ : sve2_int_addsub_long_carry<0b11, "sbclt">;
1238 // SVE2 bitwise shift right narrow (bottom)
1239 defm SQSHRUNB_ZZI : sve2_int_bin_shift_imm_right_narrow_bottom<0b000, "sqshrunb">;
1240 defm SQRSHRUNB_ZZI : sve2_int_bin_shift_imm_right_narrow_bottom<0b001, "sqrshrunb">;
1241 defm SHRNB_ZZI : sve2_int_bin_shift_imm_right_narrow_bottom<0b010, "shrnb">;
1242 defm RSHRNB_ZZI : sve2_int_bin_shift_imm_right_narrow_bottom<0b011, "rshrnb">;
1243 defm SQSHRNB_ZZI : sve2_int_bin_shift_imm_right_narrow_bottom<0b100, "sqshrnb">;
1244 defm SQRSHRNB_ZZI : sve2_int_bin_shift_imm_right_narrow_bottom<0b101, "sqrshrnb">;
1245 defm UQSHRNB_ZZI : sve2_int_bin_shift_imm_right_narrow_bottom<0b110, "uqshrnb">;
1246 defm UQRSHRNB_ZZI : sve2_int_bin_shift_imm_right_narrow_bottom<0b111, "uqrshrnb">;
1248 // SVE2 bitwise shift right narrow (top)
1249 defm SQSHRUNT_ZZI : sve2_int_bin_shift_imm_right_narrow_top<0b000, "sqshrunt">;
1250 defm SQRSHRUNT_ZZI : sve2_int_bin_shift_imm_right_narrow_top<0b001, "sqrshrunt">;
1251 defm SHRNT_ZZI : sve2_int_bin_shift_imm_right_narrow_top<0b010, "shrnt">;
1252 defm RSHRNT_ZZI : sve2_int_bin_shift_imm_right_narrow_top<0b011, "rshrnt">;
1253 defm SQSHRNT_ZZI : sve2_int_bin_shift_imm_right_narrow_top<0b100, "sqshrnt">;
1254 defm SQRSHRNT_ZZI : sve2_int_bin_shift_imm_right_narrow_top<0b101, "sqrshrnt">;
1255 defm UQSHRNT_ZZI : sve2_int_bin_shift_imm_right_narrow_top<0b110, "uqshrnt">;
1256 defm UQRSHRNT_ZZI : sve2_int_bin_shift_imm_right_narrow_top<0b111, "uqrshrnt">;
1258 // SVE2 integer add/subtract narrow high part (bottom)
1259 defm ADDHNB_ZZZ : sve2_int_addsub_narrow_high_bottom<0b00, "addhnb">;
1260 defm RADDHNB_ZZZ : sve2_int_addsub_narrow_high_bottom<0b01, "raddhnb">;
1261 defm SUBHNB_ZZZ : sve2_int_addsub_narrow_high_bottom<0b10, "subhnb">;
1262 defm RSUBHNB_ZZZ : sve2_int_addsub_narrow_high_bottom<0b11, "rsubhnb">;
1264 // SVE2 integer add/subtract narrow high part (top)
1265 defm ADDHNT_ZZZ : sve2_int_addsub_narrow_high_top<0b00, "addhnt">;
1266 defm RADDHNT_ZZZ : sve2_int_addsub_narrow_high_top<0b01, "raddhnt">;
1267 defm SUBHNT_ZZZ : sve2_int_addsub_narrow_high_top<0b10, "subhnt">;
1268 defm RSUBHNT_ZZZ : sve2_int_addsub_narrow_high_top<0b11, "rsubhnt">;
1270 // SVE2 saturating extract narrow (bottom)
1271 defm SQXTNB_ZZ : sve2_int_sat_extract_narrow_bottom<0b00, "sqxtnb">;
1272 defm UQXTNB_ZZ : sve2_int_sat_extract_narrow_bottom<0b01, "uqxtnb">;
1273 defm SQXTUNB_ZZ : sve2_int_sat_extract_narrow_bottom<0b10, "sqxtunb">;
1275 // SVE2 saturating extract narrow (top)
1276 defm SQXTNT_ZZ : sve2_int_sat_extract_narrow_top<0b00, "sqxtnt">;
1277 defm UQXTNT_ZZ : sve2_int_sat_extract_narrow_top<0b01, "uqxtnt">;
1278 defm SQXTUNT_ZZ : sve2_int_sat_extract_narrow_top<0b10, "sqxtunt">;
1280 // SVE2 character match
1281 defm MATCH_PPzZZ : sve2_char_match<0b0, "match">;
1282 defm NMATCH_PPzZZ : sve2_char_match<0b1, "nmatch">;
1284 // SVE2 bitwise exclusive-or interleaved
1285 defm EORBT_ZZZ : sve2_bitwise_xor_interleaved<0b0, "eorbt">;
1286 defm EORTB_ZZZ : sve2_bitwise_xor_interleaved<0b1, "eortb">;
1288 // SVE2 bitwise shift left long
1289 defm SSHLLB_ZZI : sve2_bitwise_shift_left_long<0b00, "sshllb">;
1290 defm SSHLLT_ZZI : sve2_bitwise_shift_left_long<0b01, "sshllt">;
1291 defm USHLLB_ZZI : sve2_bitwise_shift_left_long<0b10, "ushllb">;
1292 defm USHLLT_ZZI : sve2_bitwise_shift_left_long<0b11, "ushllt">;
1294 // SVE2 integer add/subtract interleaved long
1295 defm SADDLBT_ZZZ : sve2_misc_int_addsub_long_interleaved<0b00, "saddlbt">;
1296 defm SSUBLBT_ZZZ : sve2_misc_int_addsub_long_interleaved<0b10, "ssublbt">;
1297 defm SSUBLTB_ZZZ : sve2_misc_int_addsub_long_interleaved<0b11, "ssubltb">;
1299 // SVE2 histogram generation (segment)
1300 def HISTSEG_ZZZ : sve2_hist_gen_segment<"histseg">;
1302 // SVE2 histogram generation (vector)
1303 defm HISTCNT_ZPzZZ : sve2_hist_gen_vector<"histcnt">;
1305 // SVE2 floating-point base 2 logarithm as integer
1306 defm FLOGB_ZPmZ : sve2_fp_flogb<"flogb">;
1308 // SVE2 floating-point convert precision
1309 defm FCVTXNT_ZPmZ : sve2_fp_convert_down_odd_rounding<"fcvtxnt">;
1310 defm FCVTNT_ZPmZ : sve2_fp_convert_down_narrow<"fcvtnt">;
1311 defm FCVTLT_ZPmZ : sve2_fp_convert_up_long<"fcvtlt">;
1312 def FCVTX_ZPmZ_DtoS : sve_fp_2op_p_zd<0b0001010, "fcvtx", ZPR64, ZPR32, ElementSizeD>;
1314 // SVE2 floating-point pairwise operations
1315 defm FADDP_ZPmZZ : sve2_fp_pairwise_pred<0b000, "faddp">;
1316 defm FMAXNMP_ZPmZZ : sve2_fp_pairwise_pred<0b100, "fmaxnmp">;
1317 defm FMINNMP_ZPmZZ : sve2_fp_pairwise_pred<0b101, "fminnmp">;
1318 defm FMAXP_ZPmZZ : sve2_fp_pairwise_pred<0b110, "fmaxp">;
1319 defm FMINP_ZPmZZ : sve2_fp_pairwise_pred<0b111, "fminp">;
1321 // SVE2 floating-point multiply-add long (indexed)
1322 def FMLALB_ZZZI_SHH : sve2_fp_mla_long_by_indexed_elem<0b00, "fmlalb">;
1323 def FMLALT_ZZZI_SHH : sve2_fp_mla_long_by_indexed_elem<0b01, "fmlalt">;
1324 def FMLSLB_ZZZI_SHH : sve2_fp_mla_long_by_indexed_elem<0b10, "fmlslb">;
1325 def FMLSLT_ZZZI_SHH : sve2_fp_mla_long_by_indexed_elem<0b11, "fmlslt">;
1327 // SVE2 floating-point multiply-add long
1328 def FMLALB_ZZZ_SHH : sve2_fp_mla_long<0b00, "fmlalb">;
1329 def FMLALT_ZZZ_SHH : sve2_fp_mla_long<0b01, "fmlalt">;
1330 def FMLSLB_ZZZ_SHH : sve2_fp_mla_long<0b10, "fmlslb">;
1331 def FMLSLT_ZZZ_SHH : sve2_fp_mla_long<0b11, "fmlslt">;
1333 // SVE2 bitwise ternary operations
1334 defm EOR3_ZZZZ_D : sve2_int_bitwise_ternary_op<0b000, "eor3">;
1335 defm BCAX_ZZZZ_D : sve2_int_bitwise_ternary_op<0b010, "bcax">;
1336 def BSL_ZZZZ_D : sve2_int_bitwise_ternary_op_d<0b001, "bsl">;
1337 def BSL1N_ZZZZ_D : sve2_int_bitwise_ternary_op_d<0b011, "bsl1n">;
1338 def BSL2N_ZZZZ_D : sve2_int_bitwise_ternary_op_d<0b101, "bsl2n">;
1339 def NBSL_ZZZZ_D : sve2_int_bitwise_ternary_op_d<0b111, "nbsl">;
1341 // SVE2 bitwise xor and rotate right by immediate
1342 defm XAR_ZZZI : sve2_int_rotate_right_imm<"xar">;
1344 // SVE2 extract vector (immediate offset, constructive)
1345 def EXT_ZZI_B : sve2_int_perm_extract_i_cons<"ext">;
1347 // SVE2 non-temporal gather loads
1348 defm LDNT1SB_ZZR_S : sve2_mem_gldnt_vs<0b00000, "ldnt1sb", Z_s, ZPR32>;
1349 defm LDNT1B_ZZR_S : sve2_mem_gldnt_vs<0b00001, "ldnt1b", Z_s, ZPR32>;
1350 defm LDNT1SH_ZZR_S : sve2_mem_gldnt_vs<0b00100, "ldnt1sh", Z_s, ZPR32>;
1351 defm LDNT1H_ZZR_S : sve2_mem_gldnt_vs<0b00101, "ldnt1h", Z_s, ZPR32>;
1352 defm LDNT1W_ZZR_S : sve2_mem_gldnt_vs<0b01001, "ldnt1w", Z_s, ZPR32>;
1354 defm LDNT1SB_ZZR_D : sve2_mem_gldnt_vs<0b10000, "ldnt1sb", Z_d, ZPR64>;
1355 defm LDNT1B_ZZR_D : sve2_mem_gldnt_vs<0b10010, "ldnt1b", Z_d, ZPR64>;
1356 defm LDNT1SH_ZZR_D : sve2_mem_gldnt_vs<0b10100, "ldnt1sh", Z_d, ZPR64>;
1357 defm LDNT1H_ZZR_D : sve2_mem_gldnt_vs<0b10110, "ldnt1h", Z_d, ZPR64>;
1358 defm LDNT1SW_ZZR_D : sve2_mem_gldnt_vs<0b11000, "ldnt1sw", Z_d, ZPR64>;
1359 defm LDNT1W_ZZR_D : sve2_mem_gldnt_vs<0b11010, "ldnt1w", Z_d, ZPR64>;
1360 defm LDNT1D_ZZR_D : sve2_mem_gldnt_vs<0b11110, "ldnt1d", Z_d, ZPR64>;
1362 // SVE2 vector splice (constructive)
1363 defm SPLICE_ZPZZ : sve2_int_perm_splice_cons<"splice">;
1365 // SVE2 non-temporal scatter stores
1366 defm STNT1B_ZZR_S : sve2_mem_sstnt_vs<0b001, "stnt1b", Z_s, ZPR32>;
1367 defm STNT1H_ZZR_S : sve2_mem_sstnt_vs<0b011, "stnt1h", Z_s, ZPR32>;
1368 defm STNT1W_ZZR_S : sve2_mem_sstnt_vs<0b101, "stnt1w", Z_s, ZPR32>;
1370 defm STNT1B_ZZR_D : sve2_mem_sstnt_vs<0b000, "stnt1b", Z_d, ZPR64>;
1371 defm STNT1H_ZZR_D : sve2_mem_sstnt_vs<0b010, "stnt1h", Z_d, ZPR64>;
1372 defm STNT1W_ZZR_D : sve2_mem_sstnt_vs<0b100, "stnt1w", Z_d, ZPR64>;
1373 defm STNT1D_ZZR_D : sve2_mem_sstnt_vs<0b110, "stnt1d", Z_d, ZPR64>;
1375 // SVE2 table lookup (three sources)
1376 defm TBL_ZZZZ : sve2_int_perm_tbl<"tbl">;
1377 defm TBX_ZZZ : sve2_int_perm_tbx<"tbx">;
1379 // SVE2 integer compare scalar count and limit
1380 defm WHILEGE_PWW : sve_int_while4_rr<0b000, "whilege">;
1381 defm WHILEGT_PWW : sve_int_while4_rr<0b001, "whilegt">;
1382 defm WHILEHS_PWW : sve_int_while4_rr<0b100, "whilehs">;
1383 defm WHILEHI_PWW : sve_int_while4_rr<0b101, "whilehi">;
1385 defm WHILEGE_PXX : sve_int_while8_rr<0b000, "whilege">;
1386 defm WHILEGT_PXX : sve_int_while8_rr<0b001, "whilegt">;
1387 defm WHILEHS_PXX : sve_int_while8_rr<0b100, "whilehs">;
1388 defm WHILEHI_PXX : sve_int_while8_rr<0b101, "whilehi">;
1390 // SVE2 pointer conflict compare
1391 defm WHILEWR_PXX : sve2_int_while_rr<0b0, "whilewr">;
1392 defm WHILERW_PXX : sve2_int_while_rr<0b1, "whilerw">;
1395 let Predicates = [HasSVE2AES] in {
1396 // SVE2 crypto destructive binary operations
1397 def AESE_ZZZ_B : sve2_crypto_des_bin_op<0b00, "aese", ZPR8>;
1398 def AESD_ZZZ_B : sve2_crypto_des_bin_op<0b01, "aesd", ZPR8>;
1400 // SVE2 crypto unary operations
1401 def AESMC_ZZ_B : sve2_crypto_unary_op<0b0, "aesmc">;
1402 def AESIMC_ZZ_B : sve2_crypto_unary_op<0b1, "aesimc">;
1404 // PMULLB and PMULLT instructions which operate with 64-bit source and
1405 // 128-bit destination elements are enabled with crypto extensions, similar
1406 // to NEON PMULL2 instruction.
1407 def PMULLB_ZZZ_Q : sve2_wide_int_arith<0b00, 0b11010, "pmullb",
1408 ZPR128, ZPR64, ZPR64>;
1409 def PMULLT_ZZZ_Q : sve2_wide_int_arith<0b00, 0b11011, "pmullt",
1410 ZPR128, ZPR64, ZPR64>;
1413 let Predicates = [HasSVE2SM4] in {
1414 // SVE2 crypto constructive binary operations
1415 def SM4EKEY_ZZZ_S : sve2_crypto_cons_bin_op<0b0, "sm4ekey", ZPR32>;
1416 // SVE2 crypto destructive binary operations
1417 def SM4E_ZZZ_S : sve2_crypto_des_bin_op<0b10, "sm4e", ZPR32>;
1420 let Predicates = [HasSVE2SHA3] in {
1421 // SVE2 crypto constructive binary operations
1422 def RAX1_ZZZ_D : sve2_crypto_cons_bin_op<0b1, "rax1", ZPR64>;
1425 let Predicates = [HasSVE2BitPerm] in {
1426 // SVE2 bitwise permute
1427 defm BEXT_ZZZ : sve2_misc_bitwise<0b1100, "bext">;
1428 defm BDEP_ZZZ : sve2_misc_bitwise<0b1101, "bdep">;
1429 defm BGRP_ZZZ : sve2_misc_bitwise<0b1110, "bgrp">;
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