1 //==-- AArch64TargetMachine.h - Define TargetMachine for AArch64 -*- C++ -*-==//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file declares the AArch64 specific subclass of TargetMachine.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64TARGETMACHINE_H
14 #define LLVM_LIB_TARGET_AARCH64_AARCH64TARGETMACHINE_H
16 #include "AArch64InstrInfo.h"
17 #include "AArch64Subtarget.h"
18 #include "llvm/IR/DataLayout.h"
19 #include "llvm/Target/TargetMachine.h"
23 class AArch64RegisterBankInfo;
25 class AArch64TargetMachine : public LLVMTargetMachine {
27 std::unique_ptr<TargetLoweringObjectFile> TLOF;
28 mutable StringMap<std::unique_ptr<AArch64Subtarget>> SubtargetMap;
31 AArch64TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
32 StringRef FS, const TargetOptions &Options,
33 Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
34 CodeGenOpt::Level OL, bool JIT, bool IsLittleEndian);
36 ~AArch64TargetMachine() override;
37 const AArch64Subtarget *getSubtargetImpl(const Function &F) const override;
38 // DO NOT IMPLEMENT: There is no such thing as a valid default subtarget,
39 // subtargets are per-function entities based on the target-specific
40 // attributes of each function.
41 const AArch64Subtarget *getSubtargetImpl() const = delete;
43 // Pass Pipeline Configuration
44 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
46 TargetTransformInfo getTargetTransformInfo(const Function &F) override;
48 TargetLoweringObjectFile* getObjFileLowering() const override {
52 yaml::MachineFunctionInfo *createDefaultFuncInfoYAML() const override;
53 yaml::MachineFunctionInfo *
54 convertFuncInfoToYAML(const MachineFunction &MF) const override;
55 bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &,
56 PerFunctionMIParsingState &PFS,
58 SMRange &SourceRange) const override;
64 // AArch64 little endian target machine.
66 class AArch64leTargetMachine : public AArch64TargetMachine {
67 virtual void anchor();
69 AArch64leTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
70 StringRef FS, const TargetOptions &Options,
71 Optional<Reloc::Model> RM,
72 Optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
76 // AArch64 big endian target machine.
78 class AArch64beTargetMachine : public AArch64TargetMachine {
79 virtual void anchor();
81 AArch64beTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
82 StringRef FS, const TargetOptions &Options,
83 Optional<Reloc::Model> RM,
84 Optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
88 } // end namespace llvm