1 //===-- AMDGPUGIsel.td - AMDGPU GlobalISel Patterns---------*- tablegen -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
8 // This files contains patterns that should only be used by GlobalISel. For
9 // example patterns for V_* instructions that have S_* equivalents.
10 // SelectionDAG does not support selecting V_* instructions.
11 //===----------------------------------------------------------------------===//
15 def sd_vsrc0 : ComplexPattern<i32, 1, "">;
17 GIComplexOperandMatcher<s32, "selectVSRC0">,
18 GIComplexPatternEquiv<sd_vsrc0>;
20 def sd_vcsrc : ComplexPattern<i32, 1, "">;
22 GIComplexOperandMatcher<s32, "selectVCSRC">,
23 GIComplexPatternEquiv<sd_vcsrc>;
26 GIComplexOperandMatcher<s32, "selectVOP3Mods0">,
27 GIComplexPatternEquiv<VOP3Mods0>;
30 GIComplexOperandMatcher<s32, "selectVOP3Mods">,
31 GIComplexPatternEquiv<VOP3Mods>;
33 def gi_vop3mods_nnan :
34 GIComplexOperandMatcher<s32, "selectVOP3Mods_nnan">,
35 GIComplexPatternEquiv<VOP3Mods_nnan>;
38 GIComplexOperandMatcher<s32, "selectVOP3OMods">,
39 GIComplexPatternEquiv<VOP3OMods>;
41 def gi_vop3opselmods0 :
42 GIComplexOperandMatcher<s32, "selectVOP3OpSelMods0">,
43 GIComplexPatternEquiv<VOP3OpSelMods0>;
45 def gi_vop3opselmods :
46 GIComplexOperandMatcher<s32, "selectVOP3OpSelMods">,
47 GIComplexPatternEquiv<VOP3OpSelMods>;
50 GIComplexOperandMatcher<s64, "selectSmrdImm">,
51 GIComplexPatternEquiv<SMRDImm>;
54 GIComplexOperandMatcher<s64, "selectSmrdImm32">,
55 GIComplexPatternEquiv<SMRDImm32>;
58 GIComplexOperandMatcher<s64, "selectSmrdSgpr">,
59 GIComplexPatternEquiv<SMRDSgpr>;
61 // FIXME: Why are the atomic versions separated?
63 GIComplexOperandMatcher<s64, "selectFlatOffset">,
64 GIComplexPatternEquiv<FLATOffset>;
65 def gi_flat_offset_signed :
66 GIComplexOperandMatcher<s64, "selectFlatOffsetSigned">,
67 GIComplexPatternEquiv<FLATOffsetSigned>;
69 GIComplexOperandMatcher<s64, "selectFlatOffset">,
70 GIComplexPatternEquiv<FLATAtomic>;
71 def gi_flat_signed_atomic :
72 GIComplexOperandMatcher<s64, "selectFlatOffsetSigned">,
73 GIComplexPatternEquiv<FLATSignedAtomic>;
75 def gi_mubuf_scratch_offset :
76 GIComplexOperandMatcher<s32, "selectMUBUFScratchOffset">,
77 GIComplexPatternEquiv<MUBUFScratchOffset>;
78 def gi_mubuf_scratch_offen :
79 GIComplexOperandMatcher<s32, "selectMUBUFScratchOffen">,
80 GIComplexPatternEquiv<MUBUFScratchOffen>;
82 def gi_ds_1addr_1offset :
83 GIComplexOperandMatcher<s32, "selectDS1Addr1Offset">,
84 GIComplexPatternEquiv<DS1Addr1Offset>;
87 // Separate load nodes are defined to glue m0 initialization in
88 // SelectionDAG. The GISel selector can just insert m0 initialization
89 // directly before before selecting a glue-less load, so hide this
92 def : GINodeEquiv<G_LOAD, AMDGPUld_glue> {
93 let CheckMMOIsNonAtomic = 1;
96 def : GINodeEquiv<G_STORE, AMDGPUst_glue> {
97 let CheckMMOIsNonAtomic = 1;
100 def : GINodeEquiv<G_LOAD, AMDGPUatomic_ld_glue> {
101 bit CheckMMOIsAtomic = 1;
106 def : GINodeEquiv<G_ATOMIC_CMPXCHG, atomic_cmp_swap_glue>;
107 def : GINodeEquiv<G_ATOMICRMW_XCHG, atomic_swap_glue>;
108 def : GINodeEquiv<G_ATOMICRMW_ADD, atomic_load_add_glue>;
109 def : GINodeEquiv<G_ATOMICRMW_SUB, atomic_load_sub_glue>;
110 def : GINodeEquiv<G_ATOMICRMW_AND, atomic_load_and_glue>;
111 def : GINodeEquiv<G_ATOMICRMW_OR, atomic_load_or_glue>;
112 def : GINodeEquiv<G_ATOMICRMW_XOR, atomic_load_xor_glue>;
113 def : GINodeEquiv<G_ATOMICRMW_MIN, atomic_load_min_glue>;
114 def : GINodeEquiv<G_ATOMICRMW_MAX, atomic_load_max_glue>;
115 def : GINodeEquiv<G_ATOMICRMW_UMIN, atomic_load_umin_glue>;
116 def : GINodeEquiv<G_ATOMICRMW_UMAX, atomic_load_umax_glue>;
117 def : GINodeEquiv<G_ATOMICRMW_FADD, atomic_load_fadd_glue>;
119 def : GINodeEquiv<G_AMDGPU_FFBH_U32, AMDGPUffbh_u32>;
120 def : GINodeEquiv<G_AMDGPU_ATOMIC_CMPXCHG, AMDGPUatomic_cmp_swap>;
124 SDPatternOperator node,
127 ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt> : GCNPat <
129 (dst_vt (node (src0_vt SReg_32:$src0), (src1_vt SReg_32:$src1))),
130 (inst src0_vt:$src0, src1_vt:$src1)
134 SDPatternOperator node,
137 ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt> : GCNPat <
139 (dst_vt (node (src0_vt (sd_vsrc0 src0_vt:$src0)), (src1_vt VGPR_32:$src1))),
140 (inst src0_vt:$src0, src1_vt:$src1)
143 class GISelVop2CommutePat <
144 SDPatternOperator node,
147 ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt> : GCNPat <
149 (dst_vt (node (src1_vt VGPR_32:$src1), (src0_vt (sd_vsrc0 src0_vt:$src0)))),
150 (inst src0_vt:$src0, src1_vt:$src1)
153 class GISelVop3Pat2 <
154 SDPatternOperator node,
157 ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt> : GCNPat <
159 (dst_vt (node (src0_vt (sd_vcsrc src0_vt:$src0)), (src1_vt (sd_vcsrc src1_vt:$src1)))),
160 (inst src0_vt:$src0, src1_vt:$src1)
163 class GISelVop3Pat2CommutePat <
164 SDPatternOperator node,
167 ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt> : GCNPat <
169 (dst_vt (node (src0_vt (sd_vcsrc src0_vt:$src0)), (src1_vt (sd_vcsrc src1_vt:$src1)))),
170 (inst src0_vt:$src1, src1_vt:$src0)
173 class GISelVop3Pat2ModsPat <
174 SDPatternOperator node,
177 ValueType src0_vt = dst_vt, ValueType src1_vt = src0_vt> : GCNPat <
179 (dst_vt (node (src0_vt (VOP3Mods0 src0_vt:$src0, i32:$src0_modifiers, i1:$clamp, i32:$omods)),
180 (src1_vt (VOP3Mods src1_vt:$src1, i32:$src1_modifiers)))),
181 (inst i32:$src0_modifiers, src0_vt:$src0,
182 i32:$src1_modifiers, src1_vt:$src1, $clamp, $omods)
185 multiclass GISelVop2IntrPat <
186 SDPatternOperator node, Instruction inst,
187 ValueType dst_vt, ValueType src_vt = dst_vt> {
189 def : GISelVop2Pat <node, inst, dst_vt, src_vt>;
191 // FIXME: Intrinsics aren't marked as commutable, so we need to add an explcit
192 // pattern to handle commuting. This is another reason why legalizing to a
193 // generic machine instruction may be better that matching the intrinsic
195 def : GISelVop2CommutePat <node, inst, dst_vt, src_vt>;
198 def : GISelSop2Pat <or, S_OR_B32, i32>;
199 def : GISelVop2Pat <or, V_OR_B32_e32, i32>;
201 // Since GlobalISel is more flexible then SelectionDAG, I think we can get
202 // away with adding patterns for integer types and not legalizing all
203 // loads and stores to vector types. This should help simplify the load/store
205 foreach Ty = [i64, p0, p1, p4] in {
206 defm : SMRD_Pattern <"S_LOAD_DWORDX2", Ty>;
209 def gi_as_i32timm : GICustomOperandRenderer<"renderTruncImm32">,
210 GISDNodeXFormEquiv<as_i32timm>;
212 def gi_as_i16timm : GICustomOperandRenderer<"renderTruncTImm">,
213 GISDNodeXFormEquiv<as_i16timm>;
215 def gi_NegateImm : GICustomOperandRenderer<"renderNegateImm">,
216 GISDNodeXFormEquiv<NegateImm>;
218 def gi_bitcast_fpimm_to_i32 : GICustomOperandRenderer<"renderBitcastImm">,
219 GISDNodeXFormEquiv<bitcast_fpimm_to_i32>;
221 def gi_IMMPopCount : GICustomOperandRenderer<"renderPopcntImm">,
222 GISDNodeXFormEquiv<IMMPopCount>;