1 //===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 /// The AMDGPU TargetMachine interface definition for hw codegen targets.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
15 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
17 #include "GCNSubtarget.h"
18 #include "llvm/CodeGen/TargetPassConfig.h"
19 #include "llvm/Target/TargetMachine.h"
25 //===----------------------------------------------------------------------===//
26 // AMDGPU Target Machine (R600+)
27 //===----------------------------------------------------------------------===//
29 class AMDGPUTargetMachine : public LLVMTargetMachine {
31 std::unique_ptr<TargetLoweringObjectFile> TLOF;
33 StringRef getGPUName(const Function &F) const;
34 StringRef getFeatureString(const Function &F) const;
37 static bool EnableLateStructurizeCFG;
38 static bool EnableFunctionCalls;
39 static bool EnableLowerModuleLDS;
41 AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
42 StringRef FS, TargetOptions Options,
43 std::optional<Reloc::Model> RM,
44 std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL);
45 ~AMDGPUTargetMachine() override;
47 const TargetSubtargetInfo *getSubtargetImpl() const;
48 const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override = 0;
50 TargetLoweringObjectFile *getObjFileLowering() const override {
54 void registerPassBuilderCallbacks(PassBuilder &PB) override;
55 void registerDefaultAliasAnalyses(AAManager &) override;
57 /// Get the integer value of a null pointer in the given address space.
58 static int64_t getNullPointerValue(unsigned AddrSpace);
60 bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override;
62 unsigned getAssumedAddrSpace(const Value *V) const override;
64 std::pair<const Value *, unsigned>
65 getPredicatedAddrSpace(const Value *V) const override;
67 unsigned getAddressSpaceForPseudoSourceKind(unsigned Kind) const override;
70 //===----------------------------------------------------------------------===//
71 // GCN Target Machine (SI+)
72 //===----------------------------------------------------------------------===//
74 class GCNTargetMachine final : public AMDGPUTargetMachine {
76 mutable StringMap<std::unique_ptr<GCNSubtarget>> SubtargetMap;
79 GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
80 StringRef FS, TargetOptions Options,
81 std::optional<Reloc::Model> RM,
82 std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
85 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
87 const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override;
89 TargetTransformInfo getTargetTransformInfo(const Function &F) const override;
91 bool useIPRA() const override {
96 createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F,
97 const TargetSubtargetInfo *STI) const override;
99 yaml::MachineFunctionInfo *createDefaultFuncInfoYAML() const override;
100 yaml::MachineFunctionInfo *
101 convertFuncInfoToYAML(const MachineFunction &MF) const override;
102 bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &,
103 PerFunctionMIParsingState &PFS,
105 SMRange &SourceRange) const override;
108 //===----------------------------------------------------------------------===//
110 //===----------------------------------------------------------------------===//
112 class AMDGPUPassConfig : public TargetPassConfig {
114 AMDGPUPassConfig(LLVMTargetMachine &TM, PassManagerBase &PM);
116 AMDGPUTargetMachine &getAMDGPUTargetMachine() const {
117 return getTM<AMDGPUTargetMachine>();
121 createMachineScheduler(MachineSchedContext *C) const override;
123 void addEarlyCSEOrGVNPass();
124 void addStraightLineScalarOptimizationPasses();
125 void addIRPasses() override;
126 void addCodeGenPrepare() override;
127 bool addPreISel() override;
128 bool addInstSelector() override;
129 bool addGCPasses() override;
131 std::unique_ptr<CSEConfigBase> getCSEConfig() const override;
133 /// Check if a pass is enabled given \p Opt option. The option always
134 /// overrides defaults if explicitly used. Otherwise its default will
135 /// be used given that a pass shall work at an optimization \p Level
137 bool isPassEnabled(const cl::opt<bool> &Opt,
138 CodeGenOpt::Level Level = CodeGenOpt::Default) const {
139 if (Opt.getNumOccurrences())
141 if (TM->getOptLevel() < Level)
147 } // end namespace llvm
149 #endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H