1 //===- GCNIterativeScheduler.h - GCN Scheduler ------------------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 #ifndef LLVM_LIB_TARGET_AMDGPU_GCNITERATIVESCHEDULER_H
10 #define LLVM_LIB_TARGET_AMDGPU_GCNITERATIVESCHEDULER_H
12 #include "GCNRegPressure.h"
13 #include "llvm/ADT/ArrayRef.h"
14 #include "llvm/CodeGen/MachineBasicBlock.h"
15 #include "llvm/CodeGen/MachineScheduler.h"
16 #include "llvm/Support/Allocator.h"
27 class GCNIterativeScheduler : public ScheduleDAGMILive {
28 using BaseClass = ScheduleDAGMILive;
33 SCHEDULE_MINREGFORCED,
34 SCHEDULE_LEGACYMAXOCCUPANCY,
38 GCNIterativeScheduler(MachineSchedContext *C,
41 void schedule() override;
43 void enterRegion(MachineBasicBlock *BB,
44 MachineBasicBlock::iterator Begin,
45 MachineBasicBlock::iterator End,
46 unsigned RegionInstrs) override;
48 void finalizeSchedule() override;
51 using ScheduleRef = ArrayRef<const SUnit *>;
53 struct TentativeSchedule {
54 std::vector<MachineInstr *> Schedule;
55 GCNRegPressure MaxPressure;
59 // Fields except for BestSchedule are supposed to reflect current IR state
60 // `const` fields are to emphasize they shouldn't change for any schedule.
61 MachineBasicBlock::iterator Begin;
62 // End is either a boundary instruction or end of basic block
63 const MachineBasicBlock::iterator End;
64 const unsigned NumRegionInstrs;
65 GCNRegPressure MaxPressure;
67 // best schedule for the region so far (not scheduled yet)
68 std::unique_ptr<TentativeSchedule> BestSchedule;
71 SpecificBumpPtrAllocator<Region> Alloc;
72 std::vector<Region*> Regions;
74 MachineSchedContext *Context;
75 const StrategyKind Strategy;
76 mutable GCNUpwardRPTracker UPTracker;
79 class OverrideLegacyStrategy;
81 template <typename Range>
82 GCNRegPressure getSchedulePressure(const Region &R,
83 Range &&Schedule) const;
85 GCNRegPressure getRegionPressure(MachineBasicBlock::iterator Begin,
86 MachineBasicBlock::iterator End) const;
88 GCNRegPressure getRegionPressure(const Region &R) const {
89 return getRegionPressure(R.Begin, R.End);
92 void setBestSchedule(Region &R,
94 const GCNRegPressure &MaxRP = GCNRegPressure());
96 void scheduleBest(Region &R);
98 std::vector<MachineInstr*> detachSchedule(ScheduleRef Schedule) const;
100 void sortRegionsByPressure(unsigned TargetOcc);
102 template <typename Range>
103 void scheduleRegion(Region &R, Range &&Schedule,
104 const GCNRegPressure &MaxRP = GCNRegPressure());
106 unsigned tryMaximizeOccupancy(unsigned TargetOcc =
107 std::numeric_limits<unsigned>::max());
109 void scheduleLegacyMaxOccupancy(bool TryMaximizeOccupancy = true);
110 void scheduleMinReg(bool force = false);
111 void scheduleILP(bool TryMaximizeOccupancy = true);
113 void printRegions(raw_ostream &OS) const;
114 void printSchedResult(raw_ostream &OS,
116 const GCNRegPressure &RP) const;
117 void printSchedRP(raw_ostream &OS,
118 const GCNRegPressure &Before,
119 const GCNRegPressure &After) const;
122 } // end namespace llvm
124 #endif // LLVM_LIB_TARGET_AMDGPU_GCNITERATIVESCHEDULER_H