1 //===-- R600MachineScheduler.h - R600 Scheduler Interface -*- C++ -*-------===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 /// R600 Machine Scheduler interface
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_AMDGPU_R600MACHINESCHEDULER_H
15 #define LLVM_LIB_TARGET_AMDGPU_R600MACHINESCHEDULER_H
17 #include "llvm/CodeGen/MachineScheduler.h"
25 struct R600RegisterInfo;
27 class R600SchedStrategy final : public MachineSchedStrategy {
28 const ScheduleDAGMILive *DAG = nullptr;
29 const R600InstrInfo *TII = nullptr;
30 const R600RegisterInfo *TRI = nullptr;
31 MachineRegisterInfo *MRI = nullptr;
49 AluDiscarded, // LLVM Instructions that are going to be eliminated
53 std::vector<SUnit *> Available[IDLast], Pending[IDLast];
54 std::vector<SUnit *> AvailableAlus[AluLast];
55 std::vector<SUnit *> PhysicalRegCopy;
59 InstKind NextInstKind;
61 unsigned AluInstCount;
62 unsigned FetchInstCount;
64 int InstKindLimit[IDLast];
69 R600SchedStrategy() = default;
70 ~R600SchedStrategy() override = default;
72 void initialize(ScheduleDAGMI *dag) override;
73 SUnit *pickNode(bool &IsTopNode) override;
74 void schedNode(SUnit *SU, bool IsTopNode) override;
75 void releaseTopNode(SUnit *SU) override;
76 void releaseBottomNode(SUnit *SU) override;
79 std::vector<MachineInstr *> InstructionsGroupCandidate;
82 int getInstKind(SUnit *SU);
83 bool regBelongsToClass(unsigned Reg, const TargetRegisterClass *RC) const;
84 AluKind getAluKind(SUnit *SU) const;
86 unsigned AvailablesAluCount() const;
87 SUnit *AttemptFillSlot (unsigned Slot, bool AnyAlu);
88 void PrepareNextSlot();
89 SUnit *PopInst(std::vector<SUnit*> &Q, bool AnyALU);
91 void AssignSlot(MachineInstr *MI, unsigned Slot);
93 SUnit* pickOther(int QID);
94 void MoveUnits(std::vector<SUnit *> &QSrc, std::vector<SUnit *> &QDst);
97 } // end namespace llvm
99 #endif // LLVM_LIB_TARGET_AMDGPU_R600MACHINESCHEDULER_H