1 //===--------------------- SIFrameLowering.h --------------------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 #ifndef LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
10 #define LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
12 #include "AMDGPUFrameLowering.h"
17 class SIMachineFunctionInfo;
21 class SIFrameLowering final : public AMDGPUFrameLowering {
23 SIFrameLowering(StackDirection D, Align StackAl, int LAO,
24 Align TransAl = Align(1))
25 : AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
26 ~SIFrameLowering() override = default;
28 void emitEntryFunctionPrologue(MachineFunction &MF,
29 MachineBasicBlock &MBB) const;
30 void emitPrologue(MachineFunction &MF,
31 MachineBasicBlock &MBB) const override;
32 void emitEpilogue(MachineFunction &MF,
33 MachineBasicBlock &MBB) const override;
34 int getFrameIndexReference(const MachineFunction &MF, int FI,
35 Register &FrameReg) const override;
37 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
38 RegScavenger *RS = nullptr) const override;
39 void determineCalleeSavesSGPR(MachineFunction &MF, BitVector &SavedRegs,
40 RegScavenger *RS = nullptr) const;
42 assignCalleeSavedSpillSlots(MachineFunction &MF,
43 const TargetRegisterInfo *TRI,
44 std::vector<CalleeSavedInfo> &CSI) const override;
46 bool isSupportedStackID(TargetStackID::Value ID) const override;
48 void processFunctionBeforeFrameFinalized(
50 RegScavenger *RS = nullptr) const override;
52 MachineBasicBlock::iterator
53 eliminateCallFramePseudoInstr(MachineFunction &MF,
54 MachineBasicBlock &MBB,
55 MachineBasicBlock::iterator MI) const override;
58 void emitEntryFunctionFlatScratchInit(MachineFunction &MF,
59 MachineBasicBlock &MBB,
60 MachineBasicBlock::iterator I,
62 Register ScratchWaveOffsetReg) const;
64 Register getEntryFunctionReservedScratchRsrcReg(MachineFunction &MF) const;
66 void emitEntryFunctionScratchRsrcRegSetup(
67 MachineFunction &MF, MachineBasicBlock &MBB,
68 MachineBasicBlock::iterator I, const DebugLoc &DL,
69 Register PreloadedPrivateBufferReg, Register ScratchRsrcReg,
70 Register ScratchWaveOffsetReg) const;
73 bool hasFP(const MachineFunction &MF) const override;
76 } // end namespace llvm
78 #endif // LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H