1 //===-- ARMTargetMachine.h - Define TargetMachine for ARM -------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file declares the ARM specific subclass of TargetMachine.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H
14 #define LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H
16 #include "ARMSubtarget.h"
17 #include "llvm/ADT/Optional.h"
18 #include "llvm/ADT/StringMap.h"
19 #include "llvm/ADT/StringRef.h"
20 #include "llvm/Analysis/TargetTransformInfo.h"
21 #include "llvm/Support/CodeGen.h"
22 #include "llvm/Target/TargetMachine.h"
27 class ARMBaseTargetMachine : public LLVMTargetMachine {
32 ARM_ABI_AAPCS, // ARM EABI
37 std::unique_ptr<TargetLoweringObjectFile> TLOF;
39 mutable StringMap<std::unique_ptr<ARMSubtarget>> SubtargetMap;
42 ARMBaseTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
43 StringRef FS, const TargetOptions &Options,
44 Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
45 CodeGenOpt::Level OL, bool isLittle);
46 ~ARMBaseTargetMachine() override;
48 const ARMSubtarget *getSubtargetImpl(const Function &F) const override;
49 // DO NOT IMPLEMENT: There is no such thing as a valid default subtarget,
50 // subtargets are per-function entities based on the target-specific
51 // attributes of each function.
52 const ARMSubtarget *getSubtargetImpl() const = delete;
53 bool isLittleEndian() const { return isLittle; }
55 TargetTransformInfo getTargetTransformInfo(const Function &F) override;
57 // Pass Pipeline Configuration
58 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
60 TargetLoweringObjectFile *getObjFileLowering() const override {
64 bool isTargetHardFloat() const {
65 return TargetTriple.getEnvironment() == Triple::GNUEABIHF ||
66 TargetTriple.getEnvironment() == Triple::MuslEABIHF ||
67 TargetTriple.getEnvironment() == Triple::EABIHF ||
68 (TargetTriple.isOSBinFormatMachO() &&
69 TargetTriple.getSubArch() == Triple::ARMSubArch_v7em) ||
70 TargetTriple.isOSWindows() ||
71 TargetABI == ARMBaseTargetMachine::ARM_ABI_AAPCS16;
74 bool targetSchedulesPostRAScheduling() const override { return true; };
77 /// ARM/Thumb little endian target machine.
79 class ARMLETargetMachine : public ARMBaseTargetMachine {
81 ARMLETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
82 StringRef FS, const TargetOptions &Options,
83 Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
84 CodeGenOpt::Level OL, bool JIT);
87 /// ARM/Thumb big endian target machine.
89 class ARMBETargetMachine : public ARMBaseTargetMachine {
91 ARMBETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
92 StringRef FS, const TargetOptions &Options,
93 Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
94 CodeGenOpt::Level OL, bool JIT);
97 } // end namespace llvm
99 #endif // LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H