1 //===-- MVEVPTBlockPass.cpp - Insert MVE VPT blocks -----------------------===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 #include "ARMMachineFunctionInfo.h"
11 #include "ARMSubtarget.h"
12 #include "MCTargetDesc/ARMBaseInfo.h"
13 #include "Thumb2InstrInfo.h"
14 #include "llvm/ADT/SmallSet.h"
15 #include "llvm/ADT/SmallVector.h"
16 #include "llvm/ADT/Statistic.h"
17 #include "llvm/ADT/StringRef.h"
18 #include "llvm/CodeGen/MachineBasicBlock.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineFunctionPass.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineInstrBundle.h"
24 #include "llvm/CodeGen/MachineOperand.h"
25 #include "llvm/CodeGen/ReachingDefAnalysis.h"
26 #include "llvm/IR/DebugLoc.h"
27 #include "llvm/MC/MCInstrDesc.h"
28 #include "llvm/Support/Debug.h"
34 #define DEBUG_TYPE "arm-mve-vpt"
37 class MVEVPTBlock : public MachineFunctionPass {
41 MVEVPTBlock() : MachineFunctionPass(ID) {}
43 bool runOnMachineFunction(MachineFunction &Fn) override;
45 void getAnalysisUsage(AnalysisUsage &AU) const override {
47 AU.addRequired<ReachingDefAnalysis>();
48 MachineFunctionPass::getAnalysisUsage(AU);
51 MachineFunctionProperties getRequiredProperties() const override {
52 return MachineFunctionProperties().set(
53 MachineFunctionProperties::Property::NoVRegs).set(
54 MachineFunctionProperties::Property::TracksLiveness);
57 StringRef getPassName() const override {
58 return "MVE VPT block insertion pass";
62 bool InsertVPTBlocks(MachineBasicBlock &MBB);
64 const Thumb2InstrInfo *TII = nullptr;
65 ReachingDefAnalysis *RDA = nullptr;
68 char MVEVPTBlock::ID = 0;
70 } // end anonymous namespace
72 INITIALIZE_PASS(MVEVPTBlock, DEBUG_TYPE, "ARM MVE VPT block pass", false, false)
74 static MachineInstr *findVCMPToFoldIntoVPST(MachineInstr *MI,
75 ReachingDefAnalysis *RDA,
76 unsigned &NewOpcode) {
77 // First, search backwards to the instruction that defines VPR
78 auto *Def = RDA->getReachingMIDef(MI, ARM::VPR);
82 // Now check that Def is a VCMP
83 if (!(NewOpcode = VCMPOpcodeToVPT(Def->getOpcode())))
86 // Check that Def's operands are not defined between the VCMP and MI, i.e.
87 // check that they have the same reaching def.
88 if (!RDA->hasSameReachingDef(Def, MI, Def->getOperand(1).getReg()) ||
89 !RDA->hasSameReachingDef(Def, MI, Def->getOperand(2).getReg()))
95 bool MVEVPTBlock::InsertVPTBlocks(MachineBasicBlock &Block) {
96 bool Modified = false;
97 MachineBasicBlock::instr_iterator MBIter = Block.instr_begin();
98 MachineBasicBlock::instr_iterator EndIter = Block.instr_end();
99 SmallSet<MachineInstr *, 4> RemovedVCMPs;
101 while (MBIter != EndIter) {
102 MachineInstr *MI = &*MBIter;
103 unsigned PredReg = 0;
104 DebugLoc dl = MI->getDebugLoc();
106 ARMVCC::VPTCodes Pred = getVPTInstrPredicate(*MI, PredReg);
108 // The idea of the predicate is that None, Then and Else are for use when
109 // handling assembly language: they correspond to the three possible
110 // suffixes "", "t" and "e" on the mnemonic. So when instructions are read
111 // from assembly source or disassembled from object code, you expect to see
112 // a mixture whenever there's a long VPT block. But in code generation, we
113 // hope we'll never generate an Else as input to this pass.
114 assert(Pred != ARMVCC::Else && "VPT block pass does not expect Else preds");
116 if (Pred == ARMVCC::None) {
121 LLVM_DEBUG(dbgs() << "VPT block created for: "; MI->dump());
123 ARMVCC::VPTCodes NextPred;
125 // Look at subsequent instructions, checking if they can be in the same VPT
128 while (MBIter != EndIter && VPTInstCnt < 4) {
129 NextPred = getVPTInstrPredicate(*MBIter, PredReg);
130 assert(NextPred != ARMVCC::Else &&
131 "VPT block pass does not expect Else preds");
132 if (NextPred != Pred)
134 LLVM_DEBUG(dbgs() << " adding : "; MBIter->dump());
139 unsigned BlockMask = getARMVPTBlockMask(VPTInstCnt);
141 // Search back for a VCMP that can be folded to create a VPT, or else create
143 MachineInstrBuilder MIBuilder;
145 MachineInstr *VCMP = findVCMPToFoldIntoVPST(MI, RDA, NewOpcode);
147 LLVM_DEBUG(dbgs() << " folding VCMP into VPST: "; VCMP->dump());
148 MIBuilder = BuildMI(Block, MI, dl, TII->get(NewOpcode));
149 MIBuilder.addImm(BlockMask);
150 MIBuilder.add(VCMP->getOperand(1));
151 MIBuilder.add(VCMP->getOperand(2));
152 MIBuilder.add(VCMP->getOperand(3));
153 // We delay removing the actual VCMP instruction by saving it to a list
154 // and deleting all instructions in this list in one go after we have
155 // created the VPT blocks. We do this in order not to invalidate the
156 // ReachingDefAnalysis that is queried by 'findVCMPToFoldIntoVPST'.
157 RemovedVCMPs.insert(VCMP);
159 MIBuilder = BuildMI(Block, MI, dl, TII->get(ARM::MVE_VPST));
160 MIBuilder.addImm(BlockMask);
164 Block, MachineBasicBlock::instr_iterator(MIBuilder.getInstr()), MBIter);
169 for (auto *I : RemovedVCMPs)
170 I->eraseFromParent();
175 bool MVEVPTBlock::runOnMachineFunction(MachineFunction &Fn) {
176 if (skipFunction(Fn.getFunction()))
179 const ARMSubtarget &STI =
180 static_cast<const ARMSubtarget &>(Fn.getSubtarget());
182 if (!STI.isThumb2() || !STI.hasMVEIntegerOps())
185 TII = static_cast<const Thumb2InstrInfo *>(STI.getInstrInfo());
186 RDA = &getAnalysis<ReachingDefAnalysis>();
188 LLVM_DEBUG(dbgs() << "********** ARM MVE VPT BLOCKS **********\n"
189 << "********** Function: " << Fn.getName() << '\n');
191 bool Modified = false;
192 for (MachineBasicBlock &MBB : Fn)
193 Modified |= InsertVPTBlocks(MBB);
195 LLVM_DEBUG(dbgs() << "**************************************\n");
199 /// createMVEVPTBlock - Returns an instance of the MVE VPT block
201 FunctionPass *llvm::createMVEVPTBlockPass() { return new MVEVPTBlock(); }