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1 //===-- AVR.td - Describe the AVR Target Machine ----------*- tablegen -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===---------------------------------------------------------------------===//
8 // This is the top level entry point for the AVR target.
9 //===---------------------------------------------------------------------===//
10
11 //===---------------------------------------------------------------------===//
12 // Target-independent interfaces which we are implementing
13 //===---------------------------------------------------------------------===//
14
15 include "llvm/Target/Target.td"
16
17 //===---------------------------------------------------------------------===//
18 // AVR Device Definitions
19 //===---------------------------------------------------------------------===//
20
21 include "AVRDevices.td"
22
23 //===---------------------------------------------------------------------===//
24 // Register File Description
25 //===---------------------------------------------------------------------===//
26
27 include "AVRRegisterInfo.td"
28
29 //===---------------------------------------------------------------------===//
30 // Instruction Descriptions
31 //===---------------------------------------------------------------------===//
32
33 include "AVRInstrInfo.td"
34
35 def AVRInstrInfo : InstrInfo;
36
37 //===---------------------------------------------------------------------===//
38 // Calling Conventions
39 //===---------------------------------------------------------------------===//
40
41 include "AVRCallingConv.td"
42
43 //===---------------------------------------------------------------------===//
44 // Assembly Printers
45 //===---------------------------------------------------------------------===//
46
47 def AVRAsmWriter : AsmWriter {
48  string AsmWriterClassName = "InstPrinter";
49  bit isMCAsmWriter = 1;
50 }
51
52 //===---------------------------------------------------------------------===//
53 // Assembly Parsers
54 //===---------------------------------------------------------------------===//
55
56 def AVRAsmParser : AsmParser {
57   let ShouldEmitMatchRegisterName = 1;
58   let ShouldEmitMatchRegisterAltName = 1;
59 }
60
61 def AVRAsmParserVariant : AsmParserVariant {
62   int Variant = 0;
63
64   // Recognize hard coded registers.
65   string RegisterPrefix = "$";
66   string TokenizingCharacters = "+";
67 }
68
69 //===---------------------------------------------------------------------===//
70 // Target Declaration
71 //===---------------------------------------------------------------------===//
72
73 def AVR : Target {
74   let InstructionSet         = AVRInstrInfo;
75   let AssemblyWriters        = [AVRAsmWriter];
76
77   let AssemblyParsers        = [AVRAsmParser];
78   let AssemblyParserVariants = [AVRAsmParserVariant];
79 }
80