1 //===----------------------------------------------------------------------===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
8 // Automatically generated file, do not edit!
9 //===----------------------------------------------------------------------===//
11 class Enc_5e2823 : OpcodeHexagon {
13 let Inst{20-16} = Rs32{4-0};
15 let Inst{4-0} = Rd32{4-0};
17 class Enc_b9c5fb : OpcodeHexagon {
19 let Inst{20-16} = Rss32{4-0};
21 let Inst{4-0} = Rdd32{4-0};
23 class Enc_5ab2be : OpcodeHexagon {
25 let Inst{20-16} = Rs32{4-0};
27 let Inst{12-8} = Rt32{4-0};
29 let Inst{4-0} = Rd32{4-0};
31 class Enc_bd6011 : OpcodeHexagon {
33 let Inst{12-8} = Rt32{4-0};
35 let Inst{20-16} = Rs32{4-0};
37 let Inst{4-0} = Rd32{4-0};
39 class Enc_cb9321 : OpcodeHexagon {
41 let Inst{27-21} = Ii{15-9};
42 let Inst{13-5} = Ii{8-0};
44 let Inst{20-16} = Rs32{4-0};
46 let Inst{4-0} = Rd32{4-0};
48 class Enc_a56825 : OpcodeHexagon {
50 let Inst{20-16} = Rss32{4-0};
52 let Inst{12-8} = Rtt32{4-0};
54 let Inst{4-0} = Rdd32{4-0};
56 class Enc_140c83 : OpcodeHexagon {
58 let Inst{21-21} = Ii{9-9};
59 let Inst{13-5} = Ii{8-0};
61 let Inst{20-16} = Rs32{4-0};
63 let Inst{4-0} = Rd32{4-0};
65 class Enc_18c338 : OpcodeHexagon {
67 let Inst{12-5} = Ii{7-0};
69 let Inst{22-16} = II{7-1};
70 let Inst{13-13} = II{0-0};
72 let Inst{4-0} = Rdd32{4-0};
74 class Enc_be32a5 : OpcodeHexagon {
76 let Inst{20-16} = Rs32{4-0};
78 let Inst{12-8} = Rt32{4-0};
80 let Inst{4-0} = Rdd32{4-0};
82 class Enc_ea23e4 : OpcodeHexagon {
84 let Inst{12-8} = Rtt32{4-0};
86 let Inst{20-16} = Rss32{4-0};
88 let Inst{4-0} = Rdd32{4-0};
90 class Enc_e3b0c4 : OpcodeHexagon {
93 class Enc_ea4c54 : OpcodeHexagon {
95 let Inst{6-5} = Pu4{1-0};
97 let Inst{20-16} = Rs32{4-0};
99 let Inst{12-8} = Rt32{4-0};
101 let Inst{4-0} = Rd32{4-0};
103 class Enc_e38e1f : OpcodeHexagon {
105 let Inst{12-5} = Ii{7-0};
107 let Inst{22-21} = Pu4{1-0};
109 let Inst{20-16} = Rs32{4-0};
111 let Inst{4-0} = Rd32{4-0};
113 class Enc_9b0bc1 : OpcodeHexagon {
115 let Inst{6-5} = Pu4{1-0};
117 let Inst{12-8} = Rt32{4-0};
119 let Inst{20-16} = Rs32{4-0};
121 let Inst{4-0} = Rd32{4-0};
123 class Enc_90cd8b : OpcodeHexagon {
125 let Inst{20-16} = Rss32{4-0};
127 let Inst{4-0} = Rd32{4-0};
129 class Enc_3a3d62 : OpcodeHexagon {
131 let Inst{20-16} = Rs32{4-0};
133 let Inst{4-0} = Rdd32{4-0};
135 class Enc_0cb018 : OpcodeHexagon {
137 let Inst{20-16} = Cs32{4-0};
139 let Inst{4-0} = Rd32{4-0};
141 class Enc_51436c : OpcodeHexagon {
143 let Inst{23-22} = Ii{15-14};
144 let Inst{13-0} = Ii{13-0};
146 let Inst{20-16} = Rx32{4-0};
148 class Enc_bd811a : OpcodeHexagon {
150 let Inst{20-16} = Rs32{4-0};
152 let Inst{4-0} = Cd32{4-0};
154 class Enc_5e87ce : OpcodeHexagon {
156 let Inst{23-22} = Ii{15-14};
157 let Inst{20-16} = Ii{13-9};
158 let Inst{13-5} = Ii{8-0};
160 let Inst{4-0} = Rd32{4-0};
162 class Enc_fcf7a7 : OpcodeHexagon {
164 let Inst{20-16} = Rss32{4-0};
166 let Inst{12-8} = Rtt32{4-0};
168 let Inst{1-0} = Pd4{1-0};
170 class Enc_88c16c : OpcodeHexagon {
172 let Inst{20-16} = Rss32{4-0};
174 let Inst{12-8} = Rtt32{4-0};
176 let Inst{4-0} = Rxx32{4-0};
178 class Enc_2b3f60 : OpcodeHexagon {
180 let Inst{20-16} = Rss32{4-0};
182 let Inst{12-8} = Rtt32{4-0};
184 let Inst{4-0} = Rdd32{4-0};
186 let Inst{6-5} = Px4{1-0};
188 class Enc_311abd : OpcodeHexagon {
190 let Inst{12-8} = Ii{4-0};
192 let Inst{20-16} = Rs32{4-0};
194 let Inst{4-0} = Rdd32{4-0};
196 class Enc_c2b48e : OpcodeHexagon {
198 let Inst{20-16} = Rs32{4-0};
200 let Inst{12-8} = Rt32{4-0};
202 let Inst{1-0} = Pd4{1-0};
204 class Enc_08d755 : OpcodeHexagon {
206 let Inst{12-5} = Ii{7-0};
208 let Inst{20-16} = Rs32{4-0};
210 let Inst{1-0} = Pd4{1-0};
212 class Enc_02553a : OpcodeHexagon {
214 let Inst{11-5} = Ii{6-0};
216 let Inst{20-16} = Rs32{4-0};
218 let Inst{1-0} = Pd4{1-0};
220 class Enc_f0cca7 : OpcodeHexagon {
222 let Inst{12-5} = Ii{7-0};
224 let Inst{20-16} = II{5-1};
225 let Inst{13-13} = II{0-0};
227 let Inst{4-0} = Rdd32{4-0};
229 class Enc_9cdba7 : OpcodeHexagon {
231 let Inst{12-5} = Ii{7-0};
233 let Inst{20-16} = Rs32{4-0};
235 let Inst{4-0} = Rdd32{4-0};
237 class Enc_a05677 : OpcodeHexagon {
239 let Inst{12-8} = Ii{4-0};
241 let Inst{20-16} = Rs32{4-0};
243 let Inst{4-0} = Rd32{4-0};
245 class Enc_2b518f : OpcodeHexagon {
247 let Inst{27-16} = Ii{31-20};
248 let Inst{13-0} = Ii{19-6};
250 class Enc_fb6577 : OpcodeHexagon {
252 let Inst{9-8} = Pu4{1-0};
254 let Inst{20-16} = Rs32{4-0};
256 let Inst{4-0} = Rd32{4-0};
258 class Enc_b8c967 : OpcodeHexagon {
260 let Inst{12-5} = Ii{7-0};
262 let Inst{20-16} = Rs32{4-0};
264 let Inst{4-0} = Rd32{4-0};
266 class Enc_667b39 : OpcodeHexagon {
268 let Inst{20-16} = Css32{4-0};
270 let Inst{4-0} = Rdd32{4-0};
272 class Enc_0ed752 : OpcodeHexagon {
274 let Inst{20-16} = Rss32{4-0};
276 let Inst{4-0} = Cdd32{4-0};
278 class Enc_03833b : OpcodeHexagon {
280 let Inst{20-16} = Rss32{4-0};
282 let Inst{12-8} = Rt32{4-0};
284 let Inst{1-0} = Pd4{1-0};
286 class Enc_0d8adb : OpcodeHexagon {
288 let Inst{12-5} = Ii{7-0};
290 let Inst{20-16} = Rss32{4-0};
292 let Inst{1-0} = Pd4{1-0};
294 class Enc_3680c2 : OpcodeHexagon {
296 let Inst{11-5} = Ii{6-0};
298 let Inst{20-16} = Rss32{4-0};
300 let Inst{1-0} = Pd4{1-0};
302 class Enc_412ff0 : OpcodeHexagon {
304 let Inst{20-16} = Rss32{4-0};
306 let Inst{4-0} = Ru32{4-0};
308 let Inst{12-8} = Rxx32{4-0};
310 class Enc_831a7d : OpcodeHexagon {
312 let Inst{20-16} = Rss32{4-0};
314 let Inst{12-8} = Rtt32{4-0};
316 let Inst{4-0} = Rxx32{4-0};
318 let Inst{6-5} = Pe4{1-0};
320 class Enc_d2216a : OpcodeHexagon {
322 let Inst{20-16} = Rss32{4-0};
324 let Inst{12-8} = Rtt32{4-0};
326 let Inst{4-0} = Rd32{4-0};
328 class Enc_d2c7f1 : OpcodeHexagon {
330 let Inst{12-8} = Rtt32{4-0};
332 let Inst{20-16} = Rss32{4-0};
334 let Inst{4-0} = Rdd32{4-0};
336 let Inst{6-5} = Pe4{1-0};
338 class Enc_5eac98 : OpcodeHexagon {
340 let Inst{13-8} = Ii{5-0};
342 let Inst{20-16} = Rss32{4-0};
344 let Inst{4-0} = Rdd32{4-0};
346 class Enc_927852 : OpcodeHexagon {
348 let Inst{20-16} = Rss32{4-0};
350 let Inst{12-8} = Rt32{4-0};
352 let Inst{4-0} = Rdd32{4-0};
354 class Enc_7e5a82 : OpcodeHexagon {
356 let Inst{12-8} = Ii{4-0};
358 let Inst{20-16} = Rss32{4-0};
360 let Inst{4-0} = Rdd32{4-0};
362 class Enc_65d691 : OpcodeHexagon {
364 let Inst{17-16} = Ps4{1-0};
366 let Inst{1-0} = Pd4{1-0};
368 class Enc_454a26 : OpcodeHexagon {
370 let Inst{9-8} = Pt4{1-0};
372 let Inst{17-16} = Ps4{1-0};
374 let Inst{1-0} = Pd4{1-0};
376 class Enc_5d6c34 : OpcodeHexagon {
378 let Inst{13-8} = Ii{5-0};
380 let Inst{20-16} = Rs32{4-0};
382 let Inst{1-0} = Pd4{1-0};
384 class Enc_cb4b4e : OpcodeHexagon {
386 let Inst{6-5} = Pu4{1-0};
388 let Inst{20-16} = Rs32{4-0};
390 let Inst{12-8} = Rt32{4-0};
392 let Inst{4-0} = Rdd32{4-0};
394 class Enc_cda00a : OpcodeHexagon {
396 let Inst{19-16} = Ii{11-8};
397 let Inst{12-5} = Ii{7-0};
399 let Inst{22-21} = Pu4{1-0};
401 let Inst{4-0} = Rd32{4-0};
403 class Enc_bd0b33 : OpcodeHexagon {
405 let Inst{21-21} = Ii{9-9};
406 let Inst{13-5} = Ii{8-0};
408 let Inst{20-16} = Rs32{4-0};
410 let Inst{1-0} = Pd4{1-0};
412 class Enc_c0cdde : OpcodeHexagon {
414 let Inst{13-5} = Ii{8-0};
416 let Inst{20-16} = Rs32{4-0};
418 let Inst{1-0} = Pd4{1-0};
420 class Enc_78e566 : OpcodeHexagon {
422 let Inst{9-8} = Pt4{1-0};
424 let Inst{4-0} = Rdd32{4-0};
426 class Enc_830e5d : OpcodeHexagon {
428 let Inst{12-5} = Ii{7-0};
430 let Inst{22-16} = II{7-1};
431 let Inst{13-13} = II{0-0};
433 let Inst{24-23} = Pu4{1-0};
435 let Inst{4-0} = Rd32{4-0};
437 class Enc_f5e933 : OpcodeHexagon {
439 let Inst{17-16} = Ps4{1-0};
441 let Inst{4-0} = Rd32{4-0};
443 class Enc_48b75f : OpcodeHexagon {
445 let Inst{20-16} = Rs32{4-0};
447 let Inst{1-0} = Pd4{1-0};
449 class Enc_527412 : OpcodeHexagon {
451 let Inst{17-16} = Ps4{1-0};
453 let Inst{9-8} = Pt4{1-0};
455 let Inst{4-0} = Rd32{4-0};
457 class Enc_329361 : OpcodeHexagon {
459 let Inst{6-5} = Pu4{1-0};
461 let Inst{20-16} = Rss32{4-0};
463 let Inst{12-8} = Rtt32{4-0};
465 let Inst{4-0} = Rdd32{4-0};
467 class Enc_284ebb : OpcodeHexagon {
469 let Inst{17-16} = Ps4{1-0};
471 let Inst{9-8} = Pt4{1-0};
473 let Inst{1-0} = Pd4{1-0};
475 class Enc_607661 : OpcodeHexagon {
477 let Inst{12-7} = Ii{5-0};
479 let Inst{4-0} = Rd32{4-0};
481 class Enc_9ac432 : OpcodeHexagon {
483 let Inst{17-16} = Ps4{1-0};
485 let Inst{9-8} = Pt4{1-0};
487 let Inst{7-6} = Pu4{1-0};
489 let Inst{1-0} = Pd4{1-0};
491 class Enc_1f19b5 : OpcodeHexagon {
493 let Inst{9-5} = Ii{4-0};
495 let Inst{20-16} = Rss32{4-0};
497 let Inst{1-0} = Pd4{1-0};
499 class Enc_e6c957 : OpcodeHexagon {
501 let Inst{21-21} = Ii{9-9};
502 let Inst{13-5} = Ii{8-0};
504 let Inst{4-0} = Rdd32{4-0};
506 class Enc_83ee64 : OpcodeHexagon {
508 let Inst{12-8} = Ii{4-0};
510 let Inst{20-16} = Rs32{4-0};
512 let Inst{1-0} = Pd4{1-0};
514 class Enc_2ae154 : OpcodeHexagon {
516 let Inst{20-16} = Rs32{4-0};
518 let Inst{12-8} = Rt32{4-0};
520 let Inst{4-0} = Rx32{4-0};
522 class Enc_437f33 : OpcodeHexagon {
524 let Inst{20-16} = Rs32{4-0};
526 let Inst{12-8} = Rt32{4-0};
528 let Inst{6-5} = Pu4{1-0};
530 let Inst{4-0} = Rx32{4-0};
532 class Enc_6c9440 : OpcodeHexagon {
534 let Inst{21-21} = Ii{9-9};
535 let Inst{13-5} = Ii{8-0};
537 let Inst{4-0} = Rd32{4-0};
539 class Enc_890909 : OpcodeHexagon {
541 let Inst{20-16} = Rs32{4-0};
543 let Inst{4-0} = Rd32{4-0};
545 let Inst{6-5} = Pe4{1-0};
547 class Enc_a94f3b : OpcodeHexagon {
549 let Inst{20-16} = Rs32{4-0};
551 let Inst{12-8} = Rt32{4-0};
553 let Inst{4-0} = Rd32{4-0};
555 let Inst{6-5} = Pe4{1-0};
557 class Enc_0aa344 : OpcodeHexagon {
559 let Inst{20-16} = Gss32{4-0};
561 let Inst{4-0} = Rdd32{4-0};
563 class Enc_44271f : OpcodeHexagon {
565 let Inst{20-16} = Gs32{4-0};
567 let Inst{4-0} = Rd32{4-0};
569 class Enc_ed5027 : OpcodeHexagon {
571 let Inst{20-16} = Rss32{4-0};
573 let Inst{4-0} = Gdd32{4-0};
575 class Enc_621fba : OpcodeHexagon {
577 let Inst{20-16} = Rs32{4-0};
579 let Inst{4-0} = Gd32{4-0};
581 class Enc_81ac1d : OpcodeHexagon {
583 let Inst{24-16} = Ii{23-15};
584 let Inst{13-1} = Ii{14-2};
586 class Enc_daea09 : OpcodeHexagon {
588 let Inst{23-22} = Ii{16-15};
589 let Inst{20-16} = Ii{14-10};
590 let Inst{13-13} = Ii{9-9};
591 let Inst{7-1} = Ii{8-2};
593 let Inst{9-8} = Pu4{1-0};
595 class Enc_ecbcc8 : OpcodeHexagon {
597 let Inst{20-16} = Rs32{4-0};
599 class Enc_88d4d9 : OpcodeHexagon {
601 let Inst{9-8} = Pu4{1-0};
603 let Inst{20-16} = Rs32{4-0};
605 class Enc_0fa531 : OpcodeHexagon {
607 let Inst{21-21} = Ii{14-14};
608 let Inst{13-13} = Ii{13-13};
609 let Inst{11-1} = Ii{12-2};
611 let Inst{20-16} = Rs32{4-0};
613 class Enc_4dc228 : OpcodeHexagon {
615 let Inst{12-8} = Ii{8-4};
616 let Inst{4-3} = Ii{3-2};
618 let Inst{20-16} = II{9-5};
619 let Inst{7-5} = II{4-2};
620 let Inst{1-0} = II{1-0};
622 class Enc_864a5a : OpcodeHexagon {
624 let Inst{12-8} = Ii{8-4};
625 let Inst{4-3} = Ii{3-2};
627 let Inst{20-16} = Rs32{4-0};
629 class Enc_a51a9a : OpcodeHexagon {
631 let Inst{12-8} = Ii{7-3};
632 let Inst{4-2} = Ii{2-0};
634 class Enc_33f8ba : OpcodeHexagon {
636 let Inst{12-8} = Ii{7-3};
637 let Inst{4-2} = Ii{2-0};
639 let Inst{20-16} = Rx32{4-0};
641 class Enc_c9a18e : OpcodeHexagon {
643 let Inst{21-20} = Ii{10-9};
644 let Inst{7-1} = Ii{8-2};
646 let Inst{18-16} = Ns8{2-0};
648 let Inst{12-8} = Rt32{4-0};
650 class Enc_6a5972 : OpcodeHexagon {
652 let Inst{21-20} = Ii{10-9};
653 let Inst{7-1} = Ii{8-2};
655 let Inst{19-16} = Rs16{3-0};
657 let Inst{11-8} = Rt16{3-0};
659 class Enc_eafd18 : OpcodeHexagon {
661 let Inst{12-8} = II{4-0};
663 let Inst{21-20} = Ii{10-9};
664 let Inst{7-1} = Ii{8-2};
666 let Inst{18-16} = Ns8{2-0};
668 class Enc_14d27a : OpcodeHexagon {
670 let Inst{12-8} = II{4-0};
672 let Inst{21-20} = Ii{10-9};
673 let Inst{7-1} = Ii{8-2};
675 let Inst{19-16} = Rs16{3-0};
677 class Enc_e90a15 : OpcodeHexagon {
679 let Inst{21-20} = Ii{10-9};
680 let Inst{7-1} = Ii{8-2};
682 let Inst{18-16} = Ns8{2-0};
684 let Inst{29-29} = n1{3-3};
685 let Inst{26-25} = n1{2-1};
686 let Inst{22-22} = n1{0-0};
688 class Enc_5a18b3 : OpcodeHexagon {
690 let Inst{21-20} = Ii{10-9};
691 let Inst{7-1} = Ii{8-2};
693 let Inst{18-16} = Ns8{2-0};
695 let Inst{29-29} = n1{4-4};
696 let Inst{26-25} = n1{3-2};
697 let Inst{22-22} = n1{1-1};
698 let Inst{13-13} = n1{0-0};
700 class Enc_1de724 : OpcodeHexagon {
702 let Inst{21-20} = Ii{10-9};
703 let Inst{7-1} = Ii{8-2};
705 let Inst{19-16} = Rs16{3-0};
707 let Inst{28-28} = n1{3-3};
708 let Inst{24-22} = n1{2-0};
710 class Enc_14640c : OpcodeHexagon {
712 let Inst{21-20} = Ii{10-9};
713 let Inst{7-1} = Ii{8-2};
715 let Inst{19-16} = Rs16{3-0};
717 let Inst{28-28} = n1{4-4};
718 let Inst{24-22} = n1{3-1};
719 let Inst{13-13} = n1{0-0};
721 class Enc_668704 : OpcodeHexagon {
723 let Inst{21-20} = Ii{10-9};
724 let Inst{7-1} = Ii{8-2};
726 let Inst{19-16} = Rs16{3-0};
728 let Inst{28-28} = n1{4-4};
729 let Inst{25-22} = n1{3-0};
731 class Enc_800e04 : OpcodeHexagon {
733 let Inst{21-20} = Ii{10-9};
734 let Inst{7-1} = Ii{8-2};
736 let Inst{19-16} = Rs16{3-0};
738 let Inst{28-28} = n1{5-5};
739 let Inst{25-22} = n1{4-1};
740 let Inst{13-13} = n1{0-0};
742 class Enc_4aca3a : OpcodeHexagon {
744 let Inst{21-20} = Ii{10-9};
745 let Inst{7-1} = Ii{8-2};
747 let Inst{18-16} = Ns8{2-0};
749 let Inst{29-29} = n1{2-2};
750 let Inst{26-25} = n1{1-0};
752 class Enc_f7ea77 : OpcodeHexagon {
754 let Inst{21-20} = Ii{10-9};
755 let Inst{7-1} = Ii{8-2};
757 let Inst{18-16} = Ns8{2-0};
759 let Inst{29-29} = n1{3-3};
760 let Inst{26-25} = n1{2-1};
761 let Inst{13-13} = n1{0-0};
763 class Enc_405228 : OpcodeHexagon {
765 let Inst{21-20} = Ii{10-9};
766 let Inst{7-1} = Ii{8-2};
768 let Inst{19-16} = Rs16{3-0};
770 let Inst{28-28} = n1{2-2};
771 let Inst{24-23} = n1{1-0};
773 class Enc_3a2484 : OpcodeHexagon {
775 let Inst{21-20} = Ii{10-9};
776 let Inst{7-1} = Ii{8-2};
778 let Inst{19-16} = Rs16{3-0};
780 let Inst{28-28} = n1{3-3};
781 let Inst{24-23} = n1{2-1};
782 let Inst{13-13} = n1{0-0};
784 class Enc_736575 : OpcodeHexagon {
786 let Inst{21-20} = Ii{10-9};
787 let Inst{7-1} = Ii{8-2};
789 let Inst{19-16} = Rs16{3-0};
791 let Inst{28-28} = n1{3-3};
792 let Inst{25-23} = n1{2-0};
794 class Enc_8e583a : OpcodeHexagon {
796 let Inst{21-20} = Ii{10-9};
797 let Inst{7-1} = Ii{8-2};
799 let Inst{19-16} = Rs16{3-0};
801 let Inst{28-28} = n1{4-4};
802 let Inst{25-23} = n1{3-1};
803 let Inst{13-13} = n1{0-0};
805 class Enc_3694bd : OpcodeHexagon {
807 let Inst{21-20} = Ii{10-9};
808 let Inst{7-1} = Ii{8-2};
810 let Inst{18-16} = Ns8{2-0};
812 let Inst{29-29} = n1{4-4};
813 let Inst{26-25} = n1{3-2};
814 let Inst{23-22} = n1{1-0};
816 class Enc_a6853f : OpcodeHexagon {
818 let Inst{21-20} = Ii{10-9};
819 let Inst{7-1} = Ii{8-2};
821 let Inst{18-16} = Ns8{2-0};
823 let Inst{29-29} = n1{5-5};
824 let Inst{26-25} = n1{4-3};
825 let Inst{23-22} = n1{2-1};
826 let Inst{13-13} = n1{0-0};
828 class Enc_a42857 : OpcodeHexagon {
830 let Inst{21-20} = Ii{10-9};
831 let Inst{7-1} = Ii{8-2};
833 let Inst{19-16} = Rs16{3-0};
835 let Inst{28-28} = n1{4-4};
836 let Inst{24-22} = n1{3-1};
837 let Inst{8-8} = n1{0-0};
839 class Enc_f6fe0b : OpcodeHexagon {
841 let Inst{21-20} = Ii{10-9};
842 let Inst{7-1} = Ii{8-2};
844 let Inst{19-16} = Rs16{3-0};
846 let Inst{28-28} = n1{5-5};
847 let Inst{24-22} = n1{4-2};
848 let Inst{13-13} = n1{1-1};
849 let Inst{8-8} = n1{0-0};
851 class Enc_3e3989 : OpcodeHexagon {
853 let Inst{21-20} = Ii{10-9};
854 let Inst{7-1} = Ii{8-2};
856 let Inst{19-16} = Rs16{3-0};
858 let Inst{28-28} = n1{5-5};
859 let Inst{25-22} = n1{4-1};
860 let Inst{8-8} = n1{0-0};
862 class Enc_b909d2 : OpcodeHexagon {
864 let Inst{21-20} = Ii{10-9};
865 let Inst{7-1} = Ii{8-2};
867 let Inst{19-16} = Rs16{3-0};
869 let Inst{28-28} = n1{6-6};
870 let Inst{25-22} = n1{5-2};
871 let Inst{13-13} = n1{1-1};
872 let Inst{8-8} = n1{0-0};
874 class Enc_f82302 : OpcodeHexagon {
876 let Inst{21-20} = Ii{10-9};
877 let Inst{7-1} = Ii{8-2};
879 let Inst{18-16} = Ns8{2-0};
881 let Inst{29-29} = n1{3-3};
882 let Inst{26-25} = n1{2-1};
883 let Inst{23-23} = n1{0-0};
885 class Enc_6413b6 : OpcodeHexagon {
887 let Inst{21-20} = Ii{10-9};
888 let Inst{7-1} = Ii{8-2};
890 let Inst{18-16} = Ns8{2-0};
892 let Inst{29-29} = n1{4-4};
893 let Inst{26-25} = n1{3-2};
894 let Inst{23-23} = n1{1-1};
895 let Inst{13-13} = n1{0-0};
897 class Enc_b78edd : OpcodeHexagon {
899 let Inst{21-20} = Ii{10-9};
900 let Inst{7-1} = Ii{8-2};
902 let Inst{19-16} = Rs16{3-0};
904 let Inst{28-28} = n1{3-3};
905 let Inst{24-23} = n1{2-1};
906 let Inst{8-8} = n1{0-0};
908 class Enc_041d7b : OpcodeHexagon {
910 let Inst{21-20} = Ii{10-9};
911 let Inst{7-1} = Ii{8-2};
913 let Inst{19-16} = Rs16{3-0};
915 let Inst{28-28} = n1{4-4};
916 let Inst{24-23} = n1{3-2};
917 let Inst{13-13} = n1{1-1};
918 let Inst{8-8} = n1{0-0};
920 class Enc_b1e1fb : OpcodeHexagon {
922 let Inst{21-20} = Ii{10-9};
923 let Inst{7-1} = Ii{8-2};
925 let Inst{19-16} = Rs16{3-0};
927 let Inst{28-28} = n1{4-4};
928 let Inst{25-23} = n1{3-1};
929 let Inst{8-8} = n1{0-0};
931 class Enc_178717 : OpcodeHexagon {
933 let Inst{21-20} = Ii{10-9};
934 let Inst{7-1} = Ii{8-2};
936 let Inst{19-16} = Rs16{3-0};
938 let Inst{28-28} = n1{5-5};
939 let Inst{25-23} = n1{4-2};
940 let Inst{13-13} = n1{1-1};
941 let Inst{8-8} = n1{0-0};
943 class Enc_5de85f : OpcodeHexagon {
945 let Inst{21-20} = Ii{10-9};
946 let Inst{7-1} = Ii{8-2};
948 let Inst{12-8} = Rt32{4-0};
950 let Inst{18-16} = Ns8{2-0};
952 class Enc_9e4c3f : OpcodeHexagon {
954 let Inst{13-8} = II{5-0};
956 let Inst{21-20} = Ii{10-9};
957 let Inst{7-1} = Ii{8-2};
959 let Inst{19-16} = Rd16{3-0};
961 class Enc_66bce1 : OpcodeHexagon {
963 let Inst{21-20} = Ii{10-9};
964 let Inst{7-1} = Ii{8-2};
966 let Inst{19-16} = Rs16{3-0};
968 let Inst{11-8} = Rd16{3-0};
970 class Enc_69d63b : OpcodeHexagon {
972 let Inst{21-20} = Ii{10-9};
973 let Inst{7-1} = Ii{8-2};
975 let Inst{18-16} = Ns8{2-0};
977 class Enc_ad1c74 : OpcodeHexagon {
979 let Inst{21-20} = Ii{10-9};
980 let Inst{7-1} = Ii{8-2};
982 let Inst{19-16} = Rs16{3-0};
984 class Enc_a27588 : OpcodeHexagon {
986 let Inst{26-25} = Ii{10-9};
987 let Inst{13-5} = Ii{8-0};
989 let Inst{20-16} = Rs32{4-0};
991 let Inst{4-0} = Ryy32{4-0};
993 class Enc_1f5d8f : OpcodeHexagon {
995 let Inst{13-13} = Mu2{0-0};
997 let Inst{4-0} = Ryy32{4-0};
999 let Inst{20-16} = Rx32{4-0};
1001 class Enc_74aef2 : OpcodeHexagon {
1003 let Inst{8-5} = Ii{3-0};
1005 let Inst{13-13} = Mu2{0-0};
1007 let Inst{4-0} = Ryy32{4-0};
1009 let Inst{20-16} = Rx32{4-0};
1011 class Enc_6b197f : OpcodeHexagon {
1013 let Inst{8-5} = Ii{3-0};
1015 let Inst{4-0} = Ryy32{4-0};
1017 let Inst{20-16} = Rx32{4-0};
1019 class Enc_5cd7e9 : OpcodeHexagon {
1021 let Inst{26-25} = Ii{11-10};
1022 let Inst{13-5} = Ii{9-1};
1024 let Inst{20-16} = Rs32{4-0};
1026 let Inst{4-0} = Ryy32{4-0};
1028 class Enc_9e2e1c : OpcodeHexagon {
1030 let Inst{8-5} = Ii{4-1};
1032 let Inst{13-13} = Mu2{0-0};
1034 let Inst{4-0} = Ryy32{4-0};
1036 let Inst{20-16} = Rx32{4-0};
1038 class Enc_bd1cbc : OpcodeHexagon {
1040 let Inst{8-5} = Ii{4-1};
1042 let Inst{4-0} = Ryy32{4-0};
1044 let Inst{20-16} = Rx32{4-0};
1046 class Enc_de0214 : OpcodeHexagon {
1048 let Inst{26-25} = Ii{11-10};
1049 let Inst{13-5} = Ii{9-1};
1051 let Inst{20-16} = Rs32{4-0};
1053 let Inst{4-0} = Rd32{4-0};
1055 class Enc_74d4e5 : OpcodeHexagon {
1057 let Inst{13-13} = Mu2{0-0};
1059 let Inst{4-0} = Rd32{4-0};
1061 let Inst{20-16} = Rx32{4-0};
1063 class Enc_e83554 : OpcodeHexagon {
1065 let Inst{8-5} = Ii{4-1};
1067 let Inst{13-13} = Mu2{0-0};
1069 let Inst{4-0} = Rd32{4-0};
1071 let Inst{20-16} = Rx32{4-0};
1073 class Enc_152467 : OpcodeHexagon {
1075 let Inst{8-5} = Ii{4-1};
1077 let Inst{4-0} = Rd32{4-0};
1079 let Inst{20-16} = Rx32{4-0};
1081 class Enc_2d7491 : OpcodeHexagon {
1083 let Inst{26-25} = Ii{12-11};
1084 let Inst{13-5} = Ii{10-2};
1086 let Inst{20-16} = Rs32{4-0};
1088 let Inst{4-0} = Rdd32{4-0};
1090 class Enc_7eee72 : OpcodeHexagon {
1092 let Inst{13-13} = Mu2{0-0};
1094 let Inst{4-0} = Rdd32{4-0};
1096 let Inst{20-16} = Rx32{4-0};
1098 class Enc_70b24b : OpcodeHexagon {
1100 let Inst{8-5} = Ii{5-2};
1102 let Inst{13-13} = Mu2{0-0};
1104 let Inst{4-0} = Rdd32{4-0};
1106 let Inst{20-16} = Rx32{4-0};
1108 class Enc_71f1b4 : OpcodeHexagon {
1110 let Inst{8-5} = Ii{5-2};
1112 let Inst{4-0} = Rdd32{4-0};
1114 let Inst{20-16} = Rx32{4-0};
1116 class Enc_211aaa : OpcodeHexagon {
1118 let Inst{26-25} = Ii{10-9};
1119 let Inst{13-5} = Ii{8-0};
1121 let Inst{20-16} = Rs32{4-0};
1123 let Inst{4-0} = Rd32{4-0};
1125 class Enc_e0a47a : OpcodeHexagon {
1127 let Inst{8-5} = Ii{3-0};
1129 let Inst{13-13} = Mu2{0-0};
1131 let Inst{4-0} = Rd32{4-0};
1133 let Inst{20-16} = Rx32{4-0};
1135 class Enc_222336 : OpcodeHexagon {
1137 let Inst{8-5} = Ii{3-0};
1139 let Inst{4-0} = Rd32{4-0};
1141 let Inst{20-16} = Rx32{4-0};
1143 class Enc_25bef0 : OpcodeHexagon {
1145 let Inst{26-25} = Ii{15-14};
1146 let Inst{20-16} = Ii{13-9};
1147 let Inst{13-5} = Ii{8-0};
1149 let Inst{4-0} = Rd32{4-0};
1151 class Enc_fa3ba4 : OpcodeHexagon {
1153 let Inst{26-25} = Ii{13-12};
1154 let Inst{13-5} = Ii{11-3};
1156 let Inst{20-16} = Rs32{4-0};
1158 let Inst{4-0} = Rdd32{4-0};
1160 class Enc_b05839 : OpcodeHexagon {
1162 let Inst{8-5} = Ii{6-3};
1164 let Inst{13-13} = Mu2{0-0};
1166 let Inst{4-0} = Rdd32{4-0};
1168 let Inst{20-16} = Rx32{4-0};
1170 class Enc_5bdd42 : OpcodeHexagon {
1172 let Inst{8-5} = Ii{6-3};
1174 let Inst{4-0} = Rdd32{4-0};
1176 let Inst{20-16} = Rx32{4-0};
1178 class Enc_509701 : OpcodeHexagon {
1180 let Inst{26-25} = Ii{18-17};
1181 let Inst{20-16} = Ii{16-12};
1182 let Inst{13-5} = Ii{11-3};
1184 let Inst{4-0} = Rdd32{4-0};
1186 class Enc_8df4be : OpcodeHexagon {
1188 let Inst{26-25} = Ii{16-15};
1189 let Inst{20-16} = Ii{14-10};
1190 let Inst{13-5} = Ii{9-1};
1192 let Inst{4-0} = Rd32{4-0};
1194 class Enc_2a3787 : OpcodeHexagon {
1196 let Inst{26-25} = Ii{12-11};
1197 let Inst{13-5} = Ii{10-2};
1199 let Inst{20-16} = Rs32{4-0};
1201 let Inst{4-0} = Rd32{4-0};
1203 class Enc_27fd0e : OpcodeHexagon {
1205 let Inst{8-5} = Ii{5-2};
1207 let Inst{13-13} = Mu2{0-0};
1209 let Inst{4-0} = Rd32{4-0};
1211 let Inst{20-16} = Rx32{4-0};
1213 class Enc_3d920a : OpcodeHexagon {
1215 let Inst{8-5} = Ii{5-2};
1217 let Inst{4-0} = Rd32{4-0};
1219 let Inst{20-16} = Rx32{4-0};
1221 class Enc_4f4ed7 : OpcodeHexagon {
1223 let Inst{26-25} = Ii{17-16};
1224 let Inst{20-16} = Ii{15-11};
1225 let Inst{13-5} = Ii{10-2};
1227 let Inst{4-0} = Rd32{4-0};
1229 class Enc_a21d47 : OpcodeHexagon {
1231 let Inst{10-5} = Ii{5-0};
1233 let Inst{12-11} = Pt4{1-0};
1235 let Inst{20-16} = Rs32{4-0};
1237 let Inst{4-0} = Rd32{4-0};
1239 class Enc_f4413a : OpcodeHexagon {
1241 let Inst{8-5} = Ii{3-0};
1243 let Inst{10-9} = Pt4{1-0};
1245 let Inst{4-0} = Rd32{4-0};
1247 let Inst{20-16} = Rx32{4-0};
1249 class Enc_acd6ed : OpcodeHexagon {
1251 let Inst{10-5} = Ii{8-3};
1253 let Inst{12-11} = Pt4{1-0};
1255 let Inst{20-16} = Rs32{4-0};
1257 let Inst{4-0} = Rdd32{4-0};
1259 class Enc_9d1247 : OpcodeHexagon {
1261 let Inst{8-5} = Ii{6-3};
1263 let Inst{10-9} = Pt4{1-0};
1265 let Inst{4-0} = Rdd32{4-0};
1267 let Inst{20-16} = Rx32{4-0};
1269 class Enc_a198f6 : OpcodeHexagon {
1271 let Inst{10-5} = Ii{6-1};
1273 let Inst{12-11} = Pt4{1-0};
1275 let Inst{20-16} = Rs32{4-0};
1277 let Inst{4-0} = Rd32{4-0};
1279 class Enc_733b27 : OpcodeHexagon {
1281 let Inst{8-5} = Ii{4-1};
1283 let Inst{10-9} = Pt4{1-0};
1285 let Inst{4-0} = Rd32{4-0};
1287 let Inst{20-16} = Rx32{4-0};
1289 class Enc_f82eaf : OpcodeHexagon {
1291 let Inst{10-5} = Ii{7-2};
1293 let Inst{12-11} = Pt4{1-0};
1295 let Inst{20-16} = Rs32{4-0};
1297 let Inst{4-0} = Rd32{4-0};
1299 class Enc_b97f71 : OpcodeHexagon {
1301 let Inst{8-5} = Ii{5-2};
1303 let Inst{10-9} = Pt4{1-0};
1305 let Inst{4-0} = Rd32{4-0};
1307 let Inst{20-16} = Rx32{4-0};
1309 class Enc_d44e31 : OpcodeHexagon {
1311 let Inst{12-7} = Ii{5-0};
1313 let Inst{20-16} = Rs32{4-0};
1315 let Inst{4-0} = Rt32{4-0};
1317 class Enc_163a3c : OpcodeHexagon {
1319 let Inst{12-7} = Ii{6-1};
1321 let Inst{20-16} = Rs32{4-0};
1323 let Inst{4-0} = Rt32{4-0};
1325 class Enc_226535 : OpcodeHexagon {
1327 let Inst{12-7} = Ii{7-2};
1329 let Inst{20-16} = Rs32{4-0};
1331 let Inst{4-0} = Rt32{4-0};
1333 class Enc_46c951 : OpcodeHexagon {
1335 let Inst{12-7} = Ii{5-0};
1337 let Inst{4-0} = II{4-0};
1339 let Inst{20-16} = Rs32{4-0};
1341 class Enc_e66a97 : OpcodeHexagon {
1343 let Inst{12-7} = Ii{6-1};
1345 let Inst{4-0} = II{4-0};
1347 let Inst{20-16} = Rs32{4-0};
1349 class Enc_84b2cd : OpcodeHexagon {
1351 let Inst{12-7} = Ii{7-2};
1353 let Inst{4-0} = II{4-0};
1355 let Inst{20-16} = Rs32{4-0};
1357 class Enc_f394d3 : OpcodeHexagon {
1359 let Inst{11-8} = II{5-2};
1360 let Inst{6-5} = II{1-0};
1362 let Inst{4-0} = Ryy32{4-0};
1364 let Inst{20-16} = Re32{4-0};
1366 class Enc_04c959 : OpcodeHexagon {
1368 let Inst{13-13} = Ii{1-1};
1369 let Inst{7-7} = Ii{0-0};
1371 let Inst{11-8} = II{5-2};
1372 let Inst{6-5} = II{1-0};
1374 let Inst{20-16} = Rt32{4-0};
1376 let Inst{4-0} = Ryy32{4-0};
1378 class Enc_323f2d : OpcodeHexagon {
1380 let Inst{11-8} = II{5-2};
1381 let Inst{6-5} = II{1-0};
1383 let Inst{4-0} = Rd32{4-0};
1385 let Inst{20-16} = Re32{4-0};
1387 class Enc_4f677b : OpcodeHexagon {
1389 let Inst{13-13} = Ii{1-1};
1390 let Inst{7-7} = Ii{0-0};
1392 let Inst{11-8} = II{5-2};
1393 let Inst{6-5} = II{1-0};
1395 let Inst{20-16} = Rt32{4-0};
1397 let Inst{4-0} = Rd32{4-0};
1399 class Enc_7fa7f6 : OpcodeHexagon {
1401 let Inst{11-8} = II{5-2};
1402 let Inst{6-5} = II{1-0};
1404 let Inst{4-0} = Rdd32{4-0};
1406 let Inst{20-16} = Re32{4-0};
1408 class Enc_6185fe : OpcodeHexagon {
1410 let Inst{13-13} = Ii{1-1};
1411 let Inst{7-7} = Ii{0-0};
1413 let Inst{11-8} = II{5-2};
1414 let Inst{6-5} = II{1-0};
1416 let Inst{20-16} = Rt32{4-0};
1418 let Inst{4-0} = Rdd32{4-0};
1420 class Enc_da664b : OpcodeHexagon {
1422 let Inst{13-13} = Ii{1-1};
1423 let Inst{7-7} = Ii{0-0};
1425 let Inst{20-16} = Rs32{4-0};
1427 let Inst{12-8} = Rt32{4-0};
1429 let Inst{4-0} = Rd32{4-0};
1431 class Enc_84bff1 : OpcodeHexagon {
1433 let Inst{13-13} = Ii{1-1};
1434 let Inst{7-7} = Ii{0-0};
1436 let Inst{20-16} = Rs32{4-0};
1438 let Inst{12-8} = Rt32{4-0};
1440 let Inst{4-0} = Rdd32{4-0};
1442 class Enc_2301d6 : OpcodeHexagon {
1444 let Inst{20-16} = Ii{5-1};
1445 let Inst{8-8} = Ii{0-0};
1447 let Inst{10-9} = Pt4{1-0};
1449 let Inst{4-0} = Rd32{4-0};
1451 class Enc_2e1979 : OpcodeHexagon {
1453 let Inst{13-13} = Ii{1-1};
1454 let Inst{7-7} = Ii{0-0};
1456 let Inst{6-5} = Pv4{1-0};
1458 let Inst{20-16} = Rs32{4-0};
1460 let Inst{12-8} = Rt32{4-0};
1462 let Inst{4-0} = Rd32{4-0};
1464 class Enc_2a7b91 : OpcodeHexagon {
1466 let Inst{20-16} = Ii{5-1};
1467 let Inst{8-8} = Ii{0-0};
1469 let Inst{10-9} = Pt4{1-0};
1471 let Inst{4-0} = Rdd32{4-0};
1473 class Enc_98c0b8 : OpcodeHexagon {
1475 let Inst{13-13} = Ii{1-1};
1476 let Inst{7-7} = Ii{0-0};
1478 let Inst{6-5} = Pv4{1-0};
1480 let Inst{20-16} = Rs32{4-0};
1482 let Inst{12-8} = Rt32{4-0};
1484 let Inst{4-0} = Rdd32{4-0};
1486 class Enc_b7fad3 : OpcodeHexagon {
1488 let Inst{9-8} = Pv4{1-0};
1490 let Inst{20-16} = Rs32{4-0};
1492 let Inst{4-0} = Rdd32{4-0};
1494 class Enc_a75aa6 : OpcodeHexagon {
1496 let Inst{20-16} = Rs32{4-0};
1498 let Inst{12-8} = Rt32{4-0};
1500 let Inst{13-13} = Mu2{0-0};
1502 class Enc_c90aca : OpcodeHexagon {
1504 let Inst{12-5} = Ii{7-0};
1506 let Inst{20-16} = Rs32{4-0};
1508 let Inst{4-0} = Rx32{4-0};
1510 class Enc_61f0b0 : OpcodeHexagon {
1512 let Inst{20-16} = Rs32{4-0};
1514 let Inst{12-8} = Rt32{4-0};
1516 let Inst{4-0} = Rxx32{4-0};
1518 class Enc_a568d4 : OpcodeHexagon {
1520 let Inst{12-8} = Rt32{4-0};
1522 let Inst{20-16} = Rs32{4-0};
1524 let Inst{4-0} = Rx32{4-0};
1526 class Enc_3d5b28 : OpcodeHexagon {
1528 let Inst{20-16} = Rss32{4-0};
1530 let Inst{12-8} = Rt32{4-0};
1532 let Inst{4-0} = Rd32{4-0};
1534 class Enc_322e1b : OpcodeHexagon {
1536 let Inst{22-21} = Ii{5-4};
1537 let Inst{13-13} = Ii{3-3};
1538 let Inst{7-5} = Ii{2-0};
1540 let Inst{23-23} = II{5-5};
1541 let Inst{4-0} = II{4-0};
1543 let Inst{20-16} = Rs32{4-0};
1545 let Inst{12-8} = Rd32{4-0};
1547 class Enc_420cf3 : OpcodeHexagon {
1549 let Inst{22-21} = Ii{5-4};
1550 let Inst{13-13} = Ii{3-3};
1551 let Inst{7-5} = Ii{2-0};
1553 let Inst{4-0} = Ru32{4-0};
1555 let Inst{20-16} = Rs32{4-0};
1557 let Inst{12-8} = Rd32{4-0};
1559 class Enc_277737 : OpcodeHexagon {
1561 let Inst{22-21} = Ii{7-6};
1562 let Inst{13-13} = Ii{5-5};
1563 let Inst{7-5} = Ii{4-2};
1565 let Inst{4-0} = Ru32{4-0};
1567 let Inst{20-16} = Rs32{4-0};
1569 let Inst{12-8} = Rd32{4-0};
1571 class Enc_a7b8e8 : OpcodeHexagon {
1573 let Inst{22-21} = Ii{5-4};
1574 let Inst{13-13} = Ii{3-3};
1575 let Inst{7-5} = Ii{2-0};
1577 let Inst{20-16} = Rs32{4-0};
1579 let Inst{12-8} = Rt32{4-0};
1581 let Inst{4-0} = Rd32{4-0};
1583 class Enc_7f1a05 : OpcodeHexagon {
1585 let Inst{4-0} = Ru32{4-0};
1587 let Inst{20-16} = Rs32{4-0};
1589 let Inst{12-8} = Ry32{4-0};
1591 class Enc_1b64fb : OpcodeHexagon {
1593 let Inst{26-25} = Ii{15-14};
1594 let Inst{20-16} = Ii{13-9};
1595 let Inst{13-13} = Ii{8-8};
1596 let Inst{7-0} = Ii{7-0};
1598 let Inst{12-8} = Rt32{4-0};
1600 class Enc_ad1831 : OpcodeHexagon {
1602 let Inst{26-25} = Ii{15-14};
1603 let Inst{20-16} = Ii{13-9};
1604 let Inst{13-13} = Ii{8-8};
1605 let Inst{7-0} = Ii{7-0};
1607 let Inst{10-8} = Nt8{2-0};
1609 class Enc_5c124a : OpcodeHexagon {
1611 let Inst{26-25} = Ii{18-17};
1612 let Inst{20-16} = Ii{16-12};
1613 let Inst{13-13} = Ii{11-11};
1614 let Inst{7-0} = Ii{10-3};
1616 let Inst{12-8} = Rtt32{4-0};
1618 class Enc_fda92c : OpcodeHexagon {
1620 let Inst{26-25} = Ii{16-15};
1621 let Inst{20-16} = Ii{14-10};
1622 let Inst{13-13} = Ii{9-9};
1623 let Inst{7-0} = Ii{8-1};
1625 let Inst{12-8} = Rt32{4-0};
1627 class Enc_bc03e5 : OpcodeHexagon {
1629 let Inst{26-25} = Ii{16-15};
1630 let Inst{20-16} = Ii{14-10};
1631 let Inst{13-13} = Ii{9-9};
1632 let Inst{7-0} = Ii{8-1};
1634 let Inst{10-8} = Nt8{2-0};
1636 class Enc_541f26 : OpcodeHexagon {
1638 let Inst{26-25} = Ii{17-16};
1639 let Inst{20-16} = Ii{15-11};
1640 let Inst{13-13} = Ii{10-10};
1641 let Inst{7-0} = Ii{9-2};
1643 let Inst{12-8} = Rt32{4-0};
1645 class Enc_78cbf0 : OpcodeHexagon {
1647 let Inst{26-25} = Ii{17-16};
1648 let Inst{20-16} = Ii{15-11};
1649 let Inst{13-13} = Ii{10-10};
1650 let Inst{7-0} = Ii{9-2};
1652 let Inst{10-8} = Nt8{2-0};
1654 class Enc_47ef61 : OpcodeHexagon {
1656 let Inst{7-5} = Ii{2-0};
1658 let Inst{12-8} = Rt32{4-0};
1660 let Inst{20-16} = Rs32{4-0};
1662 let Inst{4-0} = Rd32{4-0};
1664 class Enc_22c845 : OpcodeHexagon {
1666 let Inst{10-0} = Ii{13-3};
1668 let Inst{20-16} = Rx32{4-0};
1670 class Enc_70fb07 : OpcodeHexagon {
1672 let Inst{13-8} = Ii{5-0};
1674 let Inst{20-16} = Rss32{4-0};
1676 let Inst{4-0} = Rxx32{4-0};
1678 class Enc_28a2dc : OpcodeHexagon {
1680 let Inst{12-8} = Ii{4-0};
1682 let Inst{20-16} = Rs32{4-0};
1684 let Inst{4-0} = Rx32{4-0};
1686 class Enc_12b6e9 : OpcodeHexagon {
1688 let Inst{11-8} = Ii{3-0};
1690 let Inst{20-16} = Rss32{4-0};
1692 let Inst{4-0} = Rdd32{4-0};
1694 class Enc_1aa186 : OpcodeHexagon {
1696 let Inst{20-16} = Rss32{4-0};
1698 let Inst{12-8} = Rt32{4-0};
1700 let Inst{4-0} = Rxx32{4-0};
1702 class Enc_8dec2e : OpcodeHexagon {
1704 let Inst{12-8} = Ii{4-0};
1706 let Inst{20-16} = Rss32{4-0};
1708 let Inst{4-0} = Rd32{4-0};
1710 class Enc_b388cf : OpcodeHexagon {
1712 let Inst{12-8} = Ii{4-0};
1714 let Inst{22-21} = II{4-3};
1715 let Inst{7-5} = II{2-0};
1717 let Inst{20-16} = Rs32{4-0};
1719 let Inst{4-0} = Rd32{4-0};
1721 class Enc_e07374 : OpcodeHexagon {
1723 let Inst{20-16} = Rs32{4-0};
1725 let Inst{12-8} = Rtt32{4-0};
1727 let Inst{4-0} = Rd32{4-0};
1729 class Enc_b84c4c : OpcodeHexagon {
1731 let Inst{13-8} = Ii{5-0};
1733 let Inst{23-21} = II{5-3};
1734 let Inst{7-5} = II{2-0};
1736 let Inst{20-16} = Rss32{4-0};
1738 let Inst{4-0} = Rdd32{4-0};
1740 class Enc_a1e29d : OpcodeHexagon {
1742 let Inst{12-8} = Ii{4-0};
1744 let Inst{22-21} = II{4-3};
1745 let Inst{7-5} = II{2-0};
1747 let Inst{20-16} = Rs32{4-0};
1749 let Inst{4-0} = Rx32{4-0};
1751 class Enc_179b35 : OpcodeHexagon {
1753 let Inst{20-16} = Rs32{4-0};
1755 let Inst{12-8} = Rtt32{4-0};
1757 let Inst{4-0} = Rx32{4-0};
1759 class Enc_143a3c : OpcodeHexagon {
1761 let Inst{13-8} = Ii{5-0};
1763 let Inst{23-21} = II{5-3};
1764 let Inst{7-5} = II{2-0};
1766 let Inst{20-16} = Rss32{4-0};
1768 let Inst{4-0} = Rxx32{4-0};
1770 class Enc_c85e2a : OpcodeHexagon {
1772 let Inst{12-8} = Ii{4-0};
1774 let Inst{22-21} = II{4-3};
1775 let Inst{7-5} = II{2-0};
1777 let Inst{4-0} = Rd32{4-0};
1779 class Enc_da8d43 : OpcodeHexagon {
1781 let Inst{13-13} = Ii{5-5};
1782 let Inst{7-3} = Ii{4-0};
1784 let Inst{1-0} = Pv4{1-0};
1786 let Inst{20-16} = Rs32{4-0};
1788 let Inst{12-8} = Rt32{4-0};
1790 class Enc_cc449f : OpcodeHexagon {
1792 let Inst{6-3} = Ii{3-0};
1794 let Inst{1-0} = Pv4{1-0};
1796 let Inst{12-8} = Rt32{4-0};
1798 let Inst{20-16} = Rx32{4-0};
1800 class Enc_585242 : OpcodeHexagon {
1802 let Inst{13-13} = Ii{5-5};
1803 let Inst{7-3} = Ii{4-0};
1805 let Inst{1-0} = Pv4{1-0};
1807 let Inst{20-16} = Rs32{4-0};
1809 let Inst{10-8} = Nt8{2-0};
1811 class Enc_52a5dd : OpcodeHexagon {
1813 let Inst{6-3} = Ii{3-0};
1815 let Inst{1-0} = Pv4{1-0};
1817 let Inst{10-8} = Nt8{2-0};
1819 let Inst{20-16} = Rx32{4-0};
1821 class Enc_57a33e : OpcodeHexagon {
1823 let Inst{13-13} = Ii{8-8};
1824 let Inst{7-3} = Ii{7-3};
1826 let Inst{1-0} = Pv4{1-0};
1828 let Inst{20-16} = Rs32{4-0};
1830 let Inst{12-8} = Rtt32{4-0};
1832 class Enc_9a33d5 : OpcodeHexagon {
1834 let Inst{6-3} = Ii{6-3};
1836 let Inst{1-0} = Pv4{1-0};
1838 let Inst{12-8} = Rtt32{4-0};
1840 let Inst{20-16} = Rx32{4-0};
1842 class Enc_e8c45e : OpcodeHexagon {
1844 let Inst{13-13} = Ii{6-6};
1845 let Inst{7-3} = Ii{5-1};
1847 let Inst{1-0} = Pv4{1-0};
1849 let Inst{20-16} = Rs32{4-0};
1851 let Inst{12-8} = Rt32{4-0};
1853 class Enc_b886fd : OpcodeHexagon {
1855 let Inst{6-3} = Ii{4-1};
1857 let Inst{1-0} = Pv4{1-0};
1859 let Inst{12-8} = Rt32{4-0};
1861 let Inst{20-16} = Rx32{4-0};
1863 class Enc_f44229 : OpcodeHexagon {
1865 let Inst{13-13} = Ii{6-6};
1866 let Inst{7-3} = Ii{5-1};
1868 let Inst{1-0} = Pv4{1-0};
1870 let Inst{20-16} = Rs32{4-0};
1872 let Inst{10-8} = Nt8{2-0};
1874 class Enc_31aa6a : OpcodeHexagon {
1876 let Inst{6-3} = Ii{4-1};
1878 let Inst{1-0} = Pv4{1-0};
1880 let Inst{10-8} = Nt8{2-0};
1882 let Inst{20-16} = Rx32{4-0};
1884 class Enc_397f23 : OpcodeHexagon {
1886 let Inst{13-13} = Ii{7-7};
1887 let Inst{7-3} = Ii{6-2};
1889 let Inst{1-0} = Pv4{1-0};
1891 let Inst{20-16} = Rs32{4-0};
1893 let Inst{12-8} = Rt32{4-0};
1895 class Enc_7eaeb6 : OpcodeHexagon {
1897 let Inst{6-3} = Ii{5-2};
1899 let Inst{1-0} = Pv4{1-0};
1901 let Inst{12-8} = Rt32{4-0};
1903 let Inst{20-16} = Rx32{4-0};
1905 class Enc_8dbdfe : OpcodeHexagon {
1907 let Inst{13-13} = Ii{7-7};
1908 let Inst{7-3} = Ii{6-2};
1910 let Inst{1-0} = Pv4{1-0};
1912 let Inst{20-16} = Rs32{4-0};
1914 let Inst{10-8} = Nt8{2-0};
1916 class Enc_65f095 : OpcodeHexagon {
1918 let Inst{6-3} = Ii{5-2};
1920 let Inst{1-0} = Pv4{1-0};
1922 let Inst{10-8} = Nt8{2-0};
1924 let Inst{20-16} = Rx32{4-0};
1926 class Enc_448f7f : OpcodeHexagon {
1928 let Inst{26-25} = Ii{10-9};
1929 let Inst{13-13} = Ii{8-8};
1930 let Inst{7-0} = Ii{7-0};
1932 let Inst{20-16} = Rs32{4-0};
1934 let Inst{12-8} = Rt32{4-0};
1936 class Enc_d5c73f : OpcodeHexagon {
1938 let Inst{13-13} = Mu2{0-0};
1940 let Inst{12-8} = Rt32{4-0};
1942 let Inst{20-16} = Rx32{4-0};
1944 class Enc_b15941 : OpcodeHexagon {
1946 let Inst{6-3} = Ii{3-0};
1948 let Inst{13-13} = Mu2{0-0};
1950 let Inst{12-8} = Rt32{4-0};
1952 let Inst{20-16} = Rx32{4-0};
1954 class Enc_10bc21 : OpcodeHexagon {
1956 let Inst{6-3} = Ii{3-0};
1958 let Inst{12-8} = Rt32{4-0};
1960 let Inst{20-16} = Rx32{4-0};
1962 class Enc_4df4e9 : OpcodeHexagon {
1964 let Inst{26-25} = Ii{10-9};
1965 let Inst{13-13} = Ii{8-8};
1966 let Inst{7-0} = Ii{7-0};
1968 let Inst{20-16} = Rs32{4-0};
1970 let Inst{10-8} = Nt8{2-0};
1972 class Enc_8dbe85 : OpcodeHexagon {
1974 let Inst{13-13} = Mu2{0-0};
1976 let Inst{10-8} = Nt8{2-0};
1978 let Inst{20-16} = Rx32{4-0};
1980 class Enc_96ce4f : OpcodeHexagon {
1982 let Inst{6-3} = Ii{3-0};
1984 let Inst{13-13} = Mu2{0-0};
1986 let Inst{10-8} = Nt8{2-0};
1988 let Inst{20-16} = Rx32{4-0};
1990 class Enc_c7cd90 : OpcodeHexagon {
1992 let Inst{6-3} = Ii{3-0};
1994 let Inst{10-8} = Nt8{2-0};
1996 let Inst{20-16} = Rx32{4-0};
1998 class Enc_ce6828 : OpcodeHexagon {
2000 let Inst{26-25} = Ii{13-12};
2001 let Inst{13-13} = Ii{11-11};
2002 let Inst{7-0} = Ii{10-3};
2004 let Inst{20-16} = Rs32{4-0};
2006 let Inst{12-8} = Rtt32{4-0};
2008 class Enc_928ca1 : OpcodeHexagon {
2010 let Inst{13-13} = Mu2{0-0};
2012 let Inst{12-8} = Rtt32{4-0};
2014 let Inst{20-16} = Rx32{4-0};
2016 class Enc_395cc4 : OpcodeHexagon {
2018 let Inst{6-3} = Ii{6-3};
2020 let Inst{13-13} = Mu2{0-0};
2022 let Inst{12-8} = Rtt32{4-0};
2024 let Inst{20-16} = Rx32{4-0};
2026 class Enc_85bf58 : OpcodeHexagon {
2028 let Inst{6-3} = Ii{6-3};
2030 let Inst{12-8} = Rtt32{4-0};
2032 let Inst{20-16} = Rx32{4-0};
2034 class Enc_e957fb : OpcodeHexagon {
2036 let Inst{26-25} = Ii{11-10};
2037 let Inst{13-13} = Ii{9-9};
2038 let Inst{7-0} = Ii{8-1};
2040 let Inst{20-16} = Rs32{4-0};
2042 let Inst{12-8} = Rt32{4-0};
2044 class Enc_935d9b : OpcodeHexagon {
2046 let Inst{6-3} = Ii{4-1};
2048 let Inst{13-13} = Mu2{0-0};
2050 let Inst{12-8} = Rt32{4-0};
2052 let Inst{20-16} = Rx32{4-0};
2054 class Enc_052c7d : OpcodeHexagon {
2056 let Inst{6-3} = Ii{4-1};
2058 let Inst{12-8} = Rt32{4-0};
2060 let Inst{20-16} = Rx32{4-0};
2062 class Enc_0d8870 : OpcodeHexagon {
2064 let Inst{26-25} = Ii{11-10};
2065 let Inst{13-13} = Ii{9-9};
2066 let Inst{7-0} = Ii{8-1};
2068 let Inst{20-16} = Rs32{4-0};
2070 let Inst{10-8} = Nt8{2-0};
2072 class Enc_91b9fe : OpcodeHexagon {
2074 let Inst{6-3} = Ii{4-1};
2076 let Inst{13-13} = Mu2{0-0};
2078 let Inst{10-8} = Nt8{2-0};
2080 let Inst{20-16} = Rx32{4-0};
2082 class Enc_e26546 : OpcodeHexagon {
2084 let Inst{6-3} = Ii{4-1};
2086 let Inst{10-8} = Nt8{2-0};
2088 let Inst{20-16} = Rx32{4-0};
2090 class Enc_143445 : OpcodeHexagon {
2092 let Inst{26-25} = Ii{12-11};
2093 let Inst{13-13} = Ii{10-10};
2094 let Inst{7-0} = Ii{9-2};
2096 let Inst{20-16} = Rs32{4-0};
2098 let Inst{12-8} = Rt32{4-0};
2100 class Enc_79b8c8 : OpcodeHexagon {
2102 let Inst{6-3} = Ii{5-2};
2104 let Inst{13-13} = Mu2{0-0};
2106 let Inst{12-8} = Rt32{4-0};
2108 let Inst{20-16} = Rx32{4-0};
2110 class Enc_db40cd : OpcodeHexagon {
2112 let Inst{6-3} = Ii{5-2};
2114 let Inst{12-8} = Rt32{4-0};
2116 let Inst{20-16} = Rx32{4-0};
2118 class Enc_690862 : OpcodeHexagon {
2120 let Inst{26-25} = Ii{12-11};
2121 let Inst{13-13} = Ii{10-10};
2122 let Inst{7-0} = Ii{9-2};
2124 let Inst{20-16} = Rs32{4-0};
2126 let Inst{10-8} = Nt8{2-0};
2128 class Enc_3f97c8 : OpcodeHexagon {
2130 let Inst{6-3} = Ii{5-2};
2132 let Inst{13-13} = Mu2{0-0};
2134 let Inst{10-8} = Nt8{2-0};
2136 let Inst{20-16} = Rx32{4-0};
2138 class Enc_223005 : OpcodeHexagon {
2140 let Inst{6-3} = Ii{5-2};
2142 let Inst{10-8} = Nt8{2-0};
2144 let Inst{20-16} = Rx32{4-0};
2146 class Enc_cd82bc : OpcodeHexagon {
2148 let Inst{21-21} = Ii{3-3};
2149 let Inst{7-5} = Ii{2-0};
2151 let Inst{13-8} = II{5-0};
2153 let Inst{20-16} = Rs32{4-0};
2155 let Inst{4-0} = Rx32{4-0};
2157 class Enc_729ff7 : OpcodeHexagon {
2159 let Inst{7-5} = Ii{2-0};
2161 let Inst{12-8} = Rtt32{4-0};
2163 let Inst{20-16} = Rss32{4-0};
2165 let Inst{4-0} = Rdd32{4-0};
2167 class Enc_8c6530 : OpcodeHexagon {
2169 let Inst{12-8} = Rtt32{4-0};
2171 let Inst{20-16} = Rss32{4-0};
2173 let Inst{6-5} = Pu4{1-0};
2175 let Inst{4-0} = Rdd32{4-0};
2177 class Enc_d50cd3 : OpcodeHexagon {
2179 let Inst{7-5} = Ii{2-0};
2181 let Inst{20-16} = Rss32{4-0};
2183 let Inst{12-8} = Rtt32{4-0};
2185 let Inst{4-0} = Rdd32{4-0};
2187 class Enc_dbd70c : OpcodeHexagon {
2189 let Inst{20-16} = Rss32{4-0};
2191 let Inst{12-8} = Rtt32{4-0};
2193 let Inst{6-5} = Pu4{1-0};
2195 let Inst{4-0} = Rdd32{4-0};
2197 class Enc_8b8d61 : OpcodeHexagon {
2199 let Inst{22-21} = Ii{5-4};
2200 let Inst{13-13} = Ii{3-3};
2201 let Inst{7-5} = Ii{2-0};
2203 let Inst{20-16} = Rs32{4-0};
2205 let Inst{4-0} = Ru32{4-0};
2207 let Inst{12-8} = Rd32{4-0};
2209 class Enc_c31910 : OpcodeHexagon {
2211 let Inst{23-21} = Ii{7-5};
2212 let Inst{13-13} = Ii{4-4};
2213 let Inst{7-5} = Ii{3-1};
2214 let Inst{3-3} = Ii{0-0};
2216 let Inst{12-8} = II{4-0};
2218 let Inst{20-16} = Rx32{4-0};
2220 class Enc_9fae8a : OpcodeHexagon {
2222 let Inst{13-8} = Ii{5-0};
2224 let Inst{20-16} = Rs32{4-0};
2226 let Inst{4-0} = Rd32{4-0};
2228 class Enc_a1640c : OpcodeHexagon {
2230 let Inst{13-8} = Ii{5-0};
2232 let Inst{20-16} = Rss32{4-0};
2234 let Inst{4-0} = Rd32{4-0};
2236 class Enc_fef969 : OpcodeHexagon {
2238 let Inst{20-16} = Ii{5-1};
2239 let Inst{5-5} = Ii{0-0};
2241 let Inst{12-8} = Rt32{4-0};
2243 let Inst{4-0} = Rd32{4-0};
2245 class Enc_b0e9d8 : OpcodeHexagon {
2247 let Inst{21-21} = Ii{9-9};
2248 let Inst{13-5} = Ii{8-0};
2250 let Inst{20-16} = Rs32{4-0};
2252 let Inst{4-0} = Rx32{4-0};
2254 class Enc_b4e6cf : OpcodeHexagon {
2256 let Inst{21-21} = Ii{9-9};
2257 let Inst{13-5} = Ii{8-0};
2259 let Inst{4-0} = Ru32{4-0};
2261 let Inst{20-16} = Rx32{4-0};
2263 class Enc_1cf4ca : OpcodeHexagon {
2265 let Inst{17-16} = Ii{5-4};
2266 let Inst{6-3} = Ii{3-0};
2268 let Inst{1-0} = Pv4{1-0};
2270 let Inst{12-8} = Rt32{4-0};
2272 class Enc_6339d5 : OpcodeHexagon {
2274 let Inst{13-13} = Ii{1-1};
2275 let Inst{7-7} = Ii{0-0};
2277 let Inst{6-5} = Pv4{1-0};
2279 let Inst{20-16} = Rs32{4-0};
2281 let Inst{12-8} = Ru32{4-0};
2283 let Inst{4-0} = Rt32{4-0};
2285 class Enc_44215c : OpcodeHexagon {
2287 let Inst{17-16} = Ii{5-4};
2288 let Inst{6-3} = Ii{3-0};
2290 let Inst{1-0} = Pv4{1-0};
2292 let Inst{10-8} = Nt8{2-0};
2294 class Enc_47ee5e : OpcodeHexagon {
2296 let Inst{13-13} = Ii{1-1};
2297 let Inst{7-7} = Ii{0-0};
2299 let Inst{6-5} = Pv4{1-0};
2301 let Inst{20-16} = Rs32{4-0};
2303 let Inst{12-8} = Ru32{4-0};
2305 let Inst{2-0} = Nt8{2-0};
2307 class Enc_50b5ac : OpcodeHexagon {
2309 let Inst{17-16} = Ii{5-4};
2310 let Inst{6-3} = Ii{3-0};
2312 let Inst{1-0} = Pv4{1-0};
2314 let Inst{12-8} = Rtt32{4-0};
2316 class Enc_1a9974 : OpcodeHexagon {
2318 let Inst{13-13} = Ii{1-1};
2319 let Inst{7-7} = Ii{0-0};
2321 let Inst{6-5} = Pv4{1-0};
2323 let Inst{20-16} = Rs32{4-0};
2325 let Inst{12-8} = Ru32{4-0};
2327 let Inst{4-0} = Rtt32{4-0};
2329 class Enc_d7dc10 : OpcodeHexagon {
2331 let Inst{20-16} = Rs32{4-0};
2333 let Inst{12-8} = Rtt32{4-0};
2335 let Inst{1-0} = Pd4{1-0};
2337 class Enc_8203bb : OpcodeHexagon {
2339 let Inst{12-7} = Ii{5-0};
2341 let Inst{13-13} = II{7-7};
2342 let Inst{6-0} = II{6-0};
2344 let Inst{20-16} = Rs32{4-0};
2346 class Enc_d7a65e : OpcodeHexagon {
2348 let Inst{12-7} = Ii{5-0};
2350 let Inst{13-13} = II{5-5};
2351 let Inst{4-0} = II{4-0};
2353 let Inst{6-5} = Pv4{1-0};
2355 let Inst{20-16} = Rs32{4-0};
2357 class Enc_a803e0 : OpcodeHexagon {
2359 let Inst{12-7} = Ii{6-1};
2361 let Inst{13-13} = II{7-7};
2362 let Inst{6-0} = II{6-0};
2364 let Inst{20-16} = Rs32{4-0};
2366 class Enc_f20719 : OpcodeHexagon {
2368 let Inst{12-7} = Ii{6-1};
2370 let Inst{13-13} = II{5-5};
2371 let Inst{4-0} = II{4-0};
2373 let Inst{6-5} = Pv4{1-0};
2375 let Inst{20-16} = Rs32{4-0};
2377 class Enc_f37377 : OpcodeHexagon {
2379 let Inst{12-7} = Ii{7-2};
2381 let Inst{13-13} = II{7-7};
2382 let Inst{6-0} = II{6-0};
2384 let Inst{20-16} = Rs32{4-0};
2386 class Enc_5ccba9 : OpcodeHexagon {
2388 let Inst{12-7} = Ii{7-2};
2390 let Inst{13-13} = II{5-5};
2391 let Inst{4-0} = II{4-0};
2393 let Inst{6-5} = Pv4{1-0};
2395 let Inst{20-16} = Rs32{4-0};
2397 class Enc_8bcba4 : OpcodeHexagon {
2399 let Inst{5-0} = II{5-0};
2401 let Inst{12-8} = Rt32{4-0};
2403 let Inst{20-16} = Re32{4-0};
2405 class Enc_eca7c8 : OpcodeHexagon {
2407 let Inst{13-13} = Ii{1-1};
2408 let Inst{7-7} = Ii{0-0};
2410 let Inst{20-16} = Rs32{4-0};
2412 let Inst{12-8} = Ru32{4-0};
2414 let Inst{4-0} = Rt32{4-0};
2416 class Enc_9ea4cf : OpcodeHexagon {
2418 let Inst{13-13} = Ii{1-1};
2419 let Inst{6-6} = Ii{0-0};
2421 let Inst{5-0} = II{5-0};
2423 let Inst{20-16} = Ru32{4-0};
2425 let Inst{12-8} = Rt32{4-0};
2427 class Enc_724154 : OpcodeHexagon {
2429 let Inst{5-0} = II{5-0};
2431 let Inst{10-8} = Nt8{2-0};
2433 let Inst{20-16} = Re32{4-0};
2435 class Enc_c6220b : OpcodeHexagon {
2437 let Inst{13-13} = Ii{1-1};
2438 let Inst{7-7} = Ii{0-0};
2440 let Inst{20-16} = Rs32{4-0};
2442 let Inst{12-8} = Ru32{4-0};
2444 let Inst{2-0} = Nt8{2-0};
2446 class Enc_7eb485 : OpcodeHexagon {
2448 let Inst{13-13} = Ii{1-1};
2449 let Inst{6-6} = Ii{0-0};
2451 let Inst{5-0} = II{5-0};
2453 let Inst{20-16} = Ru32{4-0};
2455 let Inst{10-8} = Nt8{2-0};
2457 class Enc_c7a204 : OpcodeHexagon {
2459 let Inst{5-0} = II{5-0};
2461 let Inst{12-8} = Rtt32{4-0};
2463 let Inst{20-16} = Re32{4-0};
2465 class Enc_55355c : OpcodeHexagon {
2467 let Inst{13-13} = Ii{1-1};
2468 let Inst{7-7} = Ii{0-0};
2470 let Inst{20-16} = Rs32{4-0};
2472 let Inst{12-8} = Ru32{4-0};
2474 let Inst{4-0} = Rtt32{4-0};
2476 class Enc_f79415 : OpcodeHexagon {
2478 let Inst{13-13} = Ii{1-1};
2479 let Inst{6-6} = Ii{0-0};
2481 let Inst{5-0} = II{5-0};
2483 let Inst{20-16} = Ru32{4-0};
2485 let Inst{12-8} = Rtt32{4-0};
2487 class Enc_645d54 : OpcodeHexagon {
2489 let Inst{13-13} = Ii{1-1};
2490 let Inst{5-5} = Ii{0-0};
2492 let Inst{20-16} = Rss32{4-0};
2494 let Inst{12-8} = Rt32{4-0};
2496 let Inst{4-0} = Rdd32{4-0};
2498 class Enc_b72622 : OpcodeHexagon {
2500 let Inst{13-13} = Ii{1-1};
2501 let Inst{5-5} = Ii{0-0};
2503 let Inst{20-16} = Rss32{4-0};
2505 let Inst{12-8} = Rt32{4-0};
2507 let Inst{4-0} = Rxx32{4-0};
2509 class Enc_11a146 : OpcodeHexagon {
2511 let Inst{11-8} = Ii{3-0};
2513 let Inst{20-16} = Rss32{4-0};
2515 let Inst{4-0} = Rd32{4-0};
2517 class Enc_93af4c : OpcodeHexagon {
2519 let Inst{10-4} = Ii{6-0};
2521 let Inst{3-0} = Rx16{3-0};
2523 class Enc_0527db : OpcodeHexagon {
2525 let Inst{7-4} = Rs16{3-0};
2527 let Inst{3-0} = Rx16{3-0};
2529 class Enc_2df31d : OpcodeHexagon {
2531 let Inst{9-4} = Ii{7-2};
2533 let Inst{3-0} = Rd16{3-0};
2535 class Enc_97d666 : OpcodeHexagon {
2537 let Inst{7-4} = Rs16{3-0};
2539 let Inst{3-0} = Rd16{3-0};
2541 class Enc_1f5ba6 : OpcodeHexagon {
2543 let Inst{3-0} = Rd16{3-0};
2545 class Enc_63eaeb : OpcodeHexagon {
2547 let Inst{1-0} = Ii{1-0};
2549 let Inst{7-4} = Rs16{3-0};
2551 class Enc_ed48be : OpcodeHexagon {
2553 let Inst{6-5} = Ii{1-0};
2555 let Inst{2-0} = Rdd8{2-0};
2557 class Enc_399e12 : OpcodeHexagon {
2559 let Inst{7-4} = Rs16{3-0};
2561 let Inst{2-0} = Rdd8{2-0};
2563 class Enc_ee5ed0 : OpcodeHexagon {
2565 let Inst{7-4} = Rs16{3-0};
2567 let Inst{3-0} = Rd16{3-0};
2569 let Inst{9-8} = n1{1-0};
2571 class Enc_e39bb2 : OpcodeHexagon {
2573 let Inst{9-4} = Ii{5-0};
2575 let Inst{3-0} = Rd16{3-0};
2577 class Enc_7a0ea6 : OpcodeHexagon {
2579 let Inst{3-0} = Rd16{3-0};
2581 let Inst{9-9} = n1{0-0};
2583 class Enc_53dca9 : OpcodeHexagon {
2585 let Inst{11-8} = Ii{5-2};
2587 let Inst{7-4} = Rs16{3-0};
2589 let Inst{3-0} = Rd16{3-0};
2591 class Enc_c175d0 : OpcodeHexagon {
2593 let Inst{11-8} = Ii{3-0};
2595 let Inst{7-4} = Rs16{3-0};
2597 let Inst{3-0} = Rd16{3-0};
2599 class Enc_2fbf3c : OpcodeHexagon {
2601 let Inst{10-8} = Ii{2-0};
2603 let Inst{7-4} = Rs16{3-0};
2605 let Inst{3-0} = Rd16{3-0};
2607 class Enc_86a14b : OpcodeHexagon {
2609 let Inst{7-3} = Ii{7-3};
2611 let Inst{2-0} = Rdd8{2-0};
2613 class Enc_2bae10 : OpcodeHexagon {
2615 let Inst{10-8} = Ii{3-1};
2617 let Inst{7-4} = Rs16{3-0};
2619 let Inst{3-0} = Rd16{3-0};
2621 class Enc_51635c : OpcodeHexagon {
2623 let Inst{8-4} = Ii{6-2};
2625 let Inst{3-0} = Rd16{3-0};
2627 class Enc_b38ffc : OpcodeHexagon {
2629 let Inst{11-8} = Ii{3-0};
2631 let Inst{7-4} = Rs16{3-0};
2633 let Inst{3-0} = Rt16{3-0};
2635 class Enc_f55a0c : OpcodeHexagon {
2637 let Inst{11-8} = Ii{5-2};
2639 let Inst{7-4} = Rs16{3-0};
2641 let Inst{3-0} = Rt16{3-0};
2643 class Enc_6f70ca : OpcodeHexagon {
2645 let Inst{8-4} = Ii{7-3};
2647 class Enc_84d359 : OpcodeHexagon {
2649 let Inst{3-0} = Ii{3-0};
2651 let Inst{7-4} = Rs16{3-0};
2653 class Enc_b8309d : OpcodeHexagon {
2655 let Inst{8-3} = Ii{8-3};
2657 let Inst{2-0} = Rtt8{2-0};
2659 class Enc_625deb : OpcodeHexagon {
2661 let Inst{10-8} = Ii{3-1};
2663 let Inst{7-4} = Rs16{3-0};
2665 let Inst{3-0} = Rt16{3-0};
2667 class Enc_87c142 : OpcodeHexagon {
2669 let Inst{8-4} = Ii{6-2};
2671 let Inst{3-0} = Rt16{3-0};
2673 class Enc_a6ce9c : OpcodeHexagon {
2675 let Inst{3-0} = Ii{5-2};
2677 let Inst{7-4} = Rs16{3-0};
2679 class Enc_2146c1 : OpcodeHexagon {
2681 let Inst{20-16} = Vuu32{4-0};
2683 let Inst{12-8} = Vvv32{4-0};
2685 let Inst{2-0} = Qss8{2-0};
2687 let Inst{7-3} = Vd32{4-0};
2689 class Enc_843e80 : OpcodeHexagon {
2691 let Inst{12-8} = Vu32{4-0};
2693 let Inst{20-16} = Rt32{4-0};
2695 let Inst{7-3} = Vd32{4-0};
2697 let Inst{2-0} = Qxx8{2-0};
2699 class Enc_1f3376 : OpcodeHexagon {
2701 let Inst{20-16} = Vu32{4-0};
2703 let Inst{12-8} = Vv32{4-0};
2705 let Inst{7-3} = Vxx32{4-0};
2707 class Enc_8e9fbd : OpcodeHexagon {
2709 let Inst{20-16} = Vu32{4-0};
2711 let Inst{2-0} = Rt8{2-0};
2713 let Inst{7-3} = Vd32{4-0};
2715 let Inst{12-8} = Vy32{4-0};
2717 class Enc_57e245 : OpcodeHexagon {
2719 let Inst{20-16} = Vu32{4-0};
2721 let Inst{2-0} = Rt8{2-0};
2723 let Inst{7-3} = Vdd32{4-0};
2725 let Inst{12-8} = Vy32{4-0};
2727 class Enc_274a4c : OpcodeHexagon {
2729 let Inst{20-16} = Vu32{4-0};
2731 let Inst{2-0} = Rt8{2-0};
2733 let Inst{7-3} = Vx32{4-0};
2735 let Inst{12-8} = Vy32{4-0};
2737 class Enc_fbacc2 : OpcodeHexagon {
2739 let Inst{20-16} = Vu32{4-0};
2741 let Inst{2-0} = Rt8{2-0};
2743 let Inst{7-3} = Vxx32{4-0};
2745 let Inst{12-8} = Vy32{4-0};
2747 class Enc_2a736a : OpcodeHexagon {
2749 let Inst{20-16} = Vuu32{4-0};
2751 let Inst{7-3} = Vdd32{4-0};
2753 class Enc_b8513b : OpcodeHexagon {
2755 let Inst{20-16} = Vuu32{4-0};
2757 let Inst{12-8} = Vvv32{4-0};
2759 let Inst{7-3} = Vdd32{4-0};
2761 class Enc_b5e54d : OpcodeHexagon {
2763 let Inst{12-8} = Vu32{4-0};
2765 let Inst{20-16} = Rs32{4-0};
2767 let Inst{4-0} = Rdd32{4-0};
2769 class Enc_50e578 : OpcodeHexagon {
2771 let Inst{12-8} = Vu32{4-0};
2773 let Inst{20-16} = Rs32{4-0};
2775 let Inst{4-0} = Rd32{4-0};
2777 class Enc_b5b643 : OpcodeHexagon {
2779 let Inst{20-16} = Rtt32{4-0};
2781 let Inst{7-3} = Vx32{4-0};
2783 class Enc_2516bf : OpcodeHexagon {
2785 let Inst{20-16} = Vu32{4-0};
2787 let Inst{7-3} = Vd32{4-0};
2789 class Enc_8d04c3 : OpcodeHexagon {
2791 let Inst{20-16} = Vu32{4-0};
2793 let Inst{12-8} = Vv32{4-0};
2795 let Inst{7-3} = Vd32{4-0};
2797 class Enc_2ad23d : OpcodeHexagon {
2799 let Inst{20-16} = Vu32{4-0};
2801 let Inst{12-8} = Vv32{4-0};
2803 let Inst{7-3} = Vx32{4-0};
2805 class Enc_85daf5 : OpcodeHexagon {
2807 let Inst{12-8} = Vu32{4-0};
2809 let Inst{20-16} = Rtt32{4-0};
2811 let Inst{7-3} = Vx32{4-0};
2813 class Enc_e570b0 : OpcodeHexagon {
2815 let Inst{20-16} = Rtt32{4-0};
2817 let Inst{7-3} = Vdd32{4-0};
2819 class Enc_41dcc3 : OpcodeHexagon {
2821 let Inst{20-16} = Rt32{4-0};
2823 let Inst{7-3} = Vdd32{4-0};
2825 class Enc_3126d7 : OpcodeHexagon {
2827 let Inst{20-16} = Vu32{4-0};
2829 let Inst{12-8} = Vv32{4-0};
2831 let Inst{7-3} = Vdd32{4-0};
2833 class Enc_1cd70f : OpcodeHexagon {
2835 let Inst{20-16} = Vu32{4-0};
2837 let Inst{12-8} = Vv32{4-0};
2839 let Inst{2-0} = Rt8{2-0};
2841 let Inst{7-3} = Vd32{4-0};
2843 class Enc_12dd8f : OpcodeHexagon {
2845 let Inst{20-16} = Vu32{4-0};
2847 let Inst{12-8} = Vv32{4-0};
2849 let Inst{2-0} = Rt8{2-0};
2851 let Inst{7-3} = Vx32{4-0};
2853 class Enc_8d5d98 : OpcodeHexagon {
2855 let Inst{20-16} = Vu32{4-0};
2857 let Inst{12-8} = Vv32{4-0};
2859 let Inst{2-0} = Rt8{2-0};
2861 let Inst{7-3} = Vxx32{4-0};
2863 class Enc_fc563d : OpcodeHexagon {
2865 let Inst{20-16} = Vuu32{4-0};
2867 let Inst{12-8} = Vv32{4-0};
2869 let Inst{7-3} = Vd32{4-0};
2871 class Enc_c84567 : OpcodeHexagon {
2873 let Inst{20-16} = Vuu32{4-0};
2875 let Inst{12-8} = Vv32{4-0};
2877 let Inst{7-3} = Vdd32{4-0};
2879 class Enc_334c2b : OpcodeHexagon {
2881 let Inst{12-8} = Vuu32{4-0};
2883 let Inst{20-16} = Rt32{4-0};
2885 let Inst{7-3} = Vd32{4-0};
2887 class Enc_3c46e8 : OpcodeHexagon {
2889 let Inst{12-8} = Vuu32{4-0};
2891 let Inst{20-16} = Rt32{4-0};
2893 let Inst{7-3} = Vdd32{4-0};
2895 class Enc_129701 : OpcodeHexagon {
2897 let Inst{20-16} = Vuu32{4-0};
2899 let Inst{12-8} = Vvv32{4-0};
2901 let Inst{7-3} = Vd32{4-0};
2903 class Enc_790d6e : OpcodeHexagon {
2905 let Inst{20-16} = Rt32{4-0};
2907 let Inst{7-3} = Vd32{4-0};
2909 class Enc_880793 : OpcodeHexagon {
2911 let Inst{2-0} = Qt8{2-0};
2913 let Inst{20-16} = Vu32{4-0};
2915 let Inst{12-8} = Vv32{4-0};
2917 let Inst{7-3} = Vdd32{4-0};
2919 class Enc_a265b7 : OpcodeHexagon {
2921 let Inst{20-16} = Vuu32{4-0};
2923 let Inst{7-3} = Vd32{4-0};
2925 class Enc_6b1bc4 : OpcodeHexagon {
2927 let Inst{20-16} = Vuu32{4-0};
2929 let Inst{10-8} = Qt8{2-0};
2931 let Inst{7-3} = Vdd32{4-0};
2933 class Enc_b2ffce : OpcodeHexagon {
2935 let Inst{7-3} = Vd32{4-0};
2937 class Enc_fde0e3 : OpcodeHexagon {
2939 let Inst{20-16} = Rtt32{4-0};
2941 let Inst{7-3} = Vd32{4-0};
2943 class Enc_b3bac4 : OpcodeHexagon {
2945 let Inst{12-8} = Vu32{4-0};
2947 let Inst{20-16} = Rtt32{4-0};
2949 let Inst{7-3} = Vd32{4-0};
2951 class Enc_e7c9de : OpcodeHexagon {
2953 let Inst{20-16} = Vu32{4-0};
2955 class Enc_5c3a80 : OpcodeHexagon {
2957 let Inst{10-8} = Qt8{2-0};
2959 let Inst{5-3} = Qd8{2-0};
2961 class Enc_8f7cc3 : OpcodeHexagon {
2963 let Inst{10-8} = Qtt8{2-0};
2965 let Inst{5-3} = Qdd8{2-0};
2967 class Enc_f106e0 : OpcodeHexagon {
2969 let Inst{20-16} = Vu32{4-0};
2971 let Inst{8-4} = Vv32{4-0};
2973 let Inst{13-9} = Vt32{4-0};
2975 let Inst{3-0} = Vdd16{3-0};
2977 class Enc_7db2f8 : OpcodeHexagon {
2979 let Inst{13-9} = Vu32{4-0};
2981 let Inst{8-4} = Vv32{4-0};
2983 let Inst{3-0} = Vdd16{3-0};
2985 let Inst{20-16} = Rx32{4-0};
2987 class Enc_37c406 : OpcodeHexagon {
2989 let Inst{20-16} = Vu32{4-0};
2991 let Inst{12-8} = Vv32{4-0};
2993 let Inst{2-0} = Rt8{2-0};
2995 let Inst{7-4} = Vdd16{3-0};
2997 class Enc_72a92d : OpcodeHexagon {
2999 let Inst{12-8} = Vuu32{4-0};
3001 let Inst{20-16} = Rt32{4-0};
3003 let Inst{7-3} = Vxx32{4-0};
3005 class Enc_d7e8ba : OpcodeHexagon {
3007 let Inst{20-16} = Vu32{4-0};
3009 let Inst{7-3} = Vdd32{4-0};
3011 class Enc_ce4c54 : OpcodeHexagon {
3013 let Inst{21-21} = Ii{15-15};
3014 let Inst{13-8} = Ii{14-9};
3015 let Inst{2-0} = Ii{8-6};
3017 let Inst{20-16} = Rt32{4-0};
3019 let Inst{7-3} = Vd32{4-0};
3021 class Enc_3a81ac : OpcodeHexagon {
3023 let Inst{13-13} = Mu2{0-0};
3025 let Inst{7-3} = Vd32{4-0};
3027 let Inst{20-16} = Rx32{4-0};
3029 class Enc_6c4697 : OpcodeHexagon {
3031 let Inst{13-13} = Mu2{0-0};
3033 let Inst{12-8} = Rt32{4-0};
3035 let Inst{7-3} = Vd32{4-0};
3037 let Inst{20-16} = Rx32{4-0};
3039 class Enc_b0e553 : OpcodeHexagon {
3041 let Inst{21-21} = Ii{15-15};
3042 let Inst{13-8} = Ii{14-9};
3043 let Inst{2-0} = Ii{8-6};
3045 let Inst{7-3} = Vd32{4-0};
3047 let Inst{20-16} = Rx32{4-0};
3049 class Enc_5883d0 : OpcodeHexagon {
3051 let Inst{21-21} = Ii{15-15};
3052 let Inst{13-8} = Ii{14-9};
3053 let Inst{2-0} = Ii{8-6};
3055 let Inst{20-16} = Rt32{4-0};
3057 let Inst{7-3} = Vdd32{4-0};
3059 class Enc_9a895f : OpcodeHexagon {
3061 let Inst{13-13} = Mu2{0-0};
3063 let Inst{7-3} = Vdd32{4-0};
3065 let Inst{20-16} = Rx32{4-0};
3067 class Enc_f3adb6 : OpcodeHexagon {
3069 let Inst{21-21} = Ii{15-15};
3070 let Inst{13-8} = Ii{14-9};
3071 let Inst{2-0} = Ii{8-6};
3073 let Inst{7-3} = Vdd32{4-0};
3075 let Inst{20-16} = Rx32{4-0};
3077 class Enc_b5d5a7 : OpcodeHexagon {
3079 let Inst{21-21} = Ii{15-15};
3080 let Inst{13-8} = Ii{14-9};
3081 let Inst{2-0} = Ii{8-6};
3083 let Inst{20-16} = Rt32{4-0};
3085 let Inst{7-3} = Vs32{4-0};
3087 class Enc_5b76ab : OpcodeHexagon {
3089 let Inst{21-21} = Ii{9-9};
3090 let Inst{13-8} = Ii{8-3};
3091 let Inst{2-0} = Ii{2-0};
3093 let Inst{7-3} = Vs32{4-0};
3095 let Inst{20-16} = Rx32{4-0};
3097 class Enc_17a474 : OpcodeHexagon {
3099 let Inst{13-13} = Mu2{0-0};
3101 let Inst{7-3} = Vs32{4-0};
3103 let Inst{20-16} = Rx32{4-0};
3105 class Enc_9a9d62 : OpcodeHexagon {
3107 let Inst{13-13} = Mu2{0-0};
3109 let Inst{12-8} = Rt32{4-0};
3111 let Inst{7-3} = Vs32{4-0};
3113 let Inst{20-16} = Rx32{4-0};
3115 class Enc_3a527f : OpcodeHexagon {
3117 let Inst{21-21} = Ii{15-15};
3118 let Inst{13-8} = Ii{14-9};
3119 let Inst{2-0} = Ii{8-6};
3121 let Inst{7-3} = Vs32{4-0};
3123 let Inst{20-16} = Rx32{4-0};
3125 class Enc_c39a8b : OpcodeHexagon {
3127 let Inst{21-21} = Ii{15-15};
3128 let Inst{13-8} = Ii{14-9};
3129 let Inst{2-0} = Ii{8-6};
3131 let Inst{20-16} = Rt32{4-0};
3133 let Inst{7-3} = Vss32{4-0};
3135 class Enc_908985 : OpcodeHexagon {
3137 let Inst{13-13} = Mu2{0-0};
3139 let Inst{7-3} = Vss32{4-0};
3141 let Inst{20-16} = Rx32{4-0};
3143 class Enc_e8ddd5 : OpcodeHexagon {
3145 let Inst{21-21} = Ii{15-15};
3146 let Inst{13-8} = Ii{14-9};
3147 let Inst{2-0} = Ii{8-6};
3149 let Inst{7-3} = Vss32{4-0};
3151 let Inst{20-16} = Rx32{4-0};
3153 class Enc_6a4549 : OpcodeHexagon {
3155 let Inst{12-8} = Vu32{4-0};
3157 let Inst{20-16} = Rt32{4-0};
3159 let Inst{7-3} = Vd32{4-0};
3161 class Enc_932b58 : OpcodeHexagon {
3163 let Inst{12-8} = Vu32{4-0};
3165 let Inst{20-16} = Rt32{4-0};
3167 class Enc_124cac : OpcodeHexagon {
3169 let Inst{20-16} = Vuu32{4-0};
3171 let Inst{7-3} = Vxx32{4-0};
3173 class Enc_aceeef : OpcodeHexagon {
3175 let Inst{12-8} = Vu32{4-0};
3177 let Inst{20-16} = Rt32{4-0};
3179 let Inst{7-3} = Vdd32{4-0};
3181 class Enc_2c3281 : OpcodeHexagon {
3183 let Inst{7-3} = Vdd32{4-0};
3185 class Enc_a4ae28 : OpcodeHexagon {
3187 let Inst{20-16} = Vu32{4-0};
3189 let Inst{12-8} = Vv32{4-0};
3191 let Inst{5-3} = Qd8{2-0};
3193 class Enc_c1652e : OpcodeHexagon {
3195 let Inst{12-8} = Vu32{4-0};
3197 let Inst{20-16} = Rt32{4-0};
3199 let Inst{5-3} = Qd8{2-0};
3201 class Enc_9aae4a : OpcodeHexagon {
3203 let Inst{20-16} = Rt32{4-0};
3205 let Inst{7-3} = Vx32{4-0};
3207 let Inst{2-0} = Qd8{2-0};
3209 class Enc_dcfcbb : OpcodeHexagon {
3211 let Inst{20-16} = Vu32{4-0};
3213 let Inst{12-8} = Vvv32{4-0};
3215 let Inst{7-3} = Vd32{4-0};
3217 class Enc_a7ca29 : OpcodeHexagon {
3219 let Inst{2-0} = Qt8{2-0};
3221 let Inst{20-16} = Vu32{4-0};
3223 let Inst{12-8} = Vv32{4-0};
3225 let Inst{7-3} = Vd32{4-0};
3227 class Enc_dd5f9f : OpcodeHexagon {
3229 let Inst{2-0} = Qtt8{2-0};
3231 let Inst{20-16} = Vuu32{4-0};
3233 let Inst{12-8} = Vvv32{4-0};
3235 let Inst{7-3} = Vdd32{4-0};
3237 class Enc_7dc746 : OpcodeHexagon {
3239 let Inst{10-8} = Quu8{2-0};
3241 let Inst{20-16} = Rt32{4-0};
3243 let Inst{5-3} = Qdd8{2-0};
3245 class Enc_fa5efc : OpcodeHexagon {
3247 let Inst{20-16} = Vuu32{4-0};
3249 let Inst{12-8} = Vv32{4-0};
3251 let Inst{2-0} = Rt8{2-0};
3253 let Inst{7-3} = Vx32{4-0};
3255 class Enc_aac08c : OpcodeHexagon {
3257 let Inst{20-16} = Vu32{4-0};
3259 let Inst{7-3} = Vx32{4-0};
3261 class Enc_9a8c1f : OpcodeHexagon {
3263 let Inst{12-8} = Vu32{4-0};
3265 let Inst{20-16} = Rtt32{4-0};
3267 let Inst{7-3} = Vdd32{4-0};
3269 class Enc_a9eee0 : OpcodeHexagon {
3271 let Inst{20-16} = Vu32{4-0};
3273 let Inst{7-3} = Vxx32{4-0};
3275 class Enc_9ce456 : OpcodeHexagon {
3277 let Inst{21-21} = Ii{9-9};
3278 let Inst{13-8} = Ii{8-3};
3279 let Inst{2-0} = Ii{2-0};
3281 let Inst{7-3} = Vss32{4-0};
3283 let Inst{20-16} = Rx32{4-0};
3285 class Enc_96f0fd : OpcodeHexagon {
3287 let Inst{20-16} = Rt32{4-0};
3289 let Inst{7-3} = Vx32{4-0};
3291 let Inst{2-0} = Qdd8{2-0};
3293 class Enc_a662ae : OpcodeHexagon {
3295 let Inst{20-16} = Vuu32{4-0};
3297 let Inst{12-8} = Vvv32{4-0};
3299 let Inst{2-0} = Rt8{2-0};
3301 let Inst{7-3} = Vdd32{4-0};
3303 class Enc_ec09c9 : OpcodeHexagon {
3305 let Inst{20-16} = Vuu32{4-0};
3307 let Inst{12-8} = Vvv32{4-0};
3309 let Inst{5-3} = Qdd8{2-0};
3311 class Enc_400b42 : OpcodeHexagon {
3313 let Inst{12-8} = Vuu32{4-0};
3315 let Inst{20-16} = Rt32{4-0};
3317 let Inst{5-3} = Qdd8{2-0};
3319 class Enc_a5ed8a : OpcodeHexagon {
3321 let Inst{20-16} = Rt32{4-0};
3323 let Inst{4-0} = Vd32{4-0};
3325 class Enc_134437 : OpcodeHexagon {
3327 let Inst{9-8} = Qs4{1-0};
3329 let Inst{23-22} = Qt4{1-0};
3331 let Inst{1-0} = Qd4{1-0};
3333 class Enc_bfbf03 : OpcodeHexagon {
3335 let Inst{9-8} = Qs4{1-0};
3337 let Inst{1-0} = Qd4{1-0};
3339 class Enc_7222b7 : OpcodeHexagon {
3341 let Inst{20-16} = Rt32{4-0};
3343 let Inst{1-0} = Qd4{1-0};
3345 class Enc_f3f408 : OpcodeHexagon {
3347 let Inst{13-13} = Ii{3-3};
3348 let Inst{10-8} = Ii{2-0};
3350 let Inst{20-16} = Rt32{4-0};
3352 let Inst{4-0} = Vd32{4-0};
3354 class Enc_a255dc : OpcodeHexagon {
3356 let Inst{10-8} = Ii{2-0};
3358 let Inst{4-0} = Vd32{4-0};
3360 let Inst{20-16} = Rx32{4-0};
3362 class Enc_2ebe3b : OpcodeHexagon {
3364 let Inst{13-13} = Mu2{0-0};
3366 let Inst{4-0} = Vd32{4-0};
3368 let Inst{20-16} = Rx32{4-0};
3370 class Enc_8d8a30 : OpcodeHexagon {
3372 let Inst{13-13} = Ii{3-3};
3373 let Inst{10-8} = Ii{2-0};
3375 let Inst{12-11} = Pv4{1-0};
3377 let Inst{20-16} = Rt32{4-0};
3379 let Inst{4-0} = Vd32{4-0};
3381 class Enc_58a8bf : OpcodeHexagon {
3383 let Inst{10-8} = Ii{2-0};
3385 let Inst{12-11} = Pv4{1-0};
3387 let Inst{4-0} = Vd32{4-0};
3389 let Inst{20-16} = Rx32{4-0};
3391 class Enc_f8c1c4 : OpcodeHexagon {
3393 let Inst{12-11} = Pv4{1-0};
3395 let Inst{13-13} = Mu2{0-0};
3397 let Inst{4-0} = Vd32{4-0};
3399 let Inst{20-16} = Rx32{4-0};
3401 class Enc_c9e3bc : OpcodeHexagon {
3403 let Inst{13-13} = Ii{3-3};
3404 let Inst{10-8} = Ii{2-0};
3406 let Inst{20-16} = Rt32{4-0};
3408 let Inst{4-0} = Vs32{4-0};
3410 class Enc_27b757 : OpcodeHexagon {
3412 let Inst{13-13} = Ii{3-3};
3413 let Inst{10-8} = Ii{2-0};
3415 let Inst{12-11} = Pv4{1-0};
3417 let Inst{20-16} = Rt32{4-0};
3419 let Inst{4-0} = Vs32{4-0};
3421 class Enc_865390 : OpcodeHexagon {
3423 let Inst{10-8} = Ii{2-0};
3425 let Inst{12-11} = Pv4{1-0};
3427 let Inst{4-0} = Vs32{4-0};
3429 let Inst{20-16} = Rx32{4-0};
3431 class Enc_1ef990 : OpcodeHexagon {
3433 let Inst{12-11} = Pv4{1-0};
3435 let Inst{13-13} = Mu2{0-0};
3437 let Inst{4-0} = Vs32{4-0};
3439 let Inst{20-16} = Rx32{4-0};
3441 class Enc_b62ef7 : OpcodeHexagon {
3443 let Inst{10-8} = Ii{2-0};
3445 let Inst{4-0} = Vs32{4-0};
3447 let Inst{20-16} = Rx32{4-0};
3449 class Enc_d15d19 : OpcodeHexagon {
3451 let Inst{13-13} = Mu2{0-0};
3453 let Inst{4-0} = Vs32{4-0};
3455 let Inst{20-16} = Rx32{4-0};
3457 class Enc_f77fbc : OpcodeHexagon {
3459 let Inst{13-13} = Ii{3-3};
3460 let Inst{10-8} = Ii{2-0};
3462 let Inst{20-16} = Rt32{4-0};
3464 let Inst{2-0} = Os8{2-0};
3466 class Enc_f7430e : OpcodeHexagon {
3468 let Inst{13-13} = Ii{3-3};
3469 let Inst{10-8} = Ii{2-0};
3471 let Inst{12-11} = Pv4{1-0};
3473 let Inst{20-16} = Rt32{4-0};
3475 let Inst{2-0} = Os8{2-0};
3477 class Enc_784502 : OpcodeHexagon {
3479 let Inst{10-8} = Ii{2-0};
3481 let Inst{12-11} = Pv4{1-0};
3483 let Inst{2-0} = Os8{2-0};
3485 let Inst{20-16} = Rx32{4-0};
3487 class Enc_372c9d : OpcodeHexagon {
3489 let Inst{12-11} = Pv4{1-0};
3491 let Inst{13-13} = Mu2{0-0};
3493 let Inst{2-0} = Os8{2-0};
3495 let Inst{20-16} = Rx32{4-0};
3497 class Enc_1aaec1 : OpcodeHexagon {
3499 let Inst{10-8} = Ii{2-0};
3501 let Inst{2-0} = Os8{2-0};
3503 let Inst{20-16} = Rx32{4-0};
3505 class Enc_cf1927 : OpcodeHexagon {
3507 let Inst{13-13} = Mu2{0-0};
3509 let Inst{2-0} = Os8{2-0};
3511 let Inst{20-16} = Rx32{4-0};
3513 class Enc_2ea740 : OpcodeHexagon {
3515 let Inst{13-13} = Ii{3-3};
3516 let Inst{10-8} = Ii{2-0};
3518 let Inst{12-11} = Qv4{1-0};
3520 let Inst{20-16} = Rt32{4-0};
3522 let Inst{4-0} = Vs32{4-0};
3524 class Enc_0b51ce : OpcodeHexagon {
3526 let Inst{10-8} = Ii{2-0};
3528 let Inst{12-11} = Qv4{1-0};
3530 let Inst{4-0} = Vs32{4-0};
3532 let Inst{20-16} = Rx32{4-0};
3534 class Enc_4dff07 : OpcodeHexagon {
3536 let Inst{12-11} = Qv4{1-0};
3538 let Inst{13-13} = Mu2{0-0};
3540 let Inst{4-0} = Vs32{4-0};
3542 let Inst{20-16} = Rx32{4-0};
3544 class Enc_ff3442 : OpcodeHexagon {
3546 let Inst{13-13} = Ii{3-3};
3547 let Inst{10-8} = Ii{2-0};
3549 let Inst{20-16} = Rt32{4-0};
3551 class Enc_6c9ee0 : OpcodeHexagon {
3553 let Inst{10-8} = Ii{2-0};
3555 let Inst{20-16} = Rx32{4-0};
3557 class Enc_44661f : OpcodeHexagon {
3559 let Inst{13-13} = Mu2{0-0};
3561 let Inst{20-16} = Rx32{4-0};
3563 class Enc_e7581c : OpcodeHexagon {
3565 let Inst{12-8} = Vu32{4-0};
3567 let Inst{4-0} = Vd32{4-0};
3569 class Enc_45364e : OpcodeHexagon {
3571 let Inst{12-8} = Vu32{4-0};
3573 let Inst{20-16} = Vv32{4-0};
3575 let Inst{4-0} = Vd32{4-0};
3577 class Enc_f8ecf9 : OpcodeHexagon {
3579 let Inst{12-8} = Vuu32{4-0};
3581 let Inst{20-16} = Vvv32{4-0};
3583 let Inst{4-0} = Vdd32{4-0};
3585 class Enc_a90628 : OpcodeHexagon {
3587 let Inst{23-22} = Qv4{1-0};
3589 let Inst{12-8} = Vu32{4-0};
3591 let Inst{4-0} = Vx32{4-0};
3593 class Enc_b43b67 : OpcodeHexagon {
3595 let Inst{12-8} = Vu32{4-0};
3597 let Inst{20-16} = Vv32{4-0};
3599 let Inst{4-0} = Vd32{4-0};
3601 let Inst{6-5} = Qx4{1-0};
3603 class Enc_c1d806 : OpcodeHexagon {
3605 let Inst{12-8} = Vu32{4-0};
3607 let Inst{20-16} = Vv32{4-0};
3609 let Inst{4-0} = Vd32{4-0};
3611 let Inst{6-5} = Qe4{1-0};
3613 class Enc_e0820b : OpcodeHexagon {
3615 let Inst{12-8} = Vu32{4-0};
3617 let Inst{20-16} = Vv32{4-0};
3619 let Inst{6-5} = Qs4{1-0};
3621 let Inst{4-0} = Vd32{4-0};
3623 class Enc_71bb9b : OpcodeHexagon {
3625 let Inst{12-8} = Vu32{4-0};
3627 let Inst{20-16} = Vv32{4-0};
3629 let Inst{4-0} = Vdd32{4-0};
3631 class Enc_3fc427 : OpcodeHexagon {
3633 let Inst{12-8} = Vu32{4-0};
3635 let Inst{20-16} = Vv32{4-0};
3637 let Inst{4-0} = Vxx32{4-0};
3639 class Enc_a30110 : OpcodeHexagon {
3641 let Inst{12-8} = Vu32{4-0};
3643 let Inst{23-19} = Vv32{4-0};
3645 let Inst{18-16} = Rt8{2-0};
3647 let Inst{4-0} = Vd32{4-0};
3649 class Enc_0b2e5b : OpcodeHexagon {
3651 let Inst{7-5} = Ii{2-0};
3653 let Inst{12-8} = Vu32{4-0};
3655 let Inst{20-16} = Vv32{4-0};
3657 let Inst{4-0} = Vd32{4-0};
3659 class Enc_7b7ba8 : OpcodeHexagon {
3661 let Inst{9-8} = Qu4{1-0};
3663 let Inst{20-16} = Rt32{4-0};
3665 let Inst{4-0} = Vd32{4-0};
3667 class Enc_895bd9 : OpcodeHexagon {
3669 let Inst{9-8} = Qu4{1-0};
3671 let Inst{20-16} = Rt32{4-0};
3673 let Inst{4-0} = Vx32{4-0};
3675 class Enc_c4dc92 : OpcodeHexagon {
3677 let Inst{23-22} = Qv4{1-0};
3679 let Inst{12-8} = Vu32{4-0};
3681 let Inst{4-0} = Vd32{4-0};
3683 class Enc_0f8bab : OpcodeHexagon {
3685 let Inst{12-8} = Vu32{4-0};
3687 let Inst{20-16} = Rt32{4-0};
3689 let Inst{1-0} = Qd4{1-0};
3691 class Enc_adf111 : OpcodeHexagon {
3693 let Inst{12-8} = Vu32{4-0};
3695 let Inst{20-16} = Rt32{4-0};
3697 let Inst{1-0} = Qx4{1-0};
3699 class Enc_b087ac : OpcodeHexagon {
3701 let Inst{12-8} = Vu32{4-0};
3703 let Inst{20-16} = Rt32{4-0};
3705 let Inst{4-0} = Vd32{4-0};
3707 class Enc_5138b3 : OpcodeHexagon {
3709 let Inst{12-8} = Vu32{4-0};
3711 let Inst{20-16} = Rt32{4-0};
3713 let Inst{4-0} = Vx32{4-0};
3715 class Enc_8c2412 : OpcodeHexagon {
3717 let Inst{6-5} = Ps4{1-0};
3719 let Inst{12-8} = Vu32{4-0};
3721 let Inst{20-16} = Vv32{4-0};
3723 let Inst{4-0} = Vdd32{4-0};
3725 class Enc_770858 : OpcodeHexagon {
3727 let Inst{6-5} = Ps4{1-0};
3729 let Inst{12-8} = Vu32{4-0};
3731 let Inst{4-0} = Vd32{4-0};
3733 class Enc_989021 : OpcodeHexagon {
3735 let Inst{20-16} = Rt32{4-0};
3737 let Inst{12-8} = Vy32{4-0};
3739 let Inst{4-0} = Vx32{4-0};
3741 class Enc_24a7dc : OpcodeHexagon {
3743 let Inst{12-8} = Vu32{4-0};
3745 let Inst{23-19} = Vv32{4-0};
3747 let Inst{18-16} = Rt8{2-0};
3749 let Inst{4-0} = Vdd32{4-0};
3751 class Enc_aad80c : OpcodeHexagon {
3753 let Inst{12-8} = Vuu32{4-0};
3755 let Inst{20-16} = Rt32{4-0};
3757 let Inst{4-0} = Vdd32{4-0};
3759 class Enc_d6990d : OpcodeHexagon {
3761 let Inst{12-8} = Vuu32{4-0};
3763 let Inst{20-16} = Rt32{4-0};
3765 let Inst{4-0} = Vxx32{4-0};
3767 class Enc_0e41fa : OpcodeHexagon {
3769 let Inst{12-8} = Vuu32{4-0};
3771 let Inst{20-16} = Rt32{4-0};
3773 let Inst{4-0} = Vd32{4-0};
3775 class Enc_cc857d : OpcodeHexagon {
3777 let Inst{12-8} = Vuu32{4-0};
3779 let Inst{20-16} = Rt32{4-0};
3781 let Inst{4-0} = Vx32{4-0};
3783 class Enc_a7341a : OpcodeHexagon {
3785 let Inst{12-8} = Vu32{4-0};
3787 let Inst{20-16} = Vv32{4-0};
3789 let Inst{4-0} = Vx32{4-0};
3791 class Enc_95441f : OpcodeHexagon {
3793 let Inst{12-8} = Vu32{4-0};
3795 let Inst{20-16} = Vv32{4-0};
3797 let Inst{1-0} = Qd4{1-0};
3799 class Enc_eaa9f8 : OpcodeHexagon {
3801 let Inst{12-8} = Vu32{4-0};
3803 let Inst{20-16} = Vv32{4-0};
3805 let Inst{1-0} = Qx4{1-0};
3807 class Enc_8b8927 : OpcodeHexagon {
3809 let Inst{20-16} = Rt32{4-0};
3811 let Inst{13-13} = Mu2{0-0};
3813 let Inst{4-0} = Vv32{4-0};
3815 class Enc_158beb : OpcodeHexagon {
3817 let Inst{6-5} = Qs4{1-0};
3819 let Inst{20-16} = Rt32{4-0};
3821 let Inst{13-13} = Mu2{0-0};
3823 let Inst{4-0} = Vv32{4-0};
3825 class Enc_28dcbb : OpcodeHexagon {
3827 let Inst{20-16} = Rt32{4-0};
3829 let Inst{13-13} = Mu2{0-0};
3831 let Inst{4-0} = Vvv32{4-0};
3833 class Enc_4e4a80 : OpcodeHexagon {
3835 let Inst{6-5} = Qs4{1-0};
3837 let Inst{20-16} = Rt32{4-0};
3839 let Inst{13-13} = Mu2{0-0};
3841 let Inst{4-0} = Vvv32{4-0};
3843 class Enc_217147 : OpcodeHexagon {
3845 let Inst{23-22} = Qv4{1-0};
3847 class Enc_569cfe : OpcodeHexagon {
3849 let Inst{20-16} = Rt32{4-0};
3851 let Inst{4-0} = Vx32{4-0};
3853 class Enc_263841 : OpcodeHexagon {
3855 let Inst{12-8} = Vu32{4-0};
3857 let Inst{20-16} = Rtt32{4-0};
3859 let Inst{4-0} = Vd32{4-0};
3861 class Enc_245865 : OpcodeHexagon {
3863 let Inst{12-8} = Vu32{4-0};
3865 let Inst{23-19} = Vv32{4-0};
3867 let Inst{18-16} = Rt8{2-0};
3869 let Inst{4-0} = Vx32{4-0};
3871 class Enc_cd4705 : OpcodeHexagon {
3873 let Inst{7-5} = Ii{2-0};
3875 let Inst{12-8} = Vu32{4-0};
3877 let Inst{20-16} = Vv32{4-0};
3879 let Inst{4-0} = Vx32{4-0};
3881 class Enc_7b523d : OpcodeHexagon {
3883 let Inst{12-8} = Vu32{4-0};
3885 let Inst{23-19} = Vv32{4-0};
3887 let Inst{18-16} = Rt8{2-0};
3889 let Inst{4-0} = Vxx32{4-0};
3891 class Enc_1178da : OpcodeHexagon {
3893 let Inst{7-5} = Ii{2-0};
3895 let Inst{12-8} = Vu32{4-0};
3897 let Inst{20-16} = Vv32{4-0};
3899 let Inst{4-0} = Vxx32{4-0};
3901 class Enc_4b39e4 : OpcodeHexagon {
3903 let Inst{7-5} = Ii{2-0};
3905 let Inst{12-8} = Vu32{4-0};
3907 let Inst{20-16} = Vv32{4-0};
3909 let Inst{4-0} = Vdd32{4-0};
3911 class Enc_310ba1 : OpcodeHexagon {
3913 let Inst{12-8} = Vu32{4-0};
3915 let Inst{20-16} = Rtt32{4-0};
3917 let Inst{4-0} = Vx32{4-0};
3919 class Enc_01d3d0 : OpcodeHexagon {
3921 let Inst{12-8} = Vu32{4-0};
3923 let Inst{20-16} = Rt32{4-0};
3925 let Inst{4-0} = Vdd32{4-0};
3927 class Enc_5e8512 : OpcodeHexagon {
3929 let Inst{12-8} = Vu32{4-0};
3931 let Inst{20-16} = Rt32{4-0};
3933 let Inst{4-0} = Vxx32{4-0};
3935 class Enc_31db33 : OpcodeHexagon {
3937 let Inst{6-5} = Qt4{1-0};
3939 let Inst{12-8} = Vu32{4-0};
3941 let Inst{20-16} = Vv32{4-0};
3943 let Inst{4-0} = Vd32{4-0};
3945 class Enc_6f83e7 : OpcodeHexagon {
3947 let Inst{23-22} = Qv4{1-0};
3949 let Inst{4-0} = Vd32{4-0};
3951 class Enc_cb785b : OpcodeHexagon {
3953 let Inst{12-8} = Vu32{4-0};
3955 let Inst{20-16} = Rtt32{4-0};
3957 let Inst{4-0} = Vdd32{4-0};
3959 class Enc_ad9bef : OpcodeHexagon {
3961 let Inst{12-8} = Vu32{4-0};
3963 let Inst{20-16} = Rtt32{4-0};
3965 let Inst{4-0} = Vxx32{4-0};
3967 class Enc_2f2f04 : OpcodeHexagon {
3969 let Inst{5-5} = Ii{0-0};
3971 let Inst{12-8} = Vuu32{4-0};
3973 let Inst{20-16} = Rt32{4-0};
3975 let Inst{4-0} = Vdd32{4-0};
3977 class Enc_d483b9 : OpcodeHexagon {
3979 let Inst{5-5} = Ii{0-0};
3981 let Inst{12-8} = Vuu32{4-0};
3983 let Inst{20-16} = Rt32{4-0};
3985 let Inst{4-0} = Vxx32{4-0};
3987 class Enc_1bd127 : OpcodeHexagon {
3989 let Inst{12-8} = Vu32{4-0};
3991 let Inst{18-16} = Rt8{2-0};
3993 let Inst{4-0} = Vdddd32{4-0};
3995 class Enc_d7bc34 : OpcodeHexagon {
3997 let Inst{12-8} = Vu32{4-0};
3999 let Inst{18-16} = Rt8{2-0};
4001 let Inst{4-0} = Vyyyy32{4-0};
4003 class Enc_3b7631 : OpcodeHexagon {
4005 let Inst{12-8} = Vu32{4-0};
4007 let Inst{4-0} = Vdddd32{4-0};
4009 let Inst{18-16} = Rx8{2-0};
4011 class Enc_bddee3 : OpcodeHexagon {
4013 let Inst{12-8} = Vu32{4-0};
4015 let Inst{4-0} = Vyyyy32{4-0};
4017 let Inst{18-16} = Rx8{2-0};
4019 class Enc_dd766a : OpcodeHexagon {
4021 let Inst{12-8} = Vu32{4-0};
4023 let Inst{4-0} = Vdd32{4-0};
4025 class Enc_16c48b : OpcodeHexagon {
4027 let Inst{20-16} = Rt32{4-0};
4029 let Inst{13-13} = Mu2{0-0};
4031 let Inst{12-8} = Vv32{4-0};
4033 let Inst{4-0} = Vw32{4-0};
4035 class Enc_9be1de : OpcodeHexagon {
4037 let Inst{6-5} = Qs4{1-0};
4039 let Inst{20-16} = Rt32{4-0};
4041 let Inst{13-13} = Mu2{0-0};
4043 let Inst{12-8} = Vv32{4-0};
4045 let Inst{4-0} = Vw32{4-0};
4047 class Enc_a641d0 : OpcodeHexagon {
4049 let Inst{20-16} = Rt32{4-0};
4051 let Inst{13-13} = Mu2{0-0};
4053 let Inst{12-8} = Vvv32{4-0};
4055 let Inst{4-0} = Vw32{4-0};
4057 class Enc_3d6d37 : OpcodeHexagon {
4059 let Inst{6-5} = Qs4{1-0};
4061 let Inst{20-16} = Rt32{4-0};
4063 let Inst{13-13} = Mu2{0-0};
4065 let Inst{12-8} = Vvv32{4-0};
4067 let Inst{4-0} = Vw32{4-0};
4069 class Enc_3dac0b : OpcodeHexagon {
4071 let Inst{6-5} = Qt4{1-0};
4073 let Inst{12-8} = Vu32{4-0};
4075 let Inst{20-16} = Vv32{4-0};
4077 let Inst{4-0} = Vdd32{4-0};
4079 class Enc_500cb0 : OpcodeHexagon {
4081 let Inst{12-8} = Vu32{4-0};
4083 let Inst{4-0} = Vxx32{4-0};
4085 class Enc_efaed8 : OpcodeHexagon {
4087 let Inst{8-8} = Ii{0-0};
4089 class Enc_802dc0 : OpcodeHexagon {
4091 let Inst{8-8} = Ii{0-0};
4093 let Inst{23-22} = Qv4{1-0};
4095 class Enc_ef601b : OpcodeHexagon {
4097 let Inst{13-13} = Ii{3-3};
4098 let Inst{10-8} = Ii{2-0};
4100 let Inst{12-11} = Pv4{1-0};
4102 let Inst{20-16} = Rt32{4-0};
4104 class Enc_6baed4 : OpcodeHexagon {
4106 let Inst{10-8} = Ii{2-0};
4108 let Inst{12-11} = Pv4{1-0};
4110 let Inst{20-16} = Rx32{4-0};
4112 class Enc_691712 : OpcodeHexagon {
4114 let Inst{12-11} = Pv4{1-0};
4116 let Inst{13-13} = Mu2{0-0};
4118 let Inst{20-16} = Rx32{4-0};
4120 class Enc_403871 : OpcodeHexagon {
4122 let Inst{20-16} = Rx32{4-0};
4124 class Enc_2d829e : OpcodeHexagon {
4126 let Inst{10-0} = Ii{13-3};
4128 let Inst{20-16} = Rs32{4-0};
4130 class Enc_ca3887 : OpcodeHexagon {
4132 let Inst{20-16} = Rs32{4-0};
4134 let Inst{12-8} = Rt32{4-0};
4136 class Enc_9e9047 : OpcodeHexagon {
4138 let Inst{9-8} = Pt4{1-0};
4140 let Inst{20-16} = Rs32{4-0};
4142 class Enc_7d1542 : OpcodeHexagon {
4144 let Inst{22-16} = Ss128{6-0};
4146 let Inst{4-0} = Rd32{4-0};
4148 class Enc_8f7633 : OpcodeHexagon {
4150 let Inst{20-16} = Rs32{4-0};
4152 let Inst{6-0} = Sd128{6-0};
4154 class Enc_46f33d : OpcodeHexagon {
4156 let Inst{20-16} = Rss32{4-0};
4158 let Inst{12-8} = Rt32{4-0};
4160 class Enc_d0fe02 : OpcodeHexagon {
4162 let Inst{20-16} = Rxx32{4-0};
4165 class Enc_e32517 : OpcodeHexagon {
4167 let Inst{22-16} = Sss128{6-0};
4169 let Inst{4-0} = Rdd32{4-0};
4171 class Enc_a705fc : OpcodeHexagon {
4173 let Inst{20-16} = Rss32{4-0};
4175 let Inst{6-0} = Sdd128{6-0};
4177 class Enc_e6abcf : OpcodeHexagon {
4179 let Inst{20-16} = Rs32{4-0};
4181 let Inst{12-8} = Rtt32{4-0};
4183 class Enc_b00112 : OpcodeHexagon {
4185 let Inst{20-16} = Rss32{4-0};
4187 let Inst{12-8} = Rtt32{4-0};
4189 class Enc_598f6c : OpcodeHexagon {
4191 let Inst{12-8} = Rtt32{4-0};