1 //==- HexagonTargetTransformInfo.cpp - Hexagon specific TTI pass -*- C++ -*-==//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
8 /// This file implements a TargetTransformInfo analysis pass specific to the
9 /// Hexagon target machine. It uses the target's detailed information to provide
10 /// more precise answers to certain TTI queries, while letting the target
11 /// independent and default TTI implementations handle the rest.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONTARGETTRANSFORMINFO_H
16 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONTARGETTRANSFORMINFO_H
19 #include "HexagonSubtarget.h"
20 #include "HexagonTargetMachine.h"
21 #include "llvm/ADT/ArrayRef.h"
22 #include "llvm/Analysis/TargetTransformInfo.h"
23 #include "llvm/CodeGen/BasicTTIImpl.h"
24 #include "llvm/IR/Function.h"
29 class ScalarEvolution;
33 class HexagonTTIImpl : public BasicTTIImplBase<HexagonTTIImpl> {
34 using BaseT = BasicTTIImplBase<HexagonTTIImpl>;
35 using TTI = TargetTransformInfo;
39 const HexagonSubtarget &ST;
40 const HexagonTargetLowering &TLI;
42 const HexagonSubtarget *getST() const { return &ST; }
43 const HexagonTargetLowering *getTLI() const { return &TLI; }
46 bool isTypeForHVX(Type *VecTy) const;
48 // Returns the number of vector elements of Ty, if Ty is a vector type,
49 // or 1 if Ty is a scalar type. It is incorrect to call this function
50 // with any other type.
51 unsigned getTypeNumElements(Type *Ty) const;
54 explicit HexagonTTIImpl(const HexagonTargetMachine *TM, const Function &F)
55 : BaseT(TM, F.getParent()->getDataLayout()),
56 ST(*TM->getSubtargetImpl(F)), TLI(*ST.getTargetLowering()) {}
58 /// \name Scalar TTI Implementations
61 TTI::PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) const;
63 // The Hexagon target can unroll loops with run-time trip counts.
64 void getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
65 TTI::UnrollingPreferences &UP);
67 void getPeelingPreferences(Loop *L, ScalarEvolution &SE,
68 TTI::PeelingPreferences &PP);
70 /// Bias LSR towards creating post-increment opportunities.
71 bool shouldFavorPostInc() const;
74 unsigned getPrefetchDistance() const override;
75 unsigned getCacheLineSize() const override;
79 /// \name Vector TTI Implementations
82 unsigned getNumberOfRegisters(bool vector) const;
83 unsigned getMaxInterleaveFactor(unsigned VF);
84 unsigned getRegisterBitWidth(bool Vector) const;
85 unsigned getMinVectorRegisterBitWidth() const;
86 unsigned getMinimumVF(unsigned ElemWidth) const;
88 bool shouldMaximizeVectorBandwidth(bool OptSize) const {
91 bool supportsEfficientVectorElementLoadStore() {
94 bool hasBranchDivergence() {
97 bool enableAggressiveInterleaving(bool LoopHasReductions) {
100 bool prefersVectorizedAddressing() {
103 bool enableInterleavedAccessVectorization() {
107 unsigned getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts,
108 bool Insert, bool Extract);
109 unsigned getOperandsScalarizationOverhead(ArrayRef<const Value *> Args,
111 unsigned getCallInstrCost(Function *F, Type *RetTy, ArrayRef<Type*> Tys,
112 TTI::TargetCostKind CostKind);
113 unsigned getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
114 TTI::TargetCostKind CostKind);
115 unsigned getAddressComputationCost(Type *Tp, ScalarEvolution *SE,
117 unsigned getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment,
118 unsigned AddressSpace,
119 TTI::TargetCostKind CostKind,
120 const Instruction *I = nullptr);
122 getMaskedMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
123 unsigned AddressSpace,
124 TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency);
125 unsigned getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
127 unsigned getGatherScatterOpCost(unsigned Opcode, Type *DataTy,
128 const Value *Ptr, bool VariableMask,
129 Align Alignment, TTI::TargetCostKind CostKind,
130 const Instruction *I);
131 unsigned getInterleavedMemoryOpCost(
132 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
133 Align Alignment, unsigned AddressSpace,
134 TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency,
135 bool UseMaskForCond = false, bool UseMaskForGaps = false);
136 unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
137 TTI::TargetCostKind CostKind,
138 const Instruction *I = nullptr);
139 unsigned getArithmeticInstrCost(
140 unsigned Opcode, Type *Ty,
141 TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput,
142 TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
143 TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
144 TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
145 TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None,
146 ArrayRef<const Value *> Args = ArrayRef<const Value *>(),
147 const Instruction *CxtI = nullptr);
148 unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
149 TTI::TargetCostKind CostKind,
150 const Instruction *I = nullptr);
151 unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
153 unsigned getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind) {
159 int getUserCost(const User *U, ArrayRef<const Value *> Operands,
160 TTI::TargetCostKind CostKind);
162 // Hexagon specific decision to generate a lookup table.
163 bool shouldBuildLookupTables() const;
166 } // end namespace llvm
167 #endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONTARGETTRANSFORMINFO_H