1 //===- MipsAnalyzeImmediate.cpp - Analyze Immediates ----------------------===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 #include "MipsAnalyzeImmediate.h"
11 #include "llvm/Support/MathExtras.h"
18 MipsAnalyzeImmediate::Inst::Inst(unsigned O, unsigned I) : Opc(O), ImmOpnd(I) {}
20 // Add I to the instruction sequences.
21 void MipsAnalyzeImmediate::AddInstr(InstSeqLs &SeqLs, const Inst &I) {
22 // Add an instruction seqeunce consisting of just I.
24 SeqLs.push_back(InstSeq(1, I));
28 for (InstSeqLs::iterator Iter = SeqLs.begin(); Iter != SeqLs.end(); ++Iter)
32 void MipsAnalyzeImmediate::GetInstSeqLsADDiu(uint64_t Imm, unsigned RemSize,
34 GetInstSeqLs((Imm + 0x8000ULL) & 0xffffffffffff0000ULL, RemSize, SeqLs);
35 AddInstr(SeqLs, Inst(ADDiu, Imm & 0xffffULL));
38 void MipsAnalyzeImmediate::GetInstSeqLsORi(uint64_t Imm, unsigned RemSize,
40 GetInstSeqLs(Imm & 0xffffffffffff0000ULL, RemSize, SeqLs);
41 AddInstr(SeqLs, Inst(ORi, Imm & 0xffffULL));
44 void MipsAnalyzeImmediate::GetInstSeqLsSLL(uint64_t Imm, unsigned RemSize,
46 unsigned Shamt = countTrailingZeros(Imm);
47 GetInstSeqLs(Imm >> Shamt, RemSize - Shamt, SeqLs);
48 AddInstr(SeqLs, Inst(SLL, Shamt));
51 void MipsAnalyzeImmediate::GetInstSeqLs(uint64_t Imm, unsigned RemSize,
53 uint64_t MaskedImm = Imm & (0xffffffffffffffffULL >> (64 - Size));
55 // Do nothing if Imm is 0.
59 // A single ADDiu will do if RemSize <= 16.
61 AddInstr(SeqLs, Inst(ADDiu, MaskedImm));
65 // Shift if the lower 16-bit is cleared.
66 if (!(Imm & 0xffff)) {
67 GetInstSeqLsSLL(Imm, RemSize, SeqLs);
71 GetInstSeqLsADDiu(Imm, RemSize, SeqLs);
73 // If bit 15 is cleared, it doesn't make a difference whether the last
74 // instruction is an ADDiu or ORi. In that case, do not call GetInstSeqLsORi.
77 GetInstSeqLsORi(Imm, RemSize, SeqLsORi);
78 SeqLs.append(std::make_move_iterator(SeqLsORi.begin()),
79 std::make_move_iterator(SeqLsORi.end()));
83 // Replace a ADDiu & SLL pair with a LUi.
84 // e.g. the following two instructions
89 void MipsAnalyzeImmediate::ReplaceADDiuSLLWithLUi(InstSeq &Seq) {
90 // Check if the first two instructions are ADDiu and SLL and the shift amount
92 if ((Seq.size() < 2) || (Seq[0].Opc != ADDiu) ||
93 (Seq[1].Opc != SLL) || (Seq[1].ImmOpnd < 16))
96 // Sign-extend and shift operand of ADDiu and see if it still fits in 16-bit.
97 int64_t Imm = SignExtend64<16>(Seq[0].ImmOpnd);
98 int64_t ShiftedImm = (uint64_t)Imm << (Seq[1].ImmOpnd - 16);
100 if (!isInt<16>(ShiftedImm))
103 // Replace the first instruction and erase the second.
105 Seq[0].ImmOpnd = (unsigned)(ShiftedImm & 0xffff);
106 Seq.erase(Seq.begin() + 1);
109 void MipsAnalyzeImmediate::GetShortestSeq(InstSeqLs &SeqLs, InstSeq &Insts) {
110 InstSeqLs::iterator ShortestSeq = SeqLs.end();
111 // The length of an instruction sequence is at most 7.
112 unsigned ShortestLength = 8;
114 for (InstSeqLs::iterator S = SeqLs.begin(); S != SeqLs.end(); ++S) {
115 ReplaceADDiuSLLWithLUi(*S);
116 assert(S->size() <= 7);
118 if (S->size() < ShortestLength) {
120 ShortestLength = S->size();
125 Insts.append(ShortestSeq->begin(), ShortestSeq->end());
128 const MipsAnalyzeImmediate::InstSeq
129 &MipsAnalyzeImmediate::Analyze(uint64_t Imm, unsigned Size,
130 bool LastInstrIsADDiu) {
139 ADDiu = Mips::DADDiu;
147 // Get the list of instruction sequences.
148 if (LastInstrIsADDiu | !Imm)
149 GetInstSeqLsADDiu(Imm, Size, SeqLs);
151 GetInstSeqLs(Imm, Size, SeqLs);
153 // Set Insts to the shortest instruction sequence.
154 GetShortestSeq(SeqLs, Insts);