1 //===--- P10InstrResources.td - P10 Scheduling Definitions -*- tablegen -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
8 // Automatically generated file, do not edit!
10 // This file defines instruction data for SchedModel of the POWER10 processor.
12 //===----------------------------------------------------------------------===//
13 // 22 Cycles Binary Floating Point operations, 2 input operands
14 def : InstRW<[P10W_BF_22C, P10W_DISP_ANY, P10BF_Read, P10BF_Read],
20 // 2-way crack instructions
21 // 22 Cycles Binary Floating Point operations, and 3 Cycles ALU operations, 2 input operands
22 def : InstRW<[P10W_BF_22C, P10W_DISP_EVEN, P10W_FX_3C, P10W_DISP_ANY],
27 // 24 Cycles Binary Floating Point operations, 2 input operands
28 def : InstRW<[P10W_BF_24C, P10W_DISP_ANY, P10BF_Read, P10BF_Read],
33 // 26 Cycles Binary Floating Point operations, 1 input operands
34 def : InstRW<[P10W_BF_26C, P10W_DISP_ANY, P10BF_Read],
40 // 2-way crack instructions
41 // 26 Cycles Binary Floating Point operations, and 3 Cycles ALU operations, 1 input operands
42 def : InstRW<[P10W_BF_26C, P10W_DISP_EVEN, P10W_FX_3C, P10W_DISP_ANY],
47 // 27 Cycles Binary Floating Point operations, 1 input operands
48 def : InstRW<[P10W_BF_27C, P10W_DISP_ANY, P10BF_Read],
53 // 27 Cycles Binary Floating Point operations, 2 input operands
54 def : InstRW<[P10W_BF_27C, P10W_DISP_ANY, P10BF_Read, P10BF_Read],
61 // 2-way crack instructions
62 // 27 Cycles Binary Floating Point operations, and 3 Cycles ALU operations, 2 input operands
63 def : InstRW<[P10W_BF_27C, P10W_DISP_EVEN, P10W_FX_3C, P10W_DISP_ANY],
68 // 36 Cycles Binary Floating Point operations, 1 input operands
69 def : InstRW<[P10W_BF_36C, P10W_DISP_ANY, P10BF_Read],
76 // 2-way crack instructions
77 // 36 Cycles Binary Floating Point operations, and 3 Cycles ALU operations, 1 input operands
78 def : InstRW<[P10W_BF_36C, P10W_DISP_EVEN, P10W_FX_3C, P10W_DISP_ANY],
83 // 7 Cycles Binary Floating Point operations, 1 input operands
84 def : InstRW<[P10W_BF_7C, P10W_DISP_ANY, P10BF_Read],
121 XSCVDPSXDS, XSCVDPSXDSs,
122 XSCVDPSXWS, XSCVDPSXWSs,
123 XSCVDPUXDS, XSCVDPUXDSs,
124 XSCVDPUXWS, XSCVDPUXWSs,
176 // 7 Cycles Binary Floating Point operations, 2 input operands
177 def : InstRW<[P10W_BF_7C, P10W_DISP_ANY, P10BF_Read, P10BF_Read],
201 // 7 Cycles Binary Floating Point operations, 3 input operands
202 def : InstRW<[P10W_BF_7C, P10W_DISP_ANY, P10BF_Read, P10BF_Read, P10BF_Read],
249 // 2-way crack instructions
250 // 7 Cycles Binary Floating Point operations, and 7 Cycles Binary Floating Point operations, 1 input operands
251 def : InstRW<[P10W_BF_7C, P10W_DISP_EVEN, P10W_BF_7C, P10W_DISP_ANY, P10BF_Read],
256 // 2-way crack instructions
257 // 7 Cycles Binary Floating Point operations, and 3 Cycles ALU operations, 2 input operands
258 def : InstRW<[P10W_BF_7C, P10W_DISP_EVEN, P10W_FX_3C, P10W_DISP_ANY],
268 // 2-way crack instructions
269 // 7 Cycles Binary Floating Point operations, and 3 Cycles ALU operations, 1 input operands
270 def : InstRW<[P10W_BF_7C, P10W_DISP_EVEN, P10W_FX_3C, P10W_DISP_ANY],
286 FRIMD_rec, FRIMS_rec,
287 FRIND_rec, FRINS_rec,
288 FRIPD_rec, FRIPS_rec,
289 FRIZD_rec, FRIZS_rec,
295 // 2-way crack instructions
296 // 7 Cycles Binary Floating Point operations, and 3 Cycles ALU operations, 3 input operands
297 def : InstRW<[P10W_BF_7C, P10W_DISP_EVEN, P10W_FX_3C, P10W_DISP_ANY],
310 // 2 Cycles Branch operations, 1 input operands
311 def : InstRW<[P10W_BR_2C, P10W_DISP_ANY, P10BR_Read],
313 B, BCC, BCCA, BCCCTR, BCCCTR8, BCCCTRL, BCCCTRL8, BCCL, BCCLA, BCCLR, BCCLRL, CTRL_DEP, TAILB, TAILB8,
315 BCCTR, BCCTR8, BCCTR8n, BCCTRn, gBCCTR,
316 BCCTRL, BCCTRL8, BCCTRL8n, BCCTRLn, gBCCTRL,
317 BCLR, BCLRn, BDNZLR, BDNZLR8, BDNZLRm, BDNZLRp, BDZLR, BDZLR8, BDZLRm, BDZLRp, gBCLR,
318 BCLRL, BCLRLn, BDNZLRL, BDNZLRLm, BDNZLRLp, BDZLRL, BDZLRLm, BDZLRLp, gBCLRL,
319 BL, BL8, BL8_NOP, BL8_NOP_RM, BL8_NOP_TLS, BL8_NOTOC, BL8_NOTOC_RM, BL8_NOTOC_TLS, BL8_RM, BL8_TLS, BL8_TLS_, BLR, BLR8, BLRL, BL_NOP, BL_NOP_RM, BL_RM, BL_TLS,
320 BLA, BLA8, BLA8_NOP, BLA8_NOP_RM, BLA8_RM, BLA_RM
323 // 2 Cycles Branch operations, 2 input operands
324 def : InstRW<[P10W_BR_2C, P10W_DISP_ANY, P10BR_Read, P10BR_Read],
326 BC, BCTR, BCTR8, BCTRL, BCTRL8, BCTRL8_LDinto_toc, BCTRL8_LDinto_toc_RM, BCTRL8_RM, BCTRL_LWZinto_toc, BCTRL_LWZinto_toc_RM, BCTRL_RM, BCn, BDNZ, BDNZ8, BDNZm, BDNZp, BDZ, BDZ8, BDZm, BDZp, TAILBCTR, TAILBCTR8, gBC, gBCat,
327 BDNZA, BDNZAm, BDNZAp, BDZA, BDZAm, BDZAp, gBCA, gBCAat,
328 BCL, BCLalways, BCLn, BDNZL, BDNZLm, BDNZLp, BDZL, BDZLm, BDZLp, gBCL, gBCLat,
329 BDNZLA, BDNZLAm, BDNZLAp, BDZLA, BDZLAm, BDZLAp, gBCLA, gBCLAat
332 // 7 Cycles Crypto operations, 1 input operands
333 def : InstRW<[P10W_CY_7C, P10W_DISP_ANY, P10CY_Read],
339 // 7 Cycles Crypto operations, 2 input operands
340 def : InstRW<[P10W_CY_7C, P10W_DISP_ANY, P10CY_Read, P10CY_Read],
362 // 13 Cycles Decimal Floating Point operations, 1 input operands
363 def : InstRW<[P10W_DF_13C, P10W_DISP_ANY, P10DF_Read],
383 // 13 Cycles Decimal Floating Point operations, 2 input operands
384 def : InstRW<[P10W_DF_13C, P10W_DISP_ANY, P10DF_Read, P10DF_Read],
393 // 2-way crack instructions
394 // 13 Cycles Decimal Floating Point operations, and 3 Cycles Store operations, 1 input operands
395 def : InstRW<[P10W_DF_13C, P10W_DISP_EVEN, P10W_ST_3C, P10W_DISP_ANY],
401 // 24 Cycles Decimal Floating Point operations, 1 input operands
402 def : InstRW<[P10W_DF_24C, P10W_DISP_ANY, P10DF_Read],
407 // 25 Cycles Decimal Floating Point operations, 2 input operands
408 def : InstRW<[P10W_DF_25C, P10W_DISP_ANY, P10DF_Read, P10DF_Read],
414 // 25 Cycles Decimal Floating Point operations, 3 input operands
415 def : InstRW<[P10W_DF_25C, P10W_DISP_ANY, P10DF_Read, P10DF_Read, P10DF_Read],
427 // 38 Cycles Decimal Floating Point operations, 1 input operands
428 def : InstRW<[P10W_DF_38C, P10W_DISP_ANY, P10DF_Read],
433 // 59 Cycles Decimal Floating Point operations, 2 input operands
434 def : InstRW<[P10W_DF_59C, P10W_DISP_ANY, P10DF_Read, P10DF_Read],
440 // 61 Cycles Decimal Floating Point operations, 2 input operands
441 def : InstRW<[P10W_DF_61C, P10W_DISP_ANY, P10DF_Read, P10DF_Read],
449 // 68 Cycles Decimal Floating Point operations, 2 input operands
450 def : InstRW<[P10W_DF_68C, P10W_DISP_ANY, P10DF_Read, P10DF_Read],
456 // 77 Cycles Decimal Floating Point operations, 1 input operands
457 def : InstRW<[P10W_DF_77C, P10W_DISP_ANY, P10DF_Read],
463 // 20 Cycles Scalar Fixed-Point Divide operations, 2 input operands
464 def : InstRW<[P10W_DV_20C, P10W_DISP_ANY, P10DV_Read, P10DV_Read],
473 // 2-way crack instructions
474 // 20 Cycles Scalar Fixed-Point Divide operations, and 3 Cycles ALU operations, 2 input operands
475 def : InstRW<[P10W_DV_20C, P10W_DISP_EVEN, P10W_FX_3C, P10W_DISP_ANY],
483 // 25 Cycles Scalar Fixed-Point Divide operations, 2 input operands
484 def : InstRW<[P10W_DV_25C, P10W_DISP_ANY, P10DV_Read, P10DV_Read],
496 // 2-way crack instructions
497 // 25 Cycles Scalar Fixed-Point Divide operations, and 3 Cycles ALU operations, 2 input operands
498 def : InstRW<[P10W_DV_25C, P10W_DISP_EVEN, P10W_FX_3C, P10W_DISP_ANY],
510 // 27 Cycles Scalar Fixed-Point Divide operations, 2 input operands
511 def : InstRW<[P10W_DV_27C, P10W_DISP_ANY, P10DV_Read, P10DV_Read],
518 // 41 Cycles Scalar Fixed-Point Divide operations, 2 input operands
519 def : InstRW<[P10W_DV_41C, P10W_DISP_ANY, P10DV_Read, P10DV_Read],
527 // 2-way crack instructions
528 // 41 Cycles Scalar Fixed-Point Divide operations, and 3 Cycles ALU operations, 2 input operands
529 def : InstRW<[P10W_DV_41C, P10W_DISP_EVEN, P10W_FX_3C, P10W_DISP_ANY],
537 // 43 Cycles Scalar Fixed-Point Divide operations, 2 input operands
538 def : InstRW<[P10W_DV_43C, P10W_DISP_ANY, P10DV_Read, P10DV_Read],
544 // 47 Cycles Scalar Fixed-Point Divide operations, 2 input operands
545 def : InstRW<[P10W_DV_47C, P10W_DISP_ANY, P10DV_Read, P10DV_Read],
551 // 54 Cycles Scalar Fixed-Point Divide operations, 2 input operands
552 def : InstRW<[P10W_DV_54C, P10W_DISP_ANY, P10DV_Read, P10DV_Read],
558 // 60 Cycles Scalar Fixed-Point Divide operations, 2 input operands
559 def : InstRW<[P10W_DV_60C, P10W_DISP_ANY, P10DV_Read, P10DV_Read],
565 // 75 Cycles Scalar Fixed-Point Divide operations, 2 input operands
566 def : InstRW<[P10W_DV_75C, P10W_DISP_ANY, P10DV_Read, P10DV_Read],
572 // 83 Cycles Scalar Fixed-Point Divide operations, 2 input operands
573 def : InstRW<[P10W_DV_83C, P10W_DISP_ANY, P10DV_Read, P10DV_Read],
579 // 5 Cycles Fixed-Point and BCD operations, 1 input operands
580 def : InstRW<[P10W_DX_5C, P10W_DISP_ANY, P10DX_Read],
594 // 5 Cycles Fixed-Point and BCD operations, 2 input operands
595 def : InstRW<[P10W_DX_5C, P10W_DISP_ANY, P10DX_Read, P10DX_Read],
620 // 5 Cycles Fixed-Point and BCD operations, 3 input operands
621 def : InstRW<[P10W_DX_5C, P10W_DISP_ANY, P10DX_Read, P10DX_Read, P10DX_Read],
629 // 4 Cycles ALU2 operations, 0 input operands
630 def : InstRW<[P10W_F2_4C, P10W_DISP_ANY],
635 // 4 Cycles ALU2 operations, 1 input operands
636 def : InstRW<[P10W_F2_4C, P10W_DISP_ANY, P10F2_Read],
643 CNTLZW8_rec, CNTLZW_rec,
647 CNTTZW8_rec, CNTTZW_rec,
648 EXTSWSLI_32_64_rec, EXTSWSLI_rec,
659 RLDICL_32_rec, RLDICL_rec,
661 RLWINM8_rec, RLWINM_rec,
705 // 4 Cycles ALU2 operations, 2 input operands
706 def : InstRW<[P10W_F2_4C, P10W_DISP_ANY, P10F2_Read, P10F2_Read],
716 RLWIMI8_rec, RLWIMI_rec,
717 RLWNM8_rec, RLWNM_rec,
816 // 4 Cycles ALU2 operations, 3 input operands
817 def : InstRW<[P10W_F2_4C, P10W_DISP_ANY, P10F2_Read, P10F2_Read, P10F2_Read],
823 // Single crack instructions
824 // 4 Cycles ALU2 operations, 1 input operands
825 def : InstRW<[P10W_F2_4C, P10W_DISP_EVEN, P10W_DISP_ANY, P10F2_Read],
833 // Single crack instructions
834 // 4 Cycles ALU2 operations, 2 input operands
835 def : InstRW<[P10W_F2_4C, P10W_DISP_EVEN, P10W_DISP_ANY, P10F2_Read, P10F2_Read],
843 // 2-way crack instructions
844 // 4 Cycles ALU2 operations, and 4 Cycles Permute operations, 2 input operands
845 def : InstRW<[P10W_F2_4C, P10W_DISP_EVEN, P10W_PM_4C, P10W_DISP_ANY],
854 // 2-way crack instructions
855 // 4 Cycles ALU2 operations, and 4 Cycles Permute operations, 3 input operands
856 def : InstRW<[P10W_F2_4C, P10W_DISP_EVEN, P10W_PM_4C, P10W_DISP_ANY],
861 // 2-way crack instructions
862 // 4 Cycles ALU2 operations, and 4 Cycles ALU2 operations, 0 input operands
863 def : InstRW<[P10W_F2_4C, P10W_DISP_PAIR, P10W_F2_4C],
868 // 2 Cycles ALU operations, 1 input operands
869 def : InstRW<[P10W_FX_2C, P10W_DISP_ANY, P10FX_Read],
871 MTCTR, MTCTR8, MTCTR8loop, MTCTRloop,
875 // 3 Cycles ALU operations, 0 input operands
876 def : InstRW<[P10W_FX_3C, P10W_DISP_ANY],
885 // 3 Cycles ALU operations, 1 input operands
886 def : InstRW<[P10W_FX_3C, P10W_DISP_ANY, P10FX_Read],
888 ADDI, ADDI8, ADDIdtprelL32, ADDItlsldLADDR32, ADDItocL, LI, LI8,
890 ADDIS, ADDIS8, ADDISdtprelHA32, ADDIStocHA, ADDIStocHA8, LIS, LIS8,
896 ANDIS8_rec, ANDIS_rec,
899 EXTSB, EXTSB8, EXTSB8_32_64,
900 EXTSB8_rec, EXTSB_rec,
901 EXTSH, EXTSH8, EXTSH8_32_64,
902 EXTSH8_rec, EXTSH_rec,
903 EXTSW, EXTSW_32, EXTSW_32_64,
904 EXTSW_32_64_rec, EXTSW_rec,
905 EXTSWSLI, EXTSWSLI_32_64,
921 NOP, NOP_GT_PWR6, NOP_GT_PWR7, ORI, ORI8,
924 RLDICL, RLDICL_32, RLDICL_32_64,
970 // 3 Cycles ALU operations, 2 input operands
971 def : InstRW<[P10W_FX_3C, P10W_DISP_ANY, P10FX_Read, P10FX_Read],
973 ADD4, ADD4TLS, ADD8, ADD8TLS, ADD8TLS_,
988 CR6SET, CREQV, CRSET,
993 CR6UNSET, CRUNSET, CRXOR,
994 DST, DST64, DSTT, DSTT64,
995 DSTST, DSTST64, DSTSTT, DSTSTT64,
1000 NAND8_rec, NAND_rec,
1019 SUBF8_rec, SUBF_rec,
1092 VXOR, V_SET0, V_SET0B, V_SET0H,
1110 XXLXOR, XXLXORdpz, XXLXORspz, XXLXORz
1113 // 3 Cycles ALU operations, 3 input operands
1114 def : InstRW<[P10W_FX_3C, P10W_DISP_ANY, P10FX_Read, P10FX_Read, P10FX_Read],
1123 // Single crack instructions
1124 // 3 Cycles ALU operations, 0 input operands
1125 def : InstRW<[P10W_FX_3C, P10W_DISP_EVEN, P10W_DISP_ANY],
1139 // Single crack instructions
1140 // 3 Cycles ALU operations, 1 input operands
1141 def : InstRW<[P10W_FX_3C, P10W_DISP_EVEN, P10W_DISP_ANY, P10FX_Read],
1144 ADDME8_rec, ADDME_rec,
1145 ADDME8O_rec, ADDMEO_rec,
1146 ADDZE8_rec, ADDZE_rec,
1147 ADDZE8O_rec, ADDZEO_rec,
1152 NEG8O_rec, NEGO_rec,
1153 SUBFME8_rec, SUBFME_rec,
1154 SUBFME8O_rec, SUBFMEO_rec,
1155 SUBFZE8_rec, SUBFZE_rec,
1156 SUBFZE8O_rec, SUBFZEO_rec,
1161 // Single crack instructions
1162 // 3 Cycles ALU operations, 2 input operands
1163 def : InstRW<[P10W_FX_3C, P10W_DISP_EVEN, P10W_DISP_ANY, P10FX_Read, P10FX_Read],
1165 ADDE8_rec, ADDE_rec,
1166 ADDE8O_rec, ADDEO_rec,
1167 ADD4O_rec, ADD8O_rec,
1168 SUBFE8_rec, SUBFE_rec,
1169 SUBFE8O_rec, SUBFEO_rec,
1170 SUBF8O_rec, SUBFO_rec
1173 // 2-way crack instructions
1174 // 3 Cycles ALU operations, and 4 Cycles ALU2 operations, 2 input operands
1175 def : InstRW<[P10W_FX_3C, P10W_DISP_EVEN, P10W_F2_4C, P10W_DISP_ANY],
1180 // 2-way crack instructions
1181 // 3 Cycles ALU operations, and 3 Cycles ALU operations, 0 input operands
1182 def : InstRW<[P10W_FX_3C, P10W_DISP_EVEN, P10W_FX_3C, P10W_DISP_ANY],
1195 // 2-way crack instructions
1196 // 3 Cycles ALU operations, and 3 Cycles ALU operations, 1 input operands
1197 def : InstRW<[P10W_FX_3C, P10W_DISP_EVEN, P10W_FX_3C, P10W_DISP_ANY, P10FX_Read],
1199 FABSD_rec, FABSS_rec,
1201 FNABSD_rec, FNABSS_rec,
1202 FNEGD_rec, FNEGS_rec,
1207 // 2-way crack instructions
1208 // 3 Cycles ALU operations, and 3 Cycles ALU operations, 2 input operands
1209 def : InstRW<[P10W_FX_3C, P10W_DISP_EVEN, P10W_FX_3C, P10W_DISP_ANY, P10FX_Read, P10FX_Read],
1212 ADDC8_rec, ADDC_rec,
1214 FCPSGND_rec, FCPSGNS_rec,
1216 SUBFC8_rec, SUBFC_rec,
1220 // 4-way crack instructions
1221 // 3 Cycles ALU operations, 3 Cycles ALU operations, 3 Cycles ALU operations, and 3 Cycles ALU operations, 2 input operands
1222 def : InstRW<[P10W_FX_3C, P10W_DISP_EVEN, P10W_FX_3C, P10W_DISP_ANY, P10W_FX_3C, P10W_DISP_ANY, P10W_FX_3C, P10W_DISP_ANY, P10FX_Read, P10FX_Read],
1224 ADDC8O_rec, ADDCO_rec,
1225 SUBFC8O_rec, SUBFCO_rec
1228 // 2-way crack instructions
1229 // 3 Cycles ALU operations, and 4 Cycles Permute operations, 1 input operands
1230 def : InstRW<[P10W_FX_3C, P10W_DISP_EVEN, P10W_PM_4C, P10W_DISP_ANY],
1238 // 2-way crack instructions
1239 // 3 Cycles ALU operations, and 3 Cycles ALU operations, 1 input operands
1240 def : InstRW<[P10W_FX_3C, P10W_DISP_PAIR, P10W_FX_3C, P10FX_Read],
1245 // 6 Cycles Load operations, 0 input operands
1246 def : InstRW<[P10W_LD_6C, P10W_DISP_ANY],
1249 LD, LDtoc, LDtocBA, LDtocCPT, LDtocJTI, LDtocL, SPILLTOVSR_LD,
1250 DFLOADf32, DFLOADf64, LFD,
1254 LWZ, LWZ8, LWZtoc, LWZtocL,
1259 // 6 Cycles Load operations, 1 input operands
1260 def : InstRW<[P10W_LD_6C, P10W_DISP_ANY, P10LD_Read],
1266 // 6 Cycles Load operations, 2 input operands
1267 def : InstRW<[P10W_LD_6C, P10W_DISP_ANY, P10LD_Read, P10LD_Read],
1272 LBZX, LBZX8, LBZXTLS, LBZXTLS_, LBZXTLS_32,
1274 LDX, LDXTLS, LDXTLS_, SPILLTOVSR_LDX,
1275 LFDX, LFDXTLS, LFDXTLS_, XFLOADf32, XFLOADf64,
1278 LHAX, LHAX8, LHAXTLS, LHAXTLS_, LHAXTLS_32,
1280 LHZX, LHZX8, LHZXTLS, LHZXTLS_, LHZXTLS_32,
1286 LWAX, LWAXTLS, LWAXTLS_, LWAXTLS_32, LWAX_32,
1288 LWZX, LWZX8, LWZXTLS, LWZXTLS_, LWZXTLS_32,
1307 // 2-way crack instructions
1308 // 6 Cycles Load operations, and 13 Cycles Decimal Floating Point operations, 1 input operands
1309 def : InstRW<[P10W_LD_6C, P10W_DISP_EVEN, P10W_DF_13C, P10W_DISP_ANY],
1315 // Single crack instructions
1316 // 6 Cycles Load operations, 0 input operands
1317 def : InstRW<[P10W_LD_6C, P10W_DISP_EVEN, P10W_DISP_ANY],
1323 // Single crack instructions
1324 // 6 Cycles Load operations, 1 input operands
1325 def : InstRW<[P10W_LD_6C, P10W_DISP_EVEN, P10W_DISP_ANY, P10LD_Read],
1327 MTSPR, MTSPR8, MTSR, MTUDSCR, MTVRSAVE, MTVRSAVEv,
1334 // Single crack instructions
1335 // 6 Cycles Load operations, 2 input operands
1336 def : InstRW<[P10W_LD_6C, P10W_DISP_EVEN, P10W_DISP_ANY, P10LD_Read, P10LD_Read],
1348 // Expand instructions
1349 // 6 Cycles Load operations, 6 Cycles Load operations, 6 Cycles Load operations, and 6 Cycles Load operations, 0 input operands
1350 def : InstRW<[P10W_LD_6C, P10W_DISP_EVEN, P10W_LD_6C, P10W_DISP_ANY, P10W_LD_6C, P10W_DISP_ANY, P10W_LD_6C, P10W_DISP_ANY],
1355 // Expand instructions
1356 // 6 Cycles Load operations, 6 Cycles Load operations, 6 Cycles Load operations, and 6 Cycles Load operations, 1 input operands
1357 def : InstRW<[P10W_LD_6C, P10W_DISP_EVEN, P10W_LD_6C, P10W_DISP_ANY, P10W_LD_6C, P10W_DISP_ANY, P10W_LD_6C, P10W_DISP_ANY, P10LD_Read],
1362 // 2-way crack instructions
1363 // 6 Cycles Load operations, and 3 Cycles Simple Fixed-point (SFX) operations, 0 input operands
1364 def : InstRW<[P10W_LD_6C, P10W_DISP_EVEN, P10W_SX_3C, P10W_DISP_ANY],
1374 // 2-way crack instructions
1375 // 6 Cycles Load operations, and 3 Cycles Simple Fixed-point (SFX) operations, 2 input operands
1376 def : InstRW<[P10W_LD_6C, P10W_DISP_EVEN, P10W_SX_3C, P10W_DISP_ANY],
1387 // 6 Cycles Load operations, 0 input operands
1388 def : InstRW<[P10W_LD_6C, P10W_DISP_PAIR],
1390 PLBZ, PLBZ8, PLBZ8pc, PLBZpc,
1394 PLHA, PLHA8, PLHA8pc, PLHApc,
1395 PLHZ, PLHZ8, PLHZ8pc, PLHZpc,
1396 PLWA, PLWA8, PLWA8pc, PLWApc,
1397 PLWZ, PLWZ8, PLWZ8pc, PLWZpc,
1404 // 2-way crack instructions
1405 // 6 Cycles Load operations, and 4 Cycles ALU2 operations, 0 input operands
1406 def : InstRW<[P10W_LD_6C, P10W_DISP_PAIR, P10W_F2_4C],
1412 // 2-way crack instructions
1413 // 6 Cycles Load operations, and 4 Cycles ALU2 operations, 2 input operands
1414 def : InstRW<[P10W_LD_6C, P10W_DISP_PAIR, P10W_F2_4C],
1416 LFSX, LFSXTLS, LFSXTLS_,
1420 // 4-way crack instructions
1421 // 6 Cycles Load operations, 4 Cycles ALU2 operations, 3 Cycles Simple Fixed-point (SFX) operations, and 3 Cycles ALU operations, 0 input operands
1422 def : InstRW<[P10W_LD_6C, P10W_DISP_PAIR, P10W_F2_4C, P10W_SX_3C, P10W_DISP_ANY, P10W_FX_3C, P10W_DISP_ANY],
1427 // 4-way crack instructions
1428 // 6 Cycles Load operations, 4 Cycles ALU2 operations, 3 Cycles Simple Fixed-point (SFX) operations, and 3 Cycles ALU operations, 2 input operands
1429 def : InstRW<[P10W_LD_6C, P10W_DISP_PAIR, P10W_F2_4C, P10W_SX_3C, P10W_DISP_ANY, P10W_FX_3C, P10W_DISP_ANY],
1434 // 2-way crack instructions
1435 // 6 Cycles Load operations, and 6 Cycles Load operations, 1 input operands
1436 def : InstRW<[P10W_LD_6C, P10W_DISP_PAIR, P10W_LD_6C, P10W_DISP_PAIR, P10LD_Read],
1441 // 2-way crack instructions
1442 // 6 Cycles Load operations, and 6 Cycles Load operations, 2 input operands
1443 def : InstRW<[P10W_LD_6C, P10W_DISP_PAIR, P10W_LD_6C, P10W_DISP_PAIR, P10LD_Read, P10LD_Read],
1448 // 2-way crack instructions
1449 // 6 Cycles Load operations, and 3 Cycles Simple Fixed-point (SFX) operations, 0 input operands
1450 def : InstRW<[P10W_LD_6C, P10W_DISP_PAIR, P10W_SX_3C],
1455 // 2-way crack instructions
1456 // 6 Cycles Load operations, and 3 Cycles Simple Fixed-point (SFX) operations, 2 input operands
1457 def : InstRW<[P10W_LD_6C, P10W_DISP_PAIR, P10W_SX_3C],
1462 // Single crack instructions
1463 // 13 Cycles Unknown operations, 1 input operands
1464 def : InstRW<[P10W_MFL_13C, P10W_DISP_EVEN, P10W_DISP_ANY],
1466 MFSPR, MFSPR8, MFSR, MFTB8, MFUDSCR, MFVRSAVE, MFVRSAVEv
1469 // 10 Cycles SIMD Matrix Multiply Engine operations, 0 input operands
1470 def : InstRW<[P10W_MM_10C, P10W_DISP_ANY],
1475 // 10 Cycles SIMD Matrix Multiply Engine operations, 2 input operands
1476 def : InstRW<[P10W_MM_10C, P10W_DISP_ANY, P10MM_Read, P10MM_Read],
1488 // 10 Cycles SIMD Matrix Multiply Engine operations, 3 input operands
1489 def : InstRW<[P10W_MM_10C, P10W_DISP_ANY, P10MM_Read, P10MM_Read, P10MM_Read],
1514 // 10 Cycles SIMD Matrix Multiply Engine operations, 2 input operands
1515 def : InstRW<[P10W_MM_10C, P10W_DISP_PAIR, P10MM_Read, P10MM_Read],
1527 // 10 Cycles SIMD Matrix Multiply Engine operations, 3 input operands
1528 def : InstRW<[P10W_MM_10C, P10W_DISP_PAIR, P10MM_Read, P10MM_Read, P10MM_Read],
1553 // 2-way crack instructions
1554 // 10 Cycles SIMD Matrix Multiply Engine operations, and 3 Cycles ALU operations, 1 input operands
1555 def : InstRW<[P10W_MM_10C, P10W_DISP_PAIR, P10W_FX_3C],
1560 // 4-way crack instructions
1561 // 10 Cycles SIMD Matrix Multiply Engine operations, 3 Cycles ALU operations, 10 Cycles SIMD Matrix Multiply Engine operations, and 3 Cycles ALU operations, 1 input operands
1562 def : InstRW<[P10W_MM_10C, P10W_DISP_PAIR, P10W_FX_3C, P10W_MM_10C, P10W_DISP_PAIR, P10W_FX_3C],
1567 // 5 Cycles GPR Multiply operations, 1 input operands
1568 def : InstRW<[P10W_MU_5C, P10W_DISP_ANY, P10MU_Read],
1573 // 5 Cycles GPR Multiply operations, 2 input operands
1574 def : InstRW<[P10W_MU_5C, P10W_DISP_ANY, P10MU_Read, P10MU_Read],
1589 // 5 Cycles GPR Multiply operations, 3 input operands
1590 def : InstRW<[P10W_MU_5C, P10W_DISP_ANY, P10MU_Read, P10MU_Read, P10MU_Read],
1597 // 2-way crack instructions
1598 // 5 Cycles GPR Multiply operations, and 3 Cycles ALU operations, 2 input operands
1599 def : InstRW<[P10W_MU_5C, P10W_DISP_EVEN, P10W_FX_3C, P10W_DISP_ANY],
1611 // 4 Cycles Permute operations, 0 input operands
1612 def : InstRW<[P10W_PM_4C, P10W_DISP_ANY],
1617 VSPLTISW, V_SETALLONES, V_SETALLONESB, V_SETALLONESH,
1621 // 4 Cycles Permute operations, 1 input operands
1622 def : InstRW<[P10W_PM_4C, P10W_DISP_ANY, P10PM_Read],
1666 // 4 Cycles Permute operations, 2 input operands
1667 def : InstRW<[P10W_PM_4C, P10W_DISP_ANY, P10PM_Read, P10PM_Read],
1718 XXPERMDI, XXPERMDIs,
1722 // 4 Cycles Permute operations, 3 input operands
1723 def : InstRW<[P10W_PM_4C, P10W_DISP_ANY, P10PM_Read, P10PM_Read, P10PM_Read],
1754 // 2-way crack instructions
1755 // 4 Cycles Permute operations, and 7 Cycles VMX Multiply operations, 2 input operands
1756 def : InstRW<[P10W_PM_4C, P10W_DISP_EVEN, P10W_vMU_7C, P10W_DISP_ANY],
1761 // 4 Cycles Permute operations, 0 input operands
1762 def : InstRW<[P10W_PM_4C, P10W_DISP_PAIR],
1768 // 4 Cycles Permute operations, 1 input operands
1769 def : InstRW<[P10W_PM_4C, P10W_DISP_PAIR, P10PM_Read],
1774 // 4 Cycles Permute operations, 3 input operands
1775 def : InstRW<[P10W_PM_4C, P10W_DISP_PAIR, P10PM_Read, P10PM_Read, P10PM_Read],
1785 // 3 Cycles Store operations, 1 input operands
1786 def : InstRW<[P10W_ST_3C, P10W_DISP_ANY, P10ST_Read],
1793 DFSTOREf32, DFSTOREf64, STFD,
1806 // 3 Cycles Store operations, 2 input operands
1807 def : InstRW<[P10W_ST_3C, P10W_DISP_ANY, P10ST_Read, P10ST_Read],
1818 // 3 Cycles Store operations, 3 input operands
1819 def : InstRW<[P10W_ST_3C, P10W_DISP_ANY, P10ST_Read, P10ST_Read, P10ST_Read],
1822 STBX, STBX8, STBXTLS, STBXTLS_, STBXTLS_32,
1825 SPILLTOVSR_STX, STDX, STDXTLS, STDXTLS_,
1827 STFDX, STFDXTLS, STFDXTLS_,
1830 STFSX, STFSXTLS, STFSXTLS_,
1833 STHX, STHX8, STHXTLS, STHXTLS_, STHXTLS_32,
1841 STWX, STWX8, STWXTLS, STWXTLS_, STWXTLS_32,
1858 // Single crack instructions
1859 // 3 Cycles Store operations, 0 input operands
1860 def : InstRW<[P10W_ST_3C, P10W_DISP_EVEN, P10W_DISP_ANY],
1870 // Single crack instructions
1871 // 3 Cycles Store operations, 2 input operands
1872 def : InstRW<[P10W_ST_3C, P10W_DISP_EVEN, P10W_DISP_ANY, P10ST_Read, P10ST_Read],
1874 CP_PASTE8_rec, CP_PASTE_rec,
1879 // Single crack instructions
1880 // 3 Cycles Store operations, 3 input operands
1881 def : InstRW<[P10W_ST_3C, P10W_DISP_EVEN, P10W_DISP_ANY, P10ST_Read, P10ST_Read, P10ST_Read],
1893 // 2-way crack instructions
1894 // 3 Cycles Store operations, and 3 Cycles ALU operations, 0 input operands
1895 def : InstRW<[P10W_ST_3C, P10W_DISP_EVEN, P10W_FX_3C, P10W_DISP_ANY],
1901 // Expand instructions
1902 // 3 Cycles Store operations, 3 Cycles ALU operations, 3 Cycles Store operations, 3 Cycles ALU operations, 3 Cycles Store operations, 3 Cycles ALU operations, 6 Cycles Load operations, and 3 Cycles Store operations, 1 input operands
1903 def : InstRW<[P10W_ST_3C, P10W_DISP_EVEN, P10W_FX_3C, P10W_DISP_ANY, P10W_ST_3C, P10W_DISP_ANY, P10W_FX_3C, P10W_DISP_ANY, P10W_ST_3C, P10W_DISP_ANY, P10W_FX_3C, P10W_DISP_ANY, P10W_LD_6C, P10W_DISP_ANY, P10W_ST_3C, P10W_DISP_ANY],
1909 // 4-way crack instructions
1910 // 3 Cycles Store operations, 3 Cycles ALU operations, 3 Cycles Store operations, and 3 Cycles Store operations, 2 input operands
1911 def : InstRW<[P10W_ST_3C, P10W_DISP_EVEN, P10W_FX_3C, P10W_DISP_ANY, P10W_ST_3C, P10W_DISP_ANY, P10W_ST_3C, P10W_DISP_ANY],
1917 // Expand instructions
1918 // 3 Cycles Store operations, 3 Cycles Store operations, 3 Cycles Store operations, and 3 Cycles Store operations, 1 input operands
1919 def : InstRW<[P10W_ST_3C, P10W_DISP_EVEN, P10W_ST_3C, P10W_DISP_ANY, P10W_ST_3C, P10W_DISP_ANY, P10W_ST_3C, P10W_DISP_ANY, P10ST_Read],
1924 // Expand instructions
1925 // 3 Cycles Store operations, 3 Cycles Store operations, 3 Cycles Store operations, and 3 Cycles Store operations, 2 input operands
1926 def : InstRW<[P10W_ST_3C, P10W_DISP_EVEN, P10W_ST_3C, P10W_DISP_ANY, P10W_ST_3C, P10W_DISP_ANY, P10W_ST_3C, P10W_DISP_ANY, P10ST_Read, P10ST_Read],
1931 // 3 Cycles Store operations, 1 input operands
1932 def : InstRW<[P10W_ST_3C, P10W_DISP_PAIR, P10ST_Read],
1934 PSTB, PSTB8, PSTB8pc, PSTBpc,
1938 PSTH, PSTH8, PSTH8pc, PSTHpc,
1939 PSTW, PSTW8, PSTW8pc, PSTWpc,
1945 // 2-way crack instructions
1946 // 3 Cycles Store operations, and 3 Cycles Store operations, 1 input operands
1947 def : InstRW<[P10W_ST_3C, P10W_DISP_PAIR, P10W_ST_3C, P10ST_Read],
1952 // 2-way crack instructions
1953 // 3 Cycles Store operations, and 3 Cycles Store operations, 3 input operands
1954 def : InstRW<[P10W_ST_3C, P10W_DISP_PAIR, P10W_ST_3C, P10ST_Read, P10ST_Read, P10ST_Read],
1959 // FIXME - Miss scheduling information from datasheet
1960 // Temporary set it as 1 Cycles Simple Fixed-point (SFX) operations, 0 input operands
1961 def : InstRW<[P10W_SX, P10W_DISP_ANY],
1992 // Single crack instructions
1993 // 3 Cycles Simple Fixed-point (SFX) operations, 0 input operands
1994 def : InstRW<[P10W_SX_3C, P10W_DISP_EVEN, P10W_DISP_ANY],
2002 // Single crack instructions
2003 // 3 Cycles Simple Fixed-point (SFX) operations, 1 input operands
2004 def : InstRW<[P10W_SX_3C, P10W_DISP_EVEN, P10W_DISP_ANY, P10SX_Read],
2010 // 2-way crack instructions
2011 // 3 Cycles Simple Fixed-point (SFX) operations, and 3 Cycles ALU operations, 0 input operands
2012 def : InstRW<[P10W_SX_3C, P10W_DISP_EVEN, P10W_FX_3C, P10W_DISP_ANY],
2017 // 3 Cycles Simple Fixed-point (SFX) operations, 1 input operands
2018 def : InstRW<[P10W_SX_3C, P10W_DISP_PAIR, P10SX_Read],
2020 PADDI, PADDI8, PADDI8pc, PADDIpc, PLI, PLI8
2023 // 7 Cycles VMX Multiply operations, 2 input operands
2024 def : InstRW<[P10W_vMU_7C, P10W_DISP_ANY, P10vMU_Read, P10vMU_Read],
2051 // 7 Cycles VMX Multiply operations, 3 input operands
2052 def : InstRW<[P10W_vMU_7C, P10W_DISP_ANY, P10vMU_Read, P10vMU_Read, P10vMU_Read],