1 //===-- CoalesceBranches.cpp - Coalesce blocks with the same condition ---===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 /// Coalesce basic blocks guarded by the same branch condition into a single
13 //===----------------------------------------------------------------------===//
16 #include "llvm/ADT/BitVector.h"
17 #include "llvm/ADT/Statistic.h"
18 #include "llvm/CodeGen/MachineDominators.h"
19 #include "llvm/CodeGen/MachineFunctionPass.h"
20 #include "llvm/CodeGen/MachinePostDominators.h"
21 #include "llvm/CodeGen/MachineRegisterInfo.h"
22 #include "llvm/CodeGen/Passes.h"
23 #include "llvm/CodeGen/TargetFrameLowering.h"
24 #include "llvm/CodeGen/TargetInstrInfo.h"
25 #include "llvm/CodeGen/TargetSubtargetInfo.h"
26 #include "llvm/InitializePasses.h"
27 #include "llvm/Support/Debug.h"
31 #define DEBUG_TYPE "ppc-branch-coalescing"
33 STATISTIC(NumBlocksCoalesced, "Number of blocks coalesced");
34 STATISTIC(NumPHINotMoved, "Number of PHI Nodes that cannot be merged");
35 STATISTIC(NumBlocksNotCoalesced, "Number of blocks not coalesced");
37 //===----------------------------------------------------------------------===//
38 // PPCBranchCoalescing
39 //===----------------------------------------------------------------------===//
41 /// Improve scheduling by coalescing branches that depend on the same condition.
42 /// This pass looks for blocks that are guarded by the same branch condition
43 /// and attempts to merge the blocks together. Such opportunities arise from
44 /// the expansion of select statements in the IR.
46 /// This pass does not handle implicit operands on branch statements. In order
47 /// to run on targets that use implicit operands, changes need to be made in the
48 /// canCoalesceBranch and canMerge methods.
50 /// Example: the following LLVM IR
52 /// %test = icmp eq i32 %x 0
53 /// %tmp1 = select i1 %test, double %a, double 2.000000e-03
54 /// %tmp2 = select i1 %test, double %b, double 5.000000e-03
56 /// expands to the following machine code:
58 /// %bb.0: derived from LLVM BB %entry
59 /// liveins: %f1 %f3 %x6
61 /// %0 = COPY %f1; F8RC:%0
62 /// %5 = CMPLWI killed %4, 0; CRRC:%5 GPRC:%4
63 /// %8 = LXSDX %zero8, killed %7, implicit %rm;
64 /// mem:LD8[ConstantPool] F8RC:%8 G8RC:%7
65 /// BCC 76, %5, <%bb.2>; CRRC:%5
66 /// Successors according to CFG: %bb.1(?%) %bb.2(?%)
68 /// %bb.1: derived from LLVM BB %entry
69 /// Predecessors according to CFG: %bb.0
70 /// Successors according to CFG: %bb.2(?%)
72 /// %bb.2: derived from LLVM BB %entry
73 /// Predecessors according to CFG: %bb.0 %bb.1
74 /// %9 = PHI %8, <%bb.1>, %0, <%bb.0>;
77 /// BCC 76, %5, <%bb.4>; CRRC:%5
78 /// Successors according to CFG: %bb.3(?%) %bb.4(?%)
80 /// %bb.3: derived from LLVM BB %entry
81 /// Predecessors according to CFG: %bb.2
82 /// Successors according to CFG: %bb.4(?%)
84 /// %bb.4: derived from LLVM BB %entry
85 /// Predecessors according to CFG: %bb.2 %bb.3
86 /// %13 = PHI %12, <%bb.3>, %2, <%bb.2>;
89 /// BLR8 implicit %lr8, implicit %rm, implicit %f1
91 /// When this pattern is detected, branch coalescing will try to collapse
92 /// it by moving code in %bb.2 to %bb.0 and/or %bb.4 and removing %bb.3.
94 /// If all conditions are meet, IR should collapse to:
96 /// %bb.0: derived from LLVM BB %entry
97 /// liveins: %f1 %f3 %x6
99 /// %0 = COPY %f1; F8RC:%0
100 /// %5 = CMPLWI killed %4, 0; CRRC:%5 GPRC:%4
101 /// %8 = LXSDX %zero8, killed %7, implicit %rm;
102 /// mem:LD8[ConstantPool] F8RC:%8 G8RC:%7
104 /// BCC 76, %5, <%bb.4>; CRRC:%5
105 /// Successors according to CFG: %bb.1(0x2aaaaaaa / 0x80000000 = 33.33%)
106 /// %bb.4(0x55555554 / 0x80000000 = 66.67%)
108 /// %bb.1: derived from LLVM BB %entry
109 /// Predecessors according to CFG: %bb.0
110 /// Successors according to CFG: %bb.4(0x40000000 / 0x80000000 = 50.00%)
112 /// %bb.4: derived from LLVM BB %entry
113 /// Predecessors according to CFG: %bb.0 %bb.1
114 /// %9 = PHI %8, <%bb.1>, %0, <%bb.0>;
116 /// %13 = PHI %12, <%bb.1>, %2, <%bb.0>;
119 /// BLR8 implicit %lr8, implicit %rm, implicit %f1
121 /// Branch Coalescing does not split blocks, it moves everything in the same
122 /// direction ensuring it does not break use/definition semantics.
124 /// PHI nodes and its corresponding use instructions are moved to its successor
125 /// block if there are no uses within the successor block PHI nodes. PHI
126 /// node ordering cannot be assumed.
128 /// Non-PHI can be moved up to the predecessor basic block or down to the
129 /// successor basic block following any PHI instructions. Whether it moves
130 /// up or down depends on whether the register(s) defined in the instructions
131 /// are used in current block or in any PHI instructions at the beginning of
132 /// the successor block.
136 class PPCBranchCoalescing : public MachineFunctionPass {
137 struct CoalescingCandidateInfo {
138 MachineBasicBlock *BranchBlock; // Block containing the branch
139 MachineBasicBlock *BranchTargetBlock; // Block branched to
140 MachineBasicBlock *FallThroughBlock; // Fall-through if branch not taken
141 SmallVector<MachineOperand, 4> Cond;
145 CoalescingCandidateInfo();
149 MachineDominatorTree *MDT;
150 MachinePostDominatorTree *MPDT;
151 const TargetInstrInfo *TII;
152 MachineRegisterInfo *MRI;
154 void initialize(MachineFunction &F);
155 bool canCoalesceBranch(CoalescingCandidateInfo &Cand);
156 bool identicalOperands(ArrayRef<MachineOperand> OperandList1,
157 ArrayRef<MachineOperand> OperandList2) const;
158 bool validateCandidates(CoalescingCandidateInfo &SourceRegion,
159 CoalescingCandidateInfo &TargetRegion) const;
164 PPCBranchCoalescing() : MachineFunctionPass(ID) {
165 initializePPCBranchCoalescingPass(*PassRegistry::getPassRegistry());
168 void getAnalysisUsage(AnalysisUsage &AU) const override {
169 AU.addRequired<MachineDominatorTree>();
170 AU.addRequired<MachinePostDominatorTree>();
171 MachineFunctionPass::getAnalysisUsage(AU);
174 StringRef getPassName() const override { return "Branch Coalescing"; }
176 bool mergeCandidates(CoalescingCandidateInfo &SourceRegion,
177 CoalescingCandidateInfo &TargetRegion);
178 bool canMoveToBeginning(const MachineInstr &MI,
179 const MachineBasicBlock &MBB) const;
180 bool canMoveToEnd(const MachineInstr &MI,
181 const MachineBasicBlock &MBB) const;
182 bool canMerge(CoalescingCandidateInfo &SourceRegion,
183 CoalescingCandidateInfo &TargetRegion) const;
184 void moveAndUpdatePHIs(MachineBasicBlock *SourceRegionMBB,
185 MachineBasicBlock *TargetRegionMBB);
186 bool runOnMachineFunction(MachineFunction &MF) override;
188 } // End anonymous namespace.
190 char PPCBranchCoalescing::ID = 0;
191 /// createPPCBranchCoalescingPass - returns an instance of the Branch Coalescing
193 FunctionPass *llvm::createPPCBranchCoalescingPass() {
194 return new PPCBranchCoalescing();
197 INITIALIZE_PASS_BEGIN(PPCBranchCoalescing, DEBUG_TYPE,
198 "Branch Coalescing", false, false)
199 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
200 INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree)
201 INITIALIZE_PASS_END(PPCBranchCoalescing, DEBUG_TYPE, "Branch Coalescing",
204 PPCBranchCoalescing::CoalescingCandidateInfo::CoalescingCandidateInfo()
205 : BranchBlock(nullptr), BranchTargetBlock(nullptr),
206 FallThroughBlock(nullptr), MustMoveDown(false), MustMoveUp(false) {}
208 void PPCBranchCoalescing::CoalescingCandidateInfo::clear() {
209 BranchBlock = nullptr;
210 BranchTargetBlock = nullptr;
211 FallThroughBlock = nullptr;
213 MustMoveDown = false;
217 void PPCBranchCoalescing::initialize(MachineFunction &MF) {
218 MDT = &getAnalysis<MachineDominatorTree>();
219 MPDT = &getAnalysis<MachinePostDominatorTree>();
220 TII = MF.getSubtarget().getInstrInfo();
221 MRI = &MF.getRegInfo();
225 /// Analyze the branch statement to determine if it can be coalesced. This
226 /// method analyses the branch statement for the given candidate to determine
227 /// if it can be coalesced. If the branch can be coalesced, then the
228 /// BranchTargetBlock and the FallThroughBlock are recorded in the specified
231 ///\param[in,out] Cand The coalescing candidate to analyze
232 ///\return true if and only if the branch can be coalesced, false otherwise
234 bool PPCBranchCoalescing::canCoalesceBranch(CoalescingCandidateInfo &Cand) {
235 LLVM_DEBUG(dbgs() << "Determine if branch block "
236 << Cand.BranchBlock->getNumber() << " can be coalesced:");
237 MachineBasicBlock *FalseMBB = nullptr;
239 if (TII->analyzeBranch(*Cand.BranchBlock, Cand.BranchTargetBlock, FalseMBB,
241 LLVM_DEBUG(dbgs() << "TII unable to Analyze Branch - skip\n");
245 for (auto &I : Cand.BranchBlock->terminators()) {
246 LLVM_DEBUG(dbgs() << "Looking at terminator : " << I << "\n");
250 // The analyzeBranch method does not include any implicit operands.
251 // This is not an issue on PPC but must be handled on other targets.
252 // For this pass to be made target-independent, the analyzeBranch API
253 // need to be updated to support implicit operands and there would
254 // need to be a way to verify that any implicit operands would not be
255 // clobbered by merging blocks. This would include identifying the
256 // implicit operands as well as the basic block they are defined in.
257 // This could be done by changing the analyzeBranch API to have it also
258 // record and return the implicit operands and the blocks where they are
259 // defined. Alternatively, the BranchCoalescing code would need to be
260 // extended to identify the implicit operands. The analysis in canMerge
261 // must then be extended to prove that none of the implicit operands are
262 // changed in the blocks that are combined during coalescing.
263 if (I.getNumOperands() != I.getNumExplicitOperands()) {
264 LLVM_DEBUG(dbgs() << "Terminator contains implicit operands - skip : "
270 if (Cand.BranchBlock->isEHPad() || Cand.BranchBlock->hasEHPadSuccessor()) {
271 LLVM_DEBUG(dbgs() << "EH Pad - skip\n");
275 // For now only consider triangles (i.e, BranchTargetBlock is set,
276 // FalseMBB is null, and BranchTargetBlock is a successor to BranchBlock)
277 if (!Cand.BranchTargetBlock || FalseMBB ||
278 !Cand.BranchBlock->isSuccessor(Cand.BranchTargetBlock)) {
279 LLVM_DEBUG(dbgs() << "Does not form a triangle - skip\n");
283 // Ensure there are only two successors
284 if (Cand.BranchBlock->succ_size() != 2) {
285 LLVM_DEBUG(dbgs() << "Does not have 2 successors - skip\n");
289 // Sanity check - the block must be able to fall through
290 assert(Cand.BranchBlock->canFallThrough() &&
291 "Expecting the block to fall through!");
293 // We have already ensured there are exactly two successors to
294 // BranchBlock and that BranchTargetBlock is a successor to BranchBlock.
295 // Ensure the single fall though block is empty.
296 MachineBasicBlock *Succ =
297 (*Cand.BranchBlock->succ_begin() == Cand.BranchTargetBlock)
298 ? *Cand.BranchBlock->succ_rbegin()
299 : *Cand.BranchBlock->succ_begin();
301 assert(Succ && "Expecting a valid fall-through block\n");
303 if (!Succ->empty()) {
304 LLVM_DEBUG(dbgs() << "Fall-through block contains code -- skip\n");
308 if (!Succ->isSuccessor(Cand.BranchTargetBlock)) {
311 << "Successor of fall through block is not branch taken block\n");
315 Cand.FallThroughBlock = Succ;
316 LLVM_DEBUG(dbgs() << "Valid Candidate\n");
321 /// Determine if the two operand lists are identical
323 /// \param[in] OpList1 operand list
324 /// \param[in] OpList2 operand list
325 /// \return true if and only if the operands lists are identical
327 bool PPCBranchCoalescing::identicalOperands(
328 ArrayRef<MachineOperand> OpList1, ArrayRef<MachineOperand> OpList2) const {
330 if (OpList1.size() != OpList2.size()) {
331 LLVM_DEBUG(dbgs() << "Operand list is different size\n");
335 for (unsigned i = 0; i < OpList1.size(); ++i) {
336 const MachineOperand &Op1 = OpList1[i];
337 const MachineOperand &Op2 = OpList2[i];
339 LLVM_DEBUG(dbgs() << "Op1: " << Op1 << "\n"
340 << "Op2: " << Op2 << "\n");
342 if (Op1.isIdenticalTo(Op2)) {
343 // filter out instructions with physical-register uses
345 Register::isPhysicalRegister(Op1.getReg())
346 // If the physical register is constant then we can assume the value
347 // has not changed between uses.
348 && !(Op1.isUse() && MRI->isConstantPhysReg(Op1.getReg()))) {
349 LLVM_DEBUG(dbgs() << "The operands are not provably identical.\n");
352 LLVM_DEBUG(dbgs() << "Op1 and Op2 are identical!\n");
356 // If the operands are not identical, but are registers, check to see if the
357 // definition of the register produces the same value. If they produce the
358 // same value, consider them to be identical.
359 if (Op1.isReg() && Op2.isReg() &&
360 Register::isVirtualRegister(Op1.getReg()) &&
361 Register::isVirtualRegister(Op2.getReg())) {
362 MachineInstr *Op1Def = MRI->getVRegDef(Op1.getReg());
363 MachineInstr *Op2Def = MRI->getVRegDef(Op2.getReg());
364 if (TII->produceSameValue(*Op1Def, *Op2Def, MRI)) {
365 LLVM_DEBUG(dbgs() << "Op1Def: " << *Op1Def << " and " << *Op2Def
366 << " produce the same value!\n");
368 LLVM_DEBUG(dbgs() << "Operands produce different values\n");
372 LLVM_DEBUG(dbgs() << "The operands are not provably identical.\n");
381 /// Moves ALL PHI instructions in SourceMBB to beginning of TargetMBB
382 /// and update them to refer to the new block. PHI node ordering
383 /// cannot be assumed so it does not matter where the PHI instructions
384 /// are moved to in TargetMBB.
386 /// \param[in] SourceMBB block to move PHI instructions from
387 /// \param[in] TargetMBB block to move PHI instructions to
389 void PPCBranchCoalescing::moveAndUpdatePHIs(MachineBasicBlock *SourceMBB,
390 MachineBasicBlock *TargetMBB) {
392 MachineBasicBlock::iterator MI = SourceMBB->begin();
393 MachineBasicBlock::iterator ME = SourceMBB->getFirstNonPHI();
396 LLVM_DEBUG(dbgs() << "SourceMBB contains no PHI instructions.\n");
400 // Update all PHI instructions in SourceMBB and move to top of TargetMBB
401 for (MachineBasicBlock::iterator Iter = MI; Iter != ME; Iter++) {
402 MachineInstr &PHIInst = *Iter;
403 for (unsigned i = 2, e = PHIInst.getNumOperands() + 1; i != e; i += 2) {
404 MachineOperand &MO = PHIInst.getOperand(i);
405 if (MO.getMBB() == SourceMBB)
406 MO.setMBB(TargetMBB);
409 TargetMBB->splice(TargetMBB->begin(), SourceMBB, MI, ME);
413 /// This function checks if MI can be moved to the beginning of the TargetMBB
414 /// following PHI instructions. A MI instruction can be moved to beginning of
415 /// the TargetMBB if there are no uses of it within the TargetMBB PHI nodes.
417 /// \param[in] MI the machine instruction to move.
418 /// \param[in] TargetMBB the machine basic block to move to
419 /// \return true if it is safe to move MI to beginning of TargetMBB,
422 bool PPCBranchCoalescing::canMoveToBeginning(const MachineInstr &MI,
423 const MachineBasicBlock &TargetMBB
426 LLVM_DEBUG(dbgs() << "Checking if " << MI << " can move to beginning of "
427 << TargetMBB.getNumber() << "\n");
429 for (auto &Def : MI.defs()) { // Looking at Def
430 for (auto &Use : MRI->use_instructions(Def.getReg())) {
431 if (Use.isPHI() && Use.getParent() == &TargetMBB) {
432 LLVM_DEBUG(dbgs() << " *** used in a PHI -- cannot move ***\n");
438 LLVM_DEBUG(dbgs() << " Safe to move to the beginning.\n");
443 /// This function checks if MI can be moved to the end of the TargetMBB,
444 /// immediately before the first terminator. A MI instruction can be moved
445 /// to then end of the TargetMBB if no PHI node defines what MI uses within
448 /// \param[in] MI the machine instruction to move.
449 /// \param[in] TargetMBB the machine basic block to move to
450 /// \return true if it is safe to move MI to end of TargetMBB,
453 bool PPCBranchCoalescing::canMoveToEnd(const MachineInstr &MI,
454 const MachineBasicBlock &TargetMBB
457 LLVM_DEBUG(dbgs() << "Checking if " << MI << " can move to end of "
458 << TargetMBB.getNumber() << "\n");
460 for (auto &Use : MI.uses()) {
461 if (Use.isReg() && Register::isVirtualRegister(Use.getReg())) {
462 MachineInstr *DefInst = MRI->getVRegDef(Use.getReg());
463 if (DefInst->isPHI() && DefInst->getParent() == MI.getParent()) {
464 LLVM_DEBUG(dbgs() << " *** Cannot move this instruction ***\n");
468 dbgs() << " *** def is in another block -- safe to move!\n");
473 LLVM_DEBUG(dbgs() << " Safe to move to the end.\n");
478 /// This method checks to ensure the two coalescing candidates follows the
479 /// expected pattern required for coalescing.
481 /// \param[in] SourceRegion The candidate to move statements from
482 /// \param[in] TargetRegion The candidate to move statements to
483 /// \return true if all instructions in SourceRegion.BranchBlock can be merged
484 /// into a block in TargetRegion; false otherwise.
486 bool PPCBranchCoalescing::validateCandidates(
487 CoalescingCandidateInfo &SourceRegion,
488 CoalescingCandidateInfo &TargetRegion) const {
490 if (TargetRegion.BranchTargetBlock != SourceRegion.BranchBlock)
491 llvm_unreachable("Expecting SourceRegion to immediately follow TargetRegion");
492 else if (!MDT->dominates(TargetRegion.BranchBlock, SourceRegion.BranchBlock))
493 llvm_unreachable("Expecting TargetRegion to dominate SourceRegion");
494 else if (!MPDT->dominates(SourceRegion.BranchBlock, TargetRegion.BranchBlock))
495 llvm_unreachable("Expecting SourceRegion to post-dominate TargetRegion");
496 else if (!TargetRegion.FallThroughBlock->empty() ||
497 !SourceRegion.FallThroughBlock->empty())
498 llvm_unreachable("Expecting fall-through blocks to be empty");
504 /// This method determines whether the two coalescing candidates can be merged.
505 /// In order to be merged, all instructions must be able to
506 /// 1. Move to the beginning of the SourceRegion.BranchTargetBlock;
507 /// 2. Move to the end of the TargetRegion.BranchBlock.
508 /// Merging involves moving the instructions in the
509 /// TargetRegion.BranchTargetBlock (also SourceRegion.BranchBlock).
511 /// This function first try to move instructions from the
512 /// TargetRegion.BranchTargetBlock down, to the beginning of the
513 /// SourceRegion.BranchTargetBlock. This is not possible if any register defined
514 /// in TargetRegion.BranchTargetBlock is used in a PHI node in the
515 /// SourceRegion.BranchTargetBlock. In this case, check whether the statement
516 /// can be moved up, to the end of the TargetRegion.BranchBlock (immediately
517 /// before the branch statement). If it cannot move, then these blocks cannot
520 /// Note that there is no analysis for moving instructions past the fall-through
521 /// blocks because they are confirmed to be empty. An assert is thrown if they
524 /// \param[in] SourceRegion The candidate to move statements from
525 /// \param[in] TargetRegion The candidate to move statements to
526 /// \return true if all instructions in SourceRegion.BranchBlock can be merged
527 /// into a block in TargetRegion, false otherwise.
529 bool PPCBranchCoalescing::canMerge(CoalescingCandidateInfo &SourceRegion,
530 CoalescingCandidateInfo &TargetRegion) const {
531 if (!validateCandidates(SourceRegion, TargetRegion))
534 // Walk through PHI nodes first and see if they force the merge into the
535 // SourceRegion.BranchTargetBlock.
536 for (MachineBasicBlock::iterator
537 I = SourceRegion.BranchBlock->instr_begin(),
538 E = SourceRegion.BranchBlock->getFirstNonPHI();
540 for (auto &Def : I->defs())
541 for (auto &Use : MRI->use_instructions(Def.getReg())) {
542 if (Use.isPHI() && Use.getParent() == SourceRegion.BranchTargetBlock) {
545 << " defines register used in another "
546 "PHI within branch target block -- can't merge\n");
550 if (Use.getParent() == SourceRegion.BranchBlock) {
551 LLVM_DEBUG(dbgs() << "PHI " << *I
552 << " defines register used in this "
553 "block -- all must move down\n");
554 SourceRegion.MustMoveDown = true;
559 // Walk through the MI to see if they should be merged into
560 // TargetRegion.BranchBlock (up) or SourceRegion.BranchTargetBlock (down)
561 for (MachineBasicBlock::iterator
562 I = SourceRegion.BranchBlock->getFirstNonPHI(),
563 E = SourceRegion.BranchBlock->end();
565 if (!canMoveToBeginning(*I, *SourceRegion.BranchTargetBlock)) {
566 LLVM_DEBUG(dbgs() << "Instruction " << *I
567 << " cannot move down - must move up!\n");
568 SourceRegion.MustMoveUp = true;
570 if (!canMoveToEnd(*I, *TargetRegion.BranchBlock)) {
571 LLVM_DEBUG(dbgs() << "Instruction " << *I
572 << " cannot move up - must move down!\n");
573 SourceRegion.MustMoveDown = true;
577 return (SourceRegion.MustMoveUp && SourceRegion.MustMoveDown) ? false : true;
580 /// Merge the instructions from SourceRegion.BranchBlock,
581 /// SourceRegion.BranchTargetBlock, and SourceRegion.FallThroughBlock into
582 /// TargetRegion.BranchBlock, TargetRegion.BranchTargetBlock and
583 /// TargetRegion.FallThroughBlock respectively.
585 /// The successors for blocks in TargetRegion will be updated to use the
586 /// successors from blocks in SourceRegion. Finally, the blocks in SourceRegion
587 /// will be removed from the function.
589 /// A region consists of a BranchBlock, a FallThroughBlock, and a
590 /// BranchTargetBlock. Branch coalesce works on patterns where the
591 /// TargetRegion's BranchTargetBlock must also be the SourceRegions's
594 /// Before mergeCandidates:
596 /// +---------------------------+
597 /// | TargetRegion.BranchBlock |
598 /// +---------------------------+
600 /// / +--------------------------------+
601 /// | | TargetRegion.FallThroughBlock |
602 /// \ +--------------------------------+
604 /// +----------------------------------+
605 /// | TargetRegion.BranchTargetBlock |
606 /// | SourceRegion.BranchBlock |
607 /// +----------------------------------+
609 /// / +--------------------------------+
610 /// | | SourceRegion.FallThroughBlock |
611 /// \ +--------------------------------+
613 /// +----------------------------------+
614 /// | SourceRegion.BranchTargetBlock |
615 /// +----------------------------------+
617 /// After mergeCandidates:
619 /// +-----------------------------+
620 /// | TargetRegion.BranchBlock |
621 /// | SourceRegion.BranchBlock |
622 /// +-----------------------------+
624 /// / +---------------------------------+
625 /// | | TargetRegion.FallThroughBlock |
626 /// | | SourceRegion.FallThroughBlock |
627 /// \ +---------------------------------+
629 /// +----------------------------------+
630 /// | SourceRegion.BranchTargetBlock |
631 /// +----------------------------------+
633 /// \param[in] SourceRegion The candidate to move blocks from
634 /// \param[in] TargetRegion The candidate to move blocks to
636 bool PPCBranchCoalescing::mergeCandidates(CoalescingCandidateInfo &SourceRegion,
637 CoalescingCandidateInfo &TargetRegion) {
639 if (SourceRegion.MustMoveUp && SourceRegion.MustMoveDown) {
640 llvm_unreachable("Cannot have both MustMoveDown and MustMoveUp set!");
644 if (!validateCandidates(SourceRegion, TargetRegion))
647 // Start the merging process by first handling the BranchBlock.
648 // Move any PHIs in SourceRegion.BranchBlock down to the branch-taken block
649 moveAndUpdatePHIs(SourceRegion.BranchBlock, SourceRegion.BranchTargetBlock);
651 // Move remaining instructions in SourceRegion.BranchBlock into
652 // TargetRegion.BranchBlock
653 MachineBasicBlock::iterator firstInstr =
654 SourceRegion.BranchBlock->getFirstNonPHI();
655 MachineBasicBlock::iterator lastInstr =
656 SourceRegion.BranchBlock->getFirstTerminator();
658 MachineBasicBlock *Source = SourceRegion.MustMoveDown
659 ? SourceRegion.BranchTargetBlock
660 : TargetRegion.BranchBlock;
662 MachineBasicBlock::iterator Target =
663 SourceRegion.MustMoveDown
664 ? SourceRegion.BranchTargetBlock->getFirstNonPHI()
665 : TargetRegion.BranchBlock->getFirstTerminator();
667 Source->splice(Target, SourceRegion.BranchBlock, firstInstr, lastInstr);
669 // Once PHI and instructions have been moved we need to clean up the
672 // Remove SourceRegion.FallThroughBlock before transferring successors of
673 // SourceRegion.BranchBlock to TargetRegion.BranchBlock.
674 SourceRegion.BranchBlock->removeSuccessor(SourceRegion.FallThroughBlock);
675 TargetRegion.BranchBlock->transferSuccessorsAndUpdatePHIs(
676 SourceRegion.BranchBlock);
677 // Update branch in TargetRegion.BranchBlock to jump to
678 // SourceRegion.BranchTargetBlock
679 // In this case, TargetRegion.BranchTargetBlock == SourceRegion.BranchBlock.
680 TargetRegion.BranchBlock->ReplaceUsesOfBlockWith(
681 SourceRegion.BranchBlock, SourceRegion.BranchTargetBlock);
682 // Remove the branch statement(s) in SourceRegion.BranchBlock
683 MachineBasicBlock::iterator I =
684 SourceRegion.BranchBlock->terminators().begin();
685 while (I != SourceRegion.BranchBlock->terminators().end()) {
686 MachineInstr &CurrInst = *I;
688 if (CurrInst.isBranch())
689 CurrInst.eraseFromParent();
692 // Fall-through block should be empty since this is part of the condition
693 // to coalesce the branches.
694 assert(TargetRegion.FallThroughBlock->empty() &&
695 "FallThroughBlocks should be empty!");
697 // Transfer successor information and move PHIs down to the
698 // branch-taken block.
699 TargetRegion.FallThroughBlock->transferSuccessorsAndUpdatePHIs(
700 SourceRegion.FallThroughBlock);
701 TargetRegion.FallThroughBlock->removeSuccessor(SourceRegion.BranchBlock);
703 // Remove the blocks from the function.
704 assert(SourceRegion.BranchBlock->empty() &&
705 "Expecting branch block to be empty!");
706 SourceRegion.BranchBlock->eraseFromParent();
708 assert(SourceRegion.FallThroughBlock->empty() &&
709 "Expecting fall-through block to be empty!\n");
710 SourceRegion.FallThroughBlock->eraseFromParent();
712 NumBlocksCoalesced++;
716 bool PPCBranchCoalescing::runOnMachineFunction(MachineFunction &MF) {
718 if (skipFunction(MF.getFunction()) || MF.empty())
721 bool didSomething = false;
723 LLVM_DEBUG(dbgs() << "******** Branch Coalescing ********\n");
726 LLVM_DEBUG(dbgs() << "Function: "; MF.dump(); dbgs() << "\n");
728 CoalescingCandidateInfo Cand1, Cand2;
729 // Walk over blocks and find candidates to merge
730 // Continue trying to merge with the first candidate found, as long as merging
732 for (MachineBasicBlock &MBB : MF) {
733 bool MergedCandidates = false;
735 MergedCandidates = false;
739 Cand1.BranchBlock = &MBB;
741 // If unable to coalesce the branch, then continue to next block
742 if (!canCoalesceBranch(Cand1))
745 Cand2.BranchBlock = Cand1.BranchTargetBlock;
746 if (!canCoalesceBranch(Cand2))
750 // The branch-taken block of the second candidate should post-dominate the
752 assert(MPDT->dominates(Cand2.BranchTargetBlock, Cand1.BranchBlock) &&
753 "Branch-taken block should post-dominate first candidate");
755 if (!identicalOperands(Cand1.Cond, Cand2.Cond)) {
756 LLVM_DEBUG(dbgs() << "Blocks " << Cand1.BranchBlock->getNumber()
757 << " and " << Cand2.BranchBlock->getNumber()
758 << " have different branches\n");
761 if (!canMerge(Cand2, Cand1)) {
762 LLVM_DEBUG(dbgs() << "Cannot merge blocks "
763 << Cand1.BranchBlock->getNumber() << " and "
764 << Cand2.BranchBlock->getNumber() << "\n");
765 NumBlocksNotCoalesced++;
768 LLVM_DEBUG(dbgs() << "Merging blocks " << Cand1.BranchBlock->getNumber()
769 << " and " << Cand1.BranchTargetBlock->getNumber()
771 MergedCandidates = mergeCandidates(Cand2, Cand1);
772 if (MergedCandidates)
775 LLVM_DEBUG(dbgs() << "Function after merging: "; MF.dump();
777 } while (MergedCandidates);
781 // Verify MF is still valid after branch coalescing
783 MF.verify(nullptr, "Error in code produced by branch coalescing");
786 LLVM_DEBUG(dbgs() << "Finished Branch Coalescing\n");