1 //===-- RISCVFrameLowering.cpp - RISCV Frame Information ------------------===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file contains the RISCV implementation of TargetFrameLowering class.
11 //===----------------------------------------------------------------------===//
13 #include "RISCVFrameLowering.h"
14 #include "RISCVMachineFunctionInfo.h"
15 #include "RISCVSubtarget.h"
16 #include "llvm/CodeGen/MachineFrameInfo.h"
17 #include "llvm/CodeGen/MachineFunction.h"
18 #include "llvm/CodeGen/MachineInstrBuilder.h"
19 #include "llvm/CodeGen/MachineRegisterInfo.h"
20 #include "llvm/CodeGen/RegisterScavenging.h"
21 #include "llvm/MC/MCDwarf.h"
25 bool RISCVFrameLowering::hasFP(const MachineFunction &MF) const {
26 const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
28 const MachineFrameInfo &MFI = MF.getFrameInfo();
29 return MF.getTarget().Options.DisableFramePointerElim(MF) ||
30 RegInfo->needsStackRealignment(MF) || MFI.hasVarSizedObjects() ||
31 MFI.isFrameAddressTaken();
34 // Determines the size of the frame and maximum call frame size.
35 void RISCVFrameLowering::determineFrameLayout(MachineFunction &MF) const {
36 MachineFrameInfo &MFI = MF.getFrameInfo();
37 const RISCVRegisterInfo *RI = STI.getRegisterInfo();
39 // Get the number of bytes to allocate from the FrameInfo.
40 uint64_t FrameSize = MFI.getStackSize();
43 unsigned StackAlign = getStackAlignment();
44 if (RI->needsStackRealignment(MF)) {
45 unsigned MaxStackAlign = std::max(StackAlign, MFI.getMaxAlignment());
46 FrameSize += (MaxStackAlign - StackAlign);
47 StackAlign = MaxStackAlign;
50 // Set Max Call Frame Size
51 uint64_t MaxCallSize = alignTo(MFI.getMaxCallFrameSize(), StackAlign);
52 MFI.setMaxCallFrameSize(MaxCallSize);
54 // Make sure the frame is aligned.
55 FrameSize = alignTo(FrameSize, StackAlign);
58 MFI.setStackSize(FrameSize);
61 void RISCVFrameLowering::adjustReg(MachineBasicBlock &MBB,
62 MachineBasicBlock::iterator MBBI,
63 const DebugLoc &DL, unsigned DestReg,
64 unsigned SrcReg, int64_t Val,
65 MachineInstr::MIFlag Flag) const {
66 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
67 const RISCVInstrInfo *TII = STI.getInstrInfo();
69 if (DestReg == SrcReg && Val == 0)
73 BuildMI(MBB, MBBI, DL, TII->get(RISCV::ADDI), DestReg)
77 } else if (isInt<32>(Val)) {
78 unsigned Opc = RISCV::ADD;
85 unsigned ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass);
86 TII->movImm32(MBB, MBBI, DL, ScratchReg, Val, Flag);
87 BuildMI(MBB, MBBI, DL, TII->get(Opc), DestReg)
89 .addReg(ScratchReg, RegState::Kill)
92 report_fatal_error("adjustReg cannot yet handle adjustments >32 bits");
96 // Returns the register used to hold the frame pointer.
97 static unsigned getFPReg(const RISCVSubtarget &STI) { return RISCV::X8; }
99 // Returns the register used to hold the stack pointer.
100 static unsigned getSPReg(const RISCVSubtarget &STI) { return RISCV::X2; }
102 void RISCVFrameLowering::emitPrologue(MachineFunction &MF,
103 MachineBasicBlock &MBB) const {
104 assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
106 MachineFrameInfo &MFI = MF.getFrameInfo();
107 auto *RVFI = MF.getInfo<RISCVMachineFunctionInfo>();
108 const RISCVRegisterInfo *RI = STI.getRegisterInfo();
109 const RISCVInstrInfo *TII = STI.getInstrInfo();
110 MachineBasicBlock::iterator MBBI = MBB.begin();
112 if (RI->needsStackRealignment(MF) && MFI.hasVarSizedObjects()) {
114 "RISC-V backend can't currently handle functions that need stack "
115 "realignment and have variable sized objects");
118 unsigned FPReg = getFPReg(STI);
119 unsigned SPReg = getSPReg(STI);
121 // Debug location must be unknown since the first debug location is used
122 // to determine the end of the prologue.
125 // Determine the correct frame layout
126 determineFrameLayout(MF);
128 // FIXME (note copied from Lanai): This appears to be overallocating. Needs
129 // investigation. Get the number of bytes to allocate from the FrameInfo.
130 uint64_t StackSize = MFI.getStackSize();
132 // Early exit if there is no need to allocate on the stack
133 if (StackSize == 0 && !MFI.adjustsStack())
136 // Allocate space on the stack if necessary.
137 adjustReg(MBB, MBBI, DL, SPReg, SPReg, -StackSize, MachineInstr::FrameSetup);
139 // Emit ".cfi_def_cfa_offset StackSize"
140 unsigned CFIIndex = MF.addFrameInst(
141 MCCFIInstruction::createDefCfaOffset(nullptr, -StackSize));
142 BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
143 .addCFIIndex(CFIIndex);
145 // The frame pointer is callee-saved, and code has been generated for us to
146 // save it to the stack. We need to skip over the storing of callee-saved
147 // registers as the frame pointer must be modified after it has been saved
148 // to the stack, not before.
149 // FIXME: assumes exactly one instruction is used to save each callee-saved
151 const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
152 std::advance(MBBI, CSI.size());
154 // Iterate over list of callee-saved registers and emit .cfi_offset
156 for (const auto &Entry : CSI) {
157 int64_t Offset = MFI.getObjectOffset(Entry.getFrameIdx());
158 unsigned Reg = Entry.getReg();
159 unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createOffset(
160 nullptr, RI->getDwarfRegNum(Reg, true), Offset));
161 BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
162 .addCFIIndex(CFIIndex);
167 adjustReg(MBB, MBBI, DL, FPReg, SPReg,
168 StackSize - RVFI->getVarArgsSaveSize(), MachineInstr::FrameSetup);
170 // Emit ".cfi_def_cfa $fp, 0"
171 unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createDefCfa(
172 nullptr, RI->getDwarfRegNum(FPReg, true), 0));
173 BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
174 .addCFIIndex(CFIIndex);
177 const RISCVRegisterInfo *RI = STI.getRegisterInfo();
178 if (RI->needsStackRealignment(MF)) {
179 unsigned MaxAlignment = MFI.getMaxAlignment();
181 const RISCVInstrInfo *TII = STI.getInstrInfo();
182 if (isInt<12>(-(int)MaxAlignment)) {
183 BuildMI(MBB, MBBI, DL, TII->get(RISCV::ANDI), SPReg)
185 .addImm(-(int)MaxAlignment);
187 unsigned ShiftAmount = countTrailingZeros(MaxAlignment);
189 MF.getRegInfo().createVirtualRegister(&RISCV::GPRRegClass);
190 BuildMI(MBB, MBBI, DL, TII->get(RISCV::SRLI), VR)
192 .addImm(ShiftAmount);
193 BuildMI(MBB, MBBI, DL, TII->get(RISCV::SLLI), SPReg)
195 .addImm(ShiftAmount);
201 void RISCVFrameLowering::emitEpilogue(MachineFunction &MF,
202 MachineBasicBlock &MBB) const {
203 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
204 const RISCVRegisterInfo *RI = STI.getRegisterInfo();
205 MachineFrameInfo &MFI = MF.getFrameInfo();
206 auto *RVFI = MF.getInfo<RISCVMachineFunctionInfo>();
207 DebugLoc DL = MBBI->getDebugLoc();
208 unsigned FPReg = getFPReg(STI);
209 unsigned SPReg = getSPReg(STI);
211 // Skip to before the restores of callee-saved registers
212 // FIXME: assumes exactly one instruction is used to restore each
213 // callee-saved register.
214 auto LastFrameDestroy = std::prev(MBBI, MFI.getCalleeSavedInfo().size());
216 uint64_t StackSize = MFI.getStackSize();
217 uint64_t FPOffset = StackSize - RVFI->getVarArgsSaveSize();
219 // Restore the stack pointer using the value of the frame pointer. Only
220 // necessary if the stack pointer was modified, meaning the stack size is
222 if (RI->needsStackRealignment(MF) || MFI.hasVarSizedObjects()) {
223 assert(hasFP(MF) && "frame pointer should not have been eliminated");
224 adjustReg(MBB, LastFrameDestroy, DL, SPReg, FPReg, -FPOffset,
225 MachineInstr::FrameDestroy);
229 adjustReg(MBB, MBBI, DL, SPReg, SPReg, StackSize, MachineInstr::FrameDestroy);
232 int RISCVFrameLowering::getFrameIndexReference(const MachineFunction &MF,
234 unsigned &FrameReg) const {
235 const MachineFrameInfo &MFI = MF.getFrameInfo();
236 const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo();
237 const auto *RVFI = MF.getInfo<RISCVMachineFunctionInfo>();
239 // Callee-saved registers should be referenced relative to the stack
240 // pointer (positive offset), otherwise use the frame pointer (negative
242 const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
246 int Offset = MFI.getObjectOffset(FI) - getOffsetOfLocalArea() +
247 MFI.getOffsetAdjustment();
250 MinCSFI = CSI[0].getFrameIdx();
251 MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();
254 if (FI >= MinCSFI && FI <= MaxCSFI) {
255 FrameReg = RISCV::X2;
256 Offset += MF.getFrameInfo().getStackSize();
257 } else if (RI->needsStackRealignment(MF)) {
258 assert(!MFI.hasVarSizedObjects() &&
259 "Unexpected combination of stack realignment and varsized objects");
260 // If the stack was realigned, the frame pointer is set in order to allow
261 // SP to be restored, but we still access stack objects using SP.
262 FrameReg = RISCV::X2;
263 Offset += MF.getFrameInfo().getStackSize();
265 FrameReg = RI->getFrameRegister(MF);
267 Offset += RVFI->getVarArgsSaveSize();
269 Offset += MF.getFrameInfo().getStackSize();
274 void RISCVFrameLowering::determineCalleeSaves(MachineFunction &MF,
275 BitVector &SavedRegs,
276 RegScavenger *RS) const {
277 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
278 // Unconditionally spill RA and FP only if the function uses a frame
281 SavedRegs.set(RISCV::X1);
282 SavedRegs.set(RISCV::X8);
285 // If interrupt is enabled and there are calls in the handler,
286 // unconditionally save all Caller-saved registers and
287 // all FP registers, regardless whether they are used.
288 MachineFrameInfo &MFI = MF.getFrameInfo();
290 if (MF.getFunction().hasFnAttribute("interrupt") && MFI.hasCalls()) {
292 static const MCPhysReg CSRegs[] = { RISCV::X1, /* ra */
293 RISCV::X5, RISCV::X6, RISCV::X7, /* t0-t2 */
294 RISCV::X10, RISCV::X11, /* a0-a1, a2-a7 */
295 RISCV::X12, RISCV::X13, RISCV::X14, RISCV::X15, RISCV::X16, RISCV::X17,
296 RISCV::X28, RISCV::X29, RISCV::X30, RISCV::X31, 0 /* t3-t6 */
299 for (unsigned i = 0; CSRegs[i]; ++i)
300 SavedRegs.set(CSRegs[i]);
302 if (MF.getSubtarget<RISCVSubtarget>().hasStdExtD() ||
303 MF.getSubtarget<RISCVSubtarget>().hasStdExtF()) {
305 // If interrupt is enabled, this list contains all FP registers.
306 const MCPhysReg * Regs = MF.getRegInfo().getCalleeSavedRegs();
308 for (unsigned i = 0; Regs[i]; ++i)
309 if (RISCV::FPR32RegClass.contains(Regs[i]) ||
310 RISCV::FPR64RegClass.contains(Regs[i]))
311 SavedRegs.set(Regs[i]);
316 void RISCVFrameLowering::processFunctionBeforeFrameFinalized(
317 MachineFunction &MF, RegScavenger *RS) const {
318 const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
319 MachineFrameInfo &MFI = MF.getFrameInfo();
320 const TargetRegisterClass *RC = &RISCV::GPRRegClass;
321 // estimateStackSize has been observed to under-estimate the final stack
322 // size, so give ourselves wiggle-room by checking for stack size
323 // representable an 11-bit signed field rather than 12-bits.
324 // FIXME: It may be possible to craft a function with a small stack that
325 // still needs an emergency spill slot for branch relaxation. This case
326 // would currently be missed.
327 if (!isInt<11>(MFI.estimateStackSize(MF))) {
328 int RegScavFI = MFI.CreateStackObject(
329 RegInfo->getSpillSize(*RC), RegInfo->getSpillAlignment(*RC), false);
330 RS->addScavengingFrameIndex(RegScavFI);
334 // Not preserve stack space within prologue for outgoing variables when the
335 // function contains variable size objects and let eliminateCallFramePseudoInstr
336 // preserve stack space for it.
337 bool RISCVFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
338 return !MF.getFrameInfo().hasVarSizedObjects();
341 // Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions.
342 MachineBasicBlock::iterator RISCVFrameLowering::eliminateCallFramePseudoInstr(
343 MachineFunction &MF, MachineBasicBlock &MBB,
344 MachineBasicBlock::iterator MI) const {
345 unsigned SPReg = RISCV::X2;
346 DebugLoc DL = MI->getDebugLoc();
348 if (!hasReservedCallFrame(MF)) {
349 // If space has not been reserved for a call frame, ADJCALLSTACKDOWN and
350 // ADJCALLSTACKUP must be converted to instructions manipulating the stack
351 // pointer. This is necessary when there is a variable length stack
352 // allocation (e.g. alloca), which means it's not possible to allocate
353 // space for outgoing arguments from within the function prologue.
354 int64_t Amount = MI->getOperand(0).getImm();
357 // Ensure the stack remains aligned after adjustment.
358 Amount = alignSPAdjust(Amount);
360 if (MI->getOpcode() == RISCV::ADJCALLSTACKDOWN)
363 adjustReg(MBB, MI, DL, SPReg, SPReg, Amount, MachineInstr::NoFlags);
367 return MBB.erase(MI);