1 //===-- RISCVRegisterInfo.h - RISCV Register Information Impl ---*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file contains the RISCV implementation of the TargetRegisterInfo class.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_LIB_TARGET_RISCV_RISCVREGISTERINFO_H
14 #define LLVM_LIB_TARGET_RISCV_RISCVREGISTERINFO_H
16 #include "llvm/CodeGen/TargetRegisterInfo.h"
18 #define GET_REGINFO_HEADER
19 #include "RISCVGenRegisterInfo.inc"
23 struct RISCVRegisterInfo : public RISCVGenRegisterInfo {
25 RISCVRegisterInfo(unsigned HwMode);
27 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
28 CallingConv::ID) const override;
30 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
32 BitVector getReservedRegs(const MachineFunction &MF) const override;
34 bool isConstantPhysReg(unsigned PhysReg) const override;
36 const uint32_t *getNoPreservedMask() const override;
38 void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,
39 unsigned FIOperandNum,
40 RegScavenger *RS = nullptr) const override;
42 Register getFrameRegister(const MachineFunction &MF) const override;
44 bool requiresRegisterScavenging(const MachineFunction &MF) const override {
48 bool requiresFrameIndexScavenging(const MachineFunction &MF) const override {
52 bool trackLivenessAfterRegAlloc(const MachineFunction &) const override {