contrib/llvm-project/llvm/lib/Target/Sparc/Sparc.td

   1 //===-- Sparc.td - Describe the Sparc Target Machine -------*- tablegen -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 //
  10 //===----------------------------------------------------------------------===//
  11
  12 //===----------------------------------------------------------------------===//
  13 // Target-independent interfaces which we are implementing
  14 //===----------------------------------------------------------------------===//
  15
  16 include "llvm/Target/Target.td"
  17
  18 //===----------------------------------------------------------------------===//
  19 // SPARC Subtarget features.
  20 //
  21
  22 def FeatureSoftMulDiv
  23   : SubtargetFeature<"soft-mul-div", "UseSoftMulDiv", "true",
  24                      "Use software emulation for integer multiply and divide">;
  25
  26 def FeatureNoFSMULD
  27   : SubtargetFeature<"no-fsmuld", "HasNoFSMULD", "true",
  28                      "Disable the fsmuld instruction.">;
  29 def FeatureNoFMULS
  30   : SubtargetFeature<"no-fmuls", "HasNoFMULS", "true",
  31                      "Disable the fmuls instruction.">;
  32
  33 def FeatureV9
  34   : SubtargetFeature<"v9", "IsV9", "true",
  35                      "Enable SPARC-V9 instructions">;
  36 def FeatureV8Deprecated
  37   : SubtargetFeature<"deprecated-v8", "V8DeprecatedInsts", "true",
  38                      "Enable deprecated V8 instructions in V9 mode">;
  39 def FeatureVIS
  40   : SubtargetFeature<"vis", "IsVIS", "true",
  41                      "Enable UltraSPARC Visual Instruction Set extensions">;
  42 def FeatureVIS2
  43   : SubtargetFeature<"vis2", "IsVIS2", "true",
  44                      "Enable Visual Instruction Set extensions II">;
  45 def FeatureVIS3
  46   : SubtargetFeature<"vis3", "IsVIS3", "true",
  47                      "Enable Visual Instruction Set extensions III">;
  48 def FeatureLeon
  49   : SubtargetFeature<"leon", "IsLeon", "true",
  50                      "Enable LEON extensions">;
  51 def FeaturePWRPSR
  52   : SubtargetFeature<"leonpwrpsr", "HasPWRPSR", "true",
  53                      "Enable the PWRPSR instruction">;
  54
  55 def FeatureHardQuad
  56   : SubtargetFeature<"hard-quad-float", "HasHardQuad", "true",
  57                      "Enable quad-word floating point instructions">;
  58
  59 def UsePopc : SubtargetFeature<"popc", "UsePopc", "true",
  60                                "Use the popc (population count) instruction">;
  61
  62 def FeatureSoftFloat : SubtargetFeature<"soft-float", "UseSoftFloat", "true",
  63                               "Use software emulation for floating point">;
  64
  65 //==== Features added predmoninantly for LEON subtarget support
  66 include "LeonFeatures.td"
  67
  68 //===----------------------------------------------------------------------===//
  69 // Register File, Calling Conv, Instruction Descriptions
  70 //===----------------------------------------------------------------------===//
  71
  72 include "SparcRegisterInfo.td"
  73 include "SparcCallingConv.td"
  74 include "SparcSchedule.td"
  75 include "SparcInstrInfo.td"
  76
  77 def SparcInstrInfo : InstrInfo;
  78
  79 def SparcAsmParser : AsmParser {
  80   bit ShouldEmitMatchRegisterName = 0;
  81 }
  82
  83 //===----------------------------------------------------------------------===//
  84 // SPARC processors supported.
  85 //===----------------------------------------------------------------------===//
  86
  87 class Proc<string Name, list<SubtargetFeature> Features>
  88  : Processor<Name, NoItineraries, Features>;
  89
  90 def : Proc<"generic",         []>;
  91 def : Proc<"v7",              [FeatureSoftMulDiv, FeatureNoFSMULD]>;
  92 def : Proc<"v8",              []>;
  93 def : Proc<"supersparc",      []>;
  94 def : Proc<"sparclite",       []>;
  95 def : Proc<"f934",            []>;
  96 def : Proc<"hypersparc",      []>;
  97 def : Proc<"sparclite86x",    []>;
  98 def : Proc<"sparclet",        []>;
  99 def : Proc<"tsc701",          []>;
 100 def : Proc<"myriad2",         [FeatureLeon, LeonCASA]>;
 101 def : Proc<"myriad2.1",       [FeatureLeon, LeonCASA]>;
 102 def : Proc<"myriad2.2",       [FeatureLeon, LeonCASA]>;
 103 def : Proc<"myriad2.3",       [FeatureLeon, LeonCASA]>;
 104 def : Proc<"ma2100",          [FeatureLeon, LeonCASA]>;
 105 def : Proc<"ma2150",          [FeatureLeon, LeonCASA]>;
 106 def : Proc<"ma2155",          [FeatureLeon, LeonCASA]>;
 107 def : Proc<"ma2450",          [FeatureLeon, LeonCASA]>;
 108 def : Proc<"ma2455",          [FeatureLeon, LeonCASA]>;
 109 def : Proc<"ma2x5x",          [FeatureLeon, LeonCASA]>;
 110 def : Proc<"ma2080",          [FeatureLeon, LeonCASA]>;
 111 def : Proc<"ma2085",          [FeatureLeon, LeonCASA]>;
 112 def : Proc<"ma2480",          [FeatureLeon, LeonCASA]>;
 113 def : Proc<"ma2485",          [FeatureLeon, LeonCASA]>;
 114 def : Proc<"ma2x8x",          [FeatureLeon, LeonCASA]>;
 115 def : Proc<"v9",              [FeatureV9]>;
 116 def : Proc<"ultrasparc",      [FeatureV9, FeatureV8Deprecated, FeatureVIS]>;
 117 def : Proc<"ultrasparc3",     [FeatureV9, FeatureV8Deprecated, FeatureVIS,
 118                                FeatureVIS2]>;
 119 def : Proc<"niagara",         [FeatureV9, FeatureV8Deprecated, FeatureVIS,
 120                                FeatureVIS2]>;
 121 def : Proc<"niagara2",        [FeatureV9, FeatureV8Deprecated, UsePopc,
 122                                FeatureVIS, FeatureVIS2]>;
 123 def : Proc<"niagara3",        [FeatureV9, FeatureV8Deprecated, UsePopc,
 124                                FeatureVIS, FeatureVIS2]>;
 125 def : Proc<"niagara4",        [FeatureV9, FeatureV8Deprecated, UsePopc,
 126                                FeatureVIS, FeatureVIS2, FeatureVIS3]>;
 127
 128 // LEON 2 FT generic
 129 def : Processor<"leon2", LEON2Itineraries,
 130                 [FeatureLeon]>;
 131
 132 // LEON 2 FT (AT697E)
 133 // TO DO: Place-holder: Processor specific features will be added *very* soon here.
 134 def : Processor<"at697e", LEON2Itineraries,
 135                 [FeatureLeon, InsertNOPLoad]>;
 136
 137 // LEON 2 FT (AT697F)
 138 // TO DO: Place-holder: Processor specific features will be added *very* soon here.
 139 def : Processor<"at697f", LEON2Itineraries,
 140                 [FeatureLeon, InsertNOPLoad]>;
 141
 142
 143 // LEON 3 FT generic
 144 def : Processor<"leon3", LEON3Itineraries,
 145                 [FeatureLeon, UMACSMACSupport]>;
 146
 147 // LEON 3 FT (UT699). Provides features for the UT699 processor
 148 // - covers all the erratum fixes for LEON3, but does not support the CASA instruction.
 149 def : Processor<"ut699", LEON3Itineraries,
 150                 [FeatureLeon, InsertNOPLoad, FeatureNoFSMULD, FeatureNoFMULS, FixAllFDIVSQRT]>;
 151
 152 // LEON3 FT (GR712RC). Provides features for the GR712RC processor.
 153 // - covers all the erratum fixed for LEON3 and support for the CASA instruction.
 154 def : Processor<"gr712rc", LEON3Itineraries,
 155                 [FeatureLeon, LeonCASA]>;
 156
 157 // LEON 4 FT generic
 158 def : Processor<"leon4", LEON4Itineraries,
 159                 [FeatureLeon, UMACSMACSupport, LeonCASA]>;
 160
 161 // LEON 4 FT (GR740)
 162 // TO DO: Place-holder: Processor specific features will be added *very* soon here.
 163 def : Processor<"gr740", LEON4Itineraries,
 164                 [FeatureLeon, UMACSMACSupport, LeonCASA, LeonCycleCounter,
 165                  FeaturePWRPSR]>;
 166
 167 //===----------------------------------------------------------------------===//
 168 // Declare the target which we are implementing
 169 //===----------------------------------------------------------------------===//
 170
 171 def SparcAsmWriter : AsmWriter {
 172   string AsmWriterClassName  = "InstPrinter";
 173   int PassSubtarget = 1;
 174   int Variant = 0;
 175 }
 176
 177 def Sparc : Target {
 178   // Pull in Instruction Info:
 179   let InstructionSet = SparcInstrInfo;
 180   let AssemblyParsers  = [SparcAsmParser];
 181   let AssemblyWriters = [SparcAsmWriter];
 182   let AllowRegisterRenaming = 1;
 183 }