1 //===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
12 def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>,
14 def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>,
16 def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
17 def SDT_ZCmp : SDTypeProfile<1, 2,
20 def SDT_ZICmp : SDTypeProfile<1, 3,
24 def SDT_ZBRCCMask : SDTypeProfile<0, 4,
29 def SDT_ZSelectCCMask : SDTypeProfile<1, 5,
35 def SDT_ZWrapPtr : SDTypeProfile<1, 1,
38 def SDT_ZWrapOffset : SDTypeProfile<1, 2,
42 def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>;
43 def SDT_ZProbedAlloca : SDTypeProfile<1, 2,
47 def SDT_ZGR128Binary : SDTypeProfile<1, 2,
48 [SDTCisVT<0, untyped>,
51 def SDT_ZBinaryWithFlags : SDTypeProfile<2, 2,
56 def SDT_ZBinaryWithCarry : SDTypeProfile<2, 3,
62 def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5,
69 def SDT_ZAtomicCmpSwapW : SDTypeProfile<2, 6,
78 def SDT_ZAtomicCmpSwap : SDTypeProfile<2, 3,
84 def SDT_ZAtomicLoad128 : SDTypeProfile<1, 1,
85 [SDTCisVT<0, untyped>,
87 def SDT_ZAtomicStore128 : SDTypeProfile<0, 2,
88 [SDTCisVT<0, untyped>,
90 def SDT_ZAtomicCmpSwap128 : SDTypeProfile<2, 3,
91 [SDTCisVT<0, untyped>,
95 SDTCisVT<4, untyped>]>;
96 def SDT_ZMemMemLength : SDTypeProfile<0, 3,
100 def SDT_ZMemMemLengthCC : SDTypeProfile<1, 3,
105 def SDT_ZMemMemLoop : SDTypeProfile<0, 4,
110 def SDT_ZMemMemLoopCC : SDTypeProfile<1, 4,
116 def SDT_ZString : SDTypeProfile<1, 3,
121 def SDT_ZStringCC : SDTypeProfile<2, 3,
127 def SDT_ZIPM : SDTypeProfile<1, 1,
130 def SDT_ZPrefetch : SDTypeProfile<0, 2,
133 def SDT_ZTBegin : SDTypeProfile<1, 2,
137 def SDT_ZTEnd : SDTypeProfile<1, 0,
139 def SDT_ZInsertVectorElt : SDTypeProfile<1, 3,
143 def SDT_ZExtractVectorElt : SDTypeProfile<1, 2,
146 def SDT_ZReplicate : SDTypeProfile<1, 1,
148 def SDT_ZVecUnaryConv : SDTypeProfile<1, 1,
151 def SDT_ZVecUnary : SDTypeProfile<1, 1,
153 SDTCisSameAs<0, 1>]>;
154 def SDT_ZVecUnaryCC : SDTypeProfile<2, 1,
157 SDTCisSameAs<0, 2>]>;
158 def SDT_ZVecBinary : SDTypeProfile<1, 2,
161 SDTCisSameAs<0, 2>]>;
162 def SDT_ZVecBinaryCC : SDTypeProfile<2, 2,
166 SDTCisSameAs<0, 2>]>;
167 def SDT_ZVecBinaryInt : SDTypeProfile<1, 2,
171 def SDT_ZVecBinaryConv : SDTypeProfile<1, 2,
174 SDTCisSameAs<1, 2>]>;
175 def SDT_ZVecBinaryConvCC : SDTypeProfile<2, 2,
179 SDTCisSameAs<2, 3>]>;
180 def SDT_ZVecBinaryConvIntCC : SDTypeProfile<2, 2,
185 def SDT_ZRotateMask : SDTypeProfile<1, 2,
189 def SDT_ZJoinDwords : SDTypeProfile<1, 2,
193 def SDT_ZVecTernary : SDTypeProfile<1, 3,
197 SDTCisSameAs<0, 3>]>;
198 def SDT_ZVecTernaryConvCC : SDTypeProfile<2, 3,
203 SDTCisSameAs<0, 4>]>;
204 def SDT_ZVecTernaryInt : SDTypeProfile<1, 3,
209 def SDT_ZVecTernaryIntCC : SDTypeProfile<2, 3,
215 def SDT_ZVecQuaternaryInt : SDTypeProfile<1, 4,
221 def SDT_ZVecQuaternaryIntCC : SDTypeProfile<2, 4,
228 def SDT_ZTest : SDTypeProfile<1, 2,
232 //===----------------------------------------------------------------------===//
234 //===----------------------------------------------------------------------===//
236 // These are target-independent nodes, but have target-specific formats.
237 def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart,
238 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>;
239 def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd,
240 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue,
242 def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>;
244 // Nodes for SystemZISD::*. See SystemZISelLowering.h for more details.
245 def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone,
246 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>;
247 def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall,
248 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
250 def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall,
251 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
253 def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall,
254 [SDNPHasChain, SDNPInGlue, SDNPOutGlue,
256 def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall,
257 [SDNPHasChain, SDNPInGlue, SDNPOutGlue,
259 def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>;
260 def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET",
261 SDT_ZWrapOffset, []>;
262 def z_iabs : SDNode<"SystemZISD::IABS", SDTIntUnaryOp, []>;
263 def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp>;
264 def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp>;
265 def z_strict_fcmp : SDNode<"SystemZISD::STRICT_FCMP", SDT_ZCmp,
267 def z_strict_fcmps : SDNode<"SystemZISD::STRICT_FCMPS", SDT_ZCmp,
269 def z_tm : SDNode<"SystemZISD::TM", SDT_ZICmp>;
270 def z_br_ccmask_1 : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask,
272 def z_select_ccmask_1 : SDNode<"SystemZISD::SELECT_CCMASK",
274 def z_ipm_1 : SDNode<"SystemZISD::IPM", SDT_ZIPM>;
275 def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>;
276 def z_probed_alloca : SDNode<"SystemZISD::PROBED_ALLOCA", SDT_ZProbedAlloca,
278 def z_popcnt : SDNode<"SystemZISD::POPCNT", SDTIntUnaryOp>;
279 def z_smul_lohi : SDNode<"SystemZISD::SMUL_LOHI", SDT_ZGR128Binary>;
280 def z_umul_lohi : SDNode<"SystemZISD::UMUL_LOHI", SDT_ZGR128Binary>;
281 def z_sdivrem : SDNode<"SystemZISD::SDIVREM", SDT_ZGR128Binary>;
282 def z_udivrem : SDNode<"SystemZISD::UDIVREM", SDT_ZGR128Binary>;
283 def z_saddo : SDNode<"SystemZISD::SADDO", SDT_ZBinaryWithFlags>;
284 def z_ssubo : SDNode<"SystemZISD::SSUBO", SDT_ZBinaryWithFlags>;
285 def z_uaddo : SDNode<"SystemZISD::UADDO", SDT_ZBinaryWithFlags>;
286 def z_usubo : SDNode<"SystemZISD::USUBO", SDT_ZBinaryWithFlags>;
287 def z_addcarry_1 : SDNode<"SystemZISD::ADDCARRY", SDT_ZBinaryWithCarry>;
288 def z_subcarry_1 : SDNode<"SystemZISD::SUBCARRY", SDT_ZBinaryWithCarry>;
290 def z_membarrier : SDNode<"SystemZISD::MEMBARRIER", SDTNone,
291 [SDNPHasChain, SDNPSideEffect]>;
293 def z_loadbswap : SDNode<"SystemZISD::LRV", SDTLoad,
294 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
295 def z_storebswap : SDNode<"SystemZISD::STRV", SDTStore,
296 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
297 def z_loadeswap : SDNode<"SystemZISD::VLER", SDTLoad,
298 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
299 def z_storeeswap : SDNode<"SystemZISD::VSTER", SDTStore,
300 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
302 def z_tdc : SDNode<"SystemZISD::TDC", SDT_ZTest>;
304 // Defined because the index is an i32 rather than a pointer.
305 def z_vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT",
306 SDT_ZInsertVectorElt>;
307 def z_vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT",
308 SDT_ZExtractVectorElt>;
309 def z_byte_mask : SDNode<"SystemZISD::BYTE_MASK", SDT_ZReplicate>;
310 def z_rotate_mask : SDNode<"SystemZISD::ROTATE_MASK", SDT_ZRotateMask>;
311 def z_replicate : SDNode<"SystemZISD::REPLICATE", SDT_ZReplicate>;
312 def z_join_dwords : SDNode<"SystemZISD::JOIN_DWORDS", SDT_ZJoinDwords>;
313 def z_splat : SDNode<"SystemZISD::SPLAT", SDT_ZVecBinaryInt>;
314 def z_merge_high : SDNode<"SystemZISD::MERGE_HIGH", SDT_ZVecBinary>;
315 def z_merge_low : SDNode<"SystemZISD::MERGE_LOW", SDT_ZVecBinary>;
316 def z_shl_double : SDNode<"SystemZISD::SHL_DOUBLE", SDT_ZVecTernaryInt>;
317 def z_permute_dwords : SDNode<"SystemZISD::PERMUTE_DWORDS",
319 def z_permute : SDNode<"SystemZISD::PERMUTE", SDT_ZVecTernary>;
320 def z_pack : SDNode<"SystemZISD::PACK", SDT_ZVecBinaryConv>;
321 def z_packs_cc : SDNode<"SystemZISD::PACKS_CC", SDT_ZVecBinaryConvCC>;
322 def z_packls_cc : SDNode<"SystemZISD::PACKLS_CC", SDT_ZVecBinaryConvCC>;
323 def z_unpack_high : SDNode<"SystemZISD::UNPACK_HIGH", SDT_ZVecUnaryConv>;
324 def z_unpackl_high : SDNode<"SystemZISD::UNPACKL_HIGH", SDT_ZVecUnaryConv>;
325 def z_unpack_low : SDNode<"SystemZISD::UNPACK_LOW", SDT_ZVecUnaryConv>;
326 def z_unpackl_low : SDNode<"SystemZISD::UNPACKL_LOW", SDT_ZVecUnaryConv>;
327 def z_vshl_by_scalar : SDNode<"SystemZISD::VSHL_BY_SCALAR",
329 def z_vsrl_by_scalar : SDNode<"SystemZISD::VSRL_BY_SCALAR",
331 def z_vsra_by_scalar : SDNode<"SystemZISD::VSRA_BY_SCALAR",
333 def z_vsum : SDNode<"SystemZISD::VSUM", SDT_ZVecBinaryConv>;
334 def z_vicmpe : SDNode<"SystemZISD::VICMPE", SDT_ZVecBinary>;
335 def z_vicmph : SDNode<"SystemZISD::VICMPH", SDT_ZVecBinary>;
336 def z_vicmphl : SDNode<"SystemZISD::VICMPHL", SDT_ZVecBinary>;
337 def z_vicmpes : SDNode<"SystemZISD::VICMPES", SDT_ZVecBinaryCC>;
338 def z_vicmphs : SDNode<"SystemZISD::VICMPHS", SDT_ZVecBinaryCC>;
339 def z_vicmphls : SDNode<"SystemZISD::VICMPHLS", SDT_ZVecBinaryCC>;
340 def z_vfcmpe : SDNode<"SystemZISD::VFCMPE", SDT_ZVecBinaryConv>;
341 def z_strict_vfcmpe : SDNode<"SystemZISD::STRICT_VFCMPE",
342 SDT_ZVecBinaryConv, [SDNPHasChain]>;
343 def z_strict_vfcmpes : SDNode<"SystemZISD::STRICT_VFCMPES",
344 SDT_ZVecBinaryConv, [SDNPHasChain]>;
345 def z_vfcmph : SDNode<"SystemZISD::VFCMPH", SDT_ZVecBinaryConv>;
346 def z_strict_vfcmph : SDNode<"SystemZISD::STRICT_VFCMPH",
347 SDT_ZVecBinaryConv, [SDNPHasChain]>;
348 def z_strict_vfcmphs : SDNode<"SystemZISD::STRICT_VFCMPHS",
349 SDT_ZVecBinaryConv, [SDNPHasChain]>;
350 def z_vfcmphe : SDNode<"SystemZISD::VFCMPHE", SDT_ZVecBinaryConv>;
351 def z_strict_vfcmphe : SDNode<"SystemZISD::STRICT_VFCMPHE",
352 SDT_ZVecBinaryConv, [SDNPHasChain]>;
353 def z_strict_vfcmphes : SDNode<"SystemZISD::STRICT_VFCMPHES",
354 SDT_ZVecBinaryConv, [SDNPHasChain]>;
355 def z_vfcmpes : SDNode<"SystemZISD::VFCMPES", SDT_ZVecBinaryConvCC>;
356 def z_vfcmphs : SDNode<"SystemZISD::VFCMPHS", SDT_ZVecBinaryConvCC>;
357 def z_vfcmphes : SDNode<"SystemZISD::VFCMPHES", SDT_ZVecBinaryConvCC>;
358 def z_vextend : SDNode<"SystemZISD::VEXTEND", SDT_ZVecUnaryConv>;
359 def z_strict_vextend : SDNode<"SystemZISD::STRICT_VEXTEND",
360 SDT_ZVecUnaryConv, [SDNPHasChain]>;
361 def z_vround : SDNode<"SystemZISD::VROUND", SDT_ZVecUnaryConv>;
362 def z_strict_vround : SDNode<"SystemZISD::STRICT_VROUND",
363 SDT_ZVecUnaryConv, [SDNPHasChain]>;
364 def z_vtm : SDNode<"SystemZISD::VTM", SDT_ZCmp>;
365 def z_vfae_cc : SDNode<"SystemZISD::VFAE_CC", SDT_ZVecTernaryIntCC>;
366 def z_vfaez_cc : SDNode<"SystemZISD::VFAEZ_CC", SDT_ZVecTernaryIntCC>;
367 def z_vfee_cc : SDNode<"SystemZISD::VFEE_CC", SDT_ZVecBinaryCC>;
368 def z_vfeez_cc : SDNode<"SystemZISD::VFEEZ_CC", SDT_ZVecBinaryCC>;
369 def z_vfene_cc : SDNode<"SystemZISD::VFENE_CC", SDT_ZVecBinaryCC>;
370 def z_vfenez_cc : SDNode<"SystemZISD::VFENEZ_CC", SDT_ZVecBinaryCC>;
371 def z_vistr_cc : SDNode<"SystemZISD::VISTR_CC", SDT_ZVecUnaryCC>;
372 def z_vstrc_cc : SDNode<"SystemZISD::VSTRC_CC",
373 SDT_ZVecQuaternaryIntCC>;
374 def z_vstrcz_cc : SDNode<"SystemZISD::VSTRCZ_CC",
375 SDT_ZVecQuaternaryIntCC>;
376 def z_vstrs_cc : SDNode<"SystemZISD::VSTRS_CC",
377 SDT_ZVecTernaryConvCC>;
378 def z_vstrsz_cc : SDNode<"SystemZISD::VSTRSZ_CC",
379 SDT_ZVecTernaryConvCC>;
380 def z_vftci : SDNode<"SystemZISD::VFTCI", SDT_ZVecBinaryConvIntCC>;
382 class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW>
383 : SDNode<"SystemZISD::"#name, profile,
384 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
386 def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">;
387 def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">;
388 def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">;
389 def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">;
390 def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">;
391 def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">;
392 def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">;
393 def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">;
394 def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">;
395 def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">;
396 def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">;
398 def z_atomic_cmp_swap : SDNode<"SystemZISD::ATOMIC_CMP_SWAP",
400 [SDNPHasChain, SDNPMayStore, SDNPMayLoad,
402 def z_atomic_cmp_swapw : SDNode<"SystemZISD::ATOMIC_CMP_SWAPW",
404 [SDNPHasChain, SDNPMayStore, SDNPMayLoad,
407 def z_atomic_load_128 : SDNode<"SystemZISD::ATOMIC_LOAD_128",
409 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
410 def z_atomic_store_128 : SDNode<"SystemZISD::ATOMIC_STORE_128",
412 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
413 def z_atomic_cmp_swap_128 : SDNode<"SystemZISD::ATOMIC_CMP_SWAP_128",
414 SDT_ZAtomicCmpSwap128,
415 [SDNPHasChain, SDNPMayStore, SDNPMayLoad,
418 def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength,
419 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
420 def z_mvc_loop : SDNode<"SystemZISD::MVC_LOOP", SDT_ZMemMemLoop,
421 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
422 def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength,
423 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
424 def z_nc_loop : SDNode<"SystemZISD::NC_LOOP", SDT_ZMemMemLoop,
425 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
426 def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength,
427 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
428 def z_oc_loop : SDNode<"SystemZISD::OC_LOOP", SDT_ZMemMemLoop,
429 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
430 def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength,
431 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
432 def z_xc_loop : SDNode<"SystemZISD::XC_LOOP", SDT_ZMemMemLoop,
433 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
434 def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLengthCC,
435 [SDNPHasChain, SDNPMayLoad]>;
436 def z_clc_loop : SDNode<"SystemZISD::CLC_LOOP", SDT_ZMemMemLoopCC,
437 [SDNPHasChain, SDNPMayLoad]>;
438 def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZStringCC,
439 [SDNPHasChain, SDNPMayLoad]>;
440 def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString,
441 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
442 def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZStringCC,
443 [SDNPHasChain, SDNPMayLoad]>;
444 def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch,
445 [SDNPHasChain, SDNPMayLoad, SDNPMayStore,
448 def z_tbegin : SDNode<"SystemZISD::TBEGIN", SDT_ZTBegin,
449 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>;
450 def z_tbegin_nofloat : SDNode<"SystemZISD::TBEGIN_NOFLOAT", SDT_ZTBegin,
451 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>;
452 def z_tend : SDNode<"SystemZISD::TEND", SDT_ZTEnd,
453 [SDNPHasChain, SDNPSideEffect]>;
455 def z_vshl : SDNode<"ISD::SHL", SDT_ZVecBinary>;
456 def z_vsra : SDNode<"ISD::SRA", SDT_ZVecBinary>;
457 def z_vsrl : SDNode<"ISD::SRL", SDT_ZVecBinary>;
459 //===----------------------------------------------------------------------===//
461 //===----------------------------------------------------------------------===//
463 def z_loadbswap16 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{
464 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16;
466 def z_loadbswap32 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{
467 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32;
469 def z_loadbswap64 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{
470 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64;
473 def z_storebswap16 : PatFrag<(ops node:$src, node:$addr),
474 (z_storebswap node:$src, node:$addr), [{
475 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16;
477 def z_storebswap32 : PatFrag<(ops node:$src, node:$addr),
478 (z_storebswap node:$src, node:$addr), [{
479 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32;
481 def z_storebswap64 : PatFrag<(ops node:$src, node:$addr),
482 (z_storebswap node:$src, node:$addr), [{
483 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64;
486 // Fragments including CC as an implicit source.
488 : PatFrag<(ops node:$valid, node:$mask, node:$bb),
489 (z_br_ccmask_1 node:$valid, node:$mask, node:$bb, CC)>;
491 : PatFrag<(ops node:$true, node:$false, node:$valid, node:$mask),
492 (z_select_ccmask_1 node:$true, node:$false,
493 node:$valid, node:$mask, CC)>;
494 def z_ipm : PatFrag<(ops), (z_ipm_1 CC)>;
495 def z_addcarry : PatFrag<(ops node:$lhs, node:$rhs),
496 (z_addcarry_1 node:$lhs, node:$rhs, CC)>;
497 def z_subcarry : PatFrag<(ops node:$lhs, node:$rhs),
498 (z_subcarry_1 node:$lhs, node:$rhs, CC)>;
500 // Signed and unsigned comparisons.
501 def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, timm), [{
502 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue();
503 return Type != SystemZICMP::UnsignedOnly;
505 def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, timm), [{
506 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue();
507 return Type != SystemZICMP::SignedOnly;
510 // Register- and memory-based TEST UNDER MASK.
511 def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, timm)>;
512 def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>;
514 // Register sign-extend operations. Sub-32-bit values are represented as i32s.
515 def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>;
516 def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>;
517 def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>;
519 // Match extensions of an i32 to an i64, followed by an in-register sign
520 // extension from a sub-i32 value.
521 def sext8dbl : PatFrag<(ops node:$src), (sext8 (anyext node:$src))>;
522 def sext16dbl : PatFrag<(ops node:$src), (sext16 (anyext node:$src))>;
524 // Register zero-extend operations. Sub-32-bit values are represented as i32s.
525 def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>;
526 def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>;
527 def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>;
529 // Extending loads in which the extension type can be signed.
530 def asextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
531 unsigned Type = cast<LoadSDNode>(N)->getExtensionType();
532 return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD;
534 def asextloadi8 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
535 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
537 def asextloadi16 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
538 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
540 def asextloadi32 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
541 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
544 // Extending loads in which the extension type can be unsigned.
545 def azextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
546 unsigned Type = cast<LoadSDNode>(N)->getExtensionType();
547 return Type == ISD::EXTLOAD || Type == ISD::ZEXTLOAD;
549 def azextloadi8 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
550 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
552 def azextloadi16 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
553 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
555 def azextloadi32 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
556 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
559 // Extending loads in which the extension type doesn't matter.
560 def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
561 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD;
563 def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
564 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
566 def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
567 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
569 def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
570 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
574 class AlignedLoad<SDPatternOperator load>
575 : PatFrag<(ops node:$addr), (load node:$addr), [{
576 auto *Load = cast<LoadSDNode>(N);
577 return Load->getAlignment() >= Load->getMemoryVT().getStoreSize();
579 def aligned_load : AlignedLoad<load>;
580 def aligned_asextloadi16 : AlignedLoad<asextloadi16>;
581 def aligned_asextloadi32 : AlignedLoad<asextloadi32>;
582 def aligned_azextloadi16 : AlignedLoad<azextloadi16>;
583 def aligned_azextloadi32 : AlignedLoad<azextloadi32>;
586 class AlignedStore<SDPatternOperator store>
587 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
588 auto *Store = cast<StoreSDNode>(N);
589 return Store->getAlignment() >= Store->getMemoryVT().getStoreSize();
591 def aligned_store : AlignedStore<store>;
592 def aligned_truncstorei16 : AlignedStore<truncstorei16>;
593 def aligned_truncstorei32 : AlignedStore<truncstorei32>;
595 // Non-volatile loads. Used for instructions that might access the storage
596 // location multiple times.
597 class NonvolatileLoad<SDPatternOperator load>
598 : PatFrag<(ops node:$addr), (load node:$addr), [{
599 auto *Load = cast<LoadSDNode>(N);
600 return !Load->isVolatile();
602 def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>;
603 def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>;
604 def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>;
606 // Non-volatile stores.
607 class NonvolatileStore<SDPatternOperator store>
608 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
609 auto *Store = cast<StoreSDNode>(N);
610 return !Store->isVolatile();
612 def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>;
613 def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>;
614 def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>;
616 // A store of a load that can be implemented using MVC.
617 def mvc_store : PatFrag<(ops node:$value, node:$addr),
618 (unindexedstore node:$value, node:$addr),
619 [{ return storeLoadCanUseMVC(N); }]>;
621 // Binary read-modify-write operations on memory in which the other
622 // operand is also memory and for which block operations like NC can
623 // be used. There are two patterns for each operator, depending on
624 // which operand contains the "other" load.
625 multiclass block_op<SDPatternOperator operator> {
626 def "1" : PatFrag<(ops node:$value, node:$addr),
627 (unindexedstore (operator node:$value,
628 (unindexedload node:$addr)),
630 [{ return storeLoadCanUseBlockBinary(N, 0); }]>;
631 def "2" : PatFrag<(ops node:$value, node:$addr),
632 (unindexedstore (operator (unindexedload node:$addr),
635 [{ return storeLoadCanUseBlockBinary(N, 1); }]>;
637 defm block_and : block_op<and>;
638 defm block_or : block_op<or>;
639 defm block_xor : block_op<xor>;
642 def inserti8 : PatFrag<(ops node:$src1, node:$src2),
643 (or (and node:$src1, -256), node:$src2)>;
644 def insertll : PatFrag<(ops node:$src1, node:$src2),
645 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>;
646 def insertlh : PatFrag<(ops node:$src1, node:$src2),
647 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>;
648 def inserthl : PatFrag<(ops node:$src1, node:$src2),
649 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>;
650 def inserthh : PatFrag<(ops node:$src1, node:$src2),
651 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>;
652 def insertlf : PatFrag<(ops node:$src1, node:$src2),
653 (or (and node:$src1, 0xffffffff00000000), node:$src2)>;
654 def inserthf : PatFrag<(ops node:$src1, node:$src2),
655 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>;
657 // ORs that can be treated as insertions.
658 def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2),
659 (or node:$src1, node:$src2), [{
660 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits();
661 return CurDAG->MaskedValueIsZero(N->getOperand(0),
662 APInt::getLowBitsSet(BitWidth, 8));
665 // ORs that can be treated as reversed insertions.
666 def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2),
667 (or node:$src1, node:$src2), [{
668 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits();
669 return CurDAG->MaskedValueIsZero(N->getOperand(1),
670 APInt::getLowBitsSet(BitWidth, 8));
673 // Negative integer absolute.
674 def z_inegabs : PatFrag<(ops node:$src), (ineg (z_iabs node:$src))>;
676 // Integer absolute, matching the canonical form generated by DAGCombiner.
677 def z_iabs32 : PatFrag<(ops node:$src),
678 (xor (add node:$src, (sra node:$src, (i32 31))),
679 (sra node:$src, (i32 31)))>;
680 def z_iabs64 : PatFrag<(ops node:$src),
681 (xor (add node:$src, (sra node:$src, (i32 63))),
682 (sra node:$src, (i32 63)))>;
683 def z_inegabs32 : PatFrag<(ops node:$src), (ineg (z_iabs32 node:$src))>;
684 def z_inegabs64 : PatFrag<(ops node:$src), (ineg (z_iabs64 node:$src))>;
686 // Integer multiply-and-add
687 def z_muladd : PatFrag<(ops node:$src1, node:$src2, node:$src3),
688 (add (mul node:$src1, node:$src2), node:$src3)>;
690 // Alternatives to match operations with or without an overflow CC result.
691 def z_sadd : PatFrags<(ops node:$src1, node:$src2),
692 [(z_saddo node:$src1, node:$src2),
693 (add node:$src1, node:$src2)]>;
694 def z_uadd : PatFrags<(ops node:$src1, node:$src2),
695 [(z_uaddo node:$src1, node:$src2),
696 (add node:$src1, node:$src2)]>;
697 def z_ssub : PatFrags<(ops node:$src1, node:$src2),
698 [(z_ssubo node:$src1, node:$src2),
699 (sub node:$src1, node:$src2)]>;
700 def z_usub : PatFrags<(ops node:$src1, node:$src2),
701 [(z_usubo node:$src1, node:$src2),
702 (sub node:$src1, node:$src2)]>;
704 // Combined logical operations.
705 def andc : PatFrag<(ops node:$src1, node:$src2),
706 (and node:$src1, (not node:$src2))>;
707 def orc : PatFrag<(ops node:$src1, node:$src2),
708 (or node:$src1, (not node:$src2))>;
709 def nand : PatFrag<(ops node:$src1, node:$src2),
710 (not (and node:$src1, node:$src2))>;
711 def nor : PatFrag<(ops node:$src1, node:$src2),
712 (not (or node:$src1, node:$src2))>;
713 def nxor : PatFrag<(ops node:$src1, node:$src2),
714 (not (xor node:$src1, node:$src2))>;
716 // Fused multiply-subtract, using the natural operand order.
717 def any_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3),
718 (any_fma node:$src1, node:$src2, (fneg node:$src3))>;
720 // Fused multiply-add and multiply-subtract, but with the order of the
721 // operands matching SystemZ's MA and MS instructions.
722 def z_any_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3),
723 (any_fma node:$src2, node:$src3, node:$src1)>;
724 def z_any_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3),
725 (any_fma node:$src2, node:$src3, (fneg node:$src1))>;
727 // Negative fused multiply-add and multiply-subtract.
728 def any_fnma : PatFrag<(ops node:$src1, node:$src2, node:$src3),
729 (fneg (any_fma node:$src1, node:$src2, node:$src3))>;
730 def any_fnms : PatFrag<(ops node:$src1, node:$src2, node:$src3),
731 (fneg (any_fms node:$src1, node:$src2, node:$src3))>;
733 // Floating-point negative absolute.
734 def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>;
736 // Strict floating-point fragments.
737 def z_any_fcmp : PatFrags<(ops node:$lhs, node:$rhs),
738 [(z_strict_fcmp node:$lhs, node:$rhs),
739 (z_fcmp node:$lhs, node:$rhs)]>;
740 def z_any_vfcmpe : PatFrags<(ops node:$lhs, node:$rhs),
741 [(z_strict_vfcmpe node:$lhs, node:$rhs),
742 (z_vfcmpe node:$lhs, node:$rhs)]>;
743 def z_any_vfcmph : PatFrags<(ops node:$lhs, node:$rhs),
744 [(z_strict_vfcmph node:$lhs, node:$rhs),
745 (z_vfcmph node:$lhs, node:$rhs)]>;
746 def z_any_vfcmphe : PatFrags<(ops node:$lhs, node:$rhs),
747 [(z_strict_vfcmphe node:$lhs, node:$rhs),
748 (z_vfcmphe node:$lhs, node:$rhs)]>;
749 def z_any_vextend : PatFrags<(ops node:$src),
750 [(z_strict_vextend node:$src),
751 (z_vextend node:$src)]>;
752 def z_any_vround : PatFrags<(ops node:$src),
753 [(z_strict_vround node:$src),
754 (z_vround node:$src)]>;
756 // Create a unary operator that loads from memory and then performs
757 // the given operation on it.
758 class loadu<SDPatternOperator operator, SDPatternOperator load = load>
759 : PatFrag<(ops node:$addr), (operator (load node:$addr))>;
761 // Create a store operator that performs the given unary operation
762 // on the value before storing it.
763 class storeu<SDPatternOperator operator, SDPatternOperator store = store>
764 : PatFrag<(ops node:$value, node:$addr),
765 (store (operator node:$value), node:$addr)>;
767 // Create a store operator that performs the given inherent operation
768 // and stores the resulting value.
769 class storei<SDPatternOperator operator, SDPatternOperator store = store>
770 : PatFrag<(ops node:$addr),
771 (store (operator), node:$addr)>;
773 // Create a shift operator that optionally ignores an AND of the
774 // shift count with an immediate if the bottom 6 bits are all set.
775 def imm32bottom6set : PatLeaf<(i32 imm), [{
776 return (N->getZExtValue() & 0x3f) == 0x3f;
778 class shiftop<SDPatternOperator operator>
779 : PatFrags<(ops node:$val, node:$count),
780 [(operator node:$val, node:$count),
781 (operator node:$val, (and node:$count, imm32bottom6set))]>;
783 def imm32mod64 : PatLeaf<(i32 imm), [{
784 return (N->getZExtValue() % 64 == 0);
787 // Load a scalar and replicate it in all elements of a vector.
788 class z_replicate_load<ValueType scalartype, SDPatternOperator load>
789 : PatFrag<(ops node:$addr),
790 (z_replicate (scalartype (load node:$addr)))>;
791 def z_replicate_loadi8 : z_replicate_load<i32, anyextloadi8>;
792 def z_replicate_loadi16 : z_replicate_load<i32, anyextloadi16>;
793 def z_replicate_loadi32 : z_replicate_load<i32, load>;
794 def z_replicate_loadi64 : z_replicate_load<i64, load>;
795 def z_replicate_loadf32 : z_replicate_load<f32, load>;
796 def z_replicate_loadf64 : z_replicate_load<f64, load>;
797 // Byte-swapped replicated vector element loads.
798 def z_replicate_loadbswapi16 : z_replicate_load<i32, z_loadbswap16>;
799 def z_replicate_loadbswapi32 : z_replicate_load<i32, z_loadbswap32>;
800 def z_replicate_loadbswapi64 : z_replicate_load<i64, z_loadbswap64>;
802 // Load a scalar and insert it into a single element of a vector.
803 class z_vle<ValueType scalartype, SDPatternOperator load>
804 : PatFrag<(ops node:$vec, node:$addr, node:$index),
805 (z_vector_insert node:$vec, (scalartype (load node:$addr)),
807 def z_vlei8 : z_vle<i32, anyextloadi8>;
808 def z_vlei16 : z_vle<i32, anyextloadi16>;
809 def z_vlei32 : z_vle<i32, load>;
810 def z_vlei64 : z_vle<i64, load>;
811 def z_vlef32 : z_vle<f32, load>;
812 def z_vlef64 : z_vle<f64, load>;
813 // Byte-swapped vector element loads.
814 def z_vlebri16 : z_vle<i32, z_loadbswap16>;
815 def z_vlebri32 : z_vle<i32, z_loadbswap32>;
816 def z_vlebri64 : z_vle<i64, z_loadbswap64>;
818 // Load a scalar and insert it into the low element of the high i64 of a
820 class z_vllez<ValueType scalartype, SDPatternOperator load, int index>
821 : PatFrag<(ops node:$addr),
822 (z_vector_insert immAllZerosV,
823 (scalartype (load node:$addr)), (i32 index))>;
824 def z_vllezi8 : z_vllez<i32, anyextloadi8, 7>;
825 def z_vllezi16 : z_vllez<i32, anyextloadi16, 3>;
826 def z_vllezi32 : z_vllez<i32, load, 1>;
827 def z_vllezi64 : PatFrags<(ops node:$addr),
828 [(z_vector_insert immAllZerosV,
829 (i64 (load node:$addr)), (i32 0)),
830 (z_join_dwords (i64 (load node:$addr)), (i64 0))]>;
831 // We use high merges to form a v4f32 from four f32s. Propagating zero
832 // into all elements but index 1 gives this expression.
833 def z_vllezf32 : PatFrag<(ops node:$addr),
839 (v4f32 (scalar_to_vector
840 (f32 (load node:$addr)))))))),
842 (bitconvert (v4f32 immAllZerosV))))>;
843 def z_vllezf64 : PatFrag<(ops node:$addr),
845 (v2f64 (scalar_to_vector (f64 (load node:$addr)))),
848 // Similarly for the high element of a zeroed vector.
849 def z_vllezli32 : z_vllez<i32, load, 0>;
850 def z_vllezlf32 : PatFrag<(ops node:$addr),
855 (v4f32 (scalar_to_vector
856 (f32 (load node:$addr)))),
857 (v4f32 immAllZerosV)))),
859 (bitconvert (v4f32 immAllZerosV))))>;
861 // Byte-swapped variants.
862 def z_vllebrzi16 : z_vllez<i32, z_loadbswap16, 3>;
863 def z_vllebrzi32 : z_vllez<i32, z_loadbswap32, 1>;
864 def z_vllebrzli32 : z_vllez<i32, z_loadbswap32, 0>;
865 def z_vllebrzi64 : PatFrags<(ops node:$addr),
866 [(z_vector_insert immAllZerosV,
867 (i64 (z_loadbswap64 node:$addr)),
869 (z_join_dwords (i64 (z_loadbswap64 node:$addr)),
873 // Store one element of a vector.
874 class z_vste<ValueType scalartype, SDPatternOperator store>
875 : PatFrag<(ops node:$vec, node:$addr, node:$index),
876 (store (scalartype (z_vector_extract node:$vec, node:$index)),
878 def z_vstei8 : z_vste<i32, truncstorei8>;
879 def z_vstei16 : z_vste<i32, truncstorei16>;
880 def z_vstei32 : z_vste<i32, store>;
881 def z_vstei64 : z_vste<i64, store>;
882 def z_vstef32 : z_vste<f32, store>;
883 def z_vstef64 : z_vste<f64, store>;
884 // Byte-swapped vector element stores.
885 def z_vstebri16 : z_vste<i32, z_storebswap16>;
886 def z_vstebri32 : z_vste<i32, z_storebswap32>;
887 def z_vstebri64 : z_vste<i64, z_storebswap64>;
889 // Arithmetic negation on vectors.
890 def z_vneg : PatFrag<(ops node:$x), (sub immAllZerosV, node:$x)>;
892 // Bitwise negation on vectors.
893 def z_vnot : PatFrag<(ops node:$x), (xor node:$x, immAllOnesV)>;
895 // Signed "integer greater than zero" on vectors.
896 def z_vicmph_zero : PatFrag<(ops node:$x), (z_vicmph node:$x, immAllZerosV)>;
898 // Signed "integer less than zero" on vectors.
899 def z_vicmpl_zero : PatFrag<(ops node:$x), (z_vicmph immAllZerosV, node:$x)>;
901 // Integer absolute on vectors.
902 class z_viabs<int shift>
903 : PatFrag<(ops node:$src),
904 (xor (add node:$src, (z_vsra_by_scalar node:$src, (i32 shift))),
905 (z_vsra_by_scalar node:$src, (i32 shift)))>;
906 def z_viabs8 : z_viabs<7>;
907 def z_viabs16 : z_viabs<15>;
908 def z_viabs32 : z_viabs<31>;
909 def z_viabs64 : z_viabs<63>;
911 // Sign-extend the i64 elements of a vector.
912 class z_vse<int shift>
913 : PatFrag<(ops node:$src),
914 (z_vsra_by_scalar (z_vshl_by_scalar node:$src, shift), shift)>;
915 def z_vsei8 : z_vse<56>;
916 def z_vsei16 : z_vse<48>;
917 def z_vsei32 : z_vse<32>;
919 // ...and again with the extensions being done on individual i64 scalars.
920 class z_vse_by_parts<SDPatternOperator operator, int index1, int index2>
921 : PatFrag<(ops node:$src),
923 (operator (z_vector_extract node:$src, index1)),
924 (operator (z_vector_extract node:$src, index2)))>;
925 def z_vsei8_by_parts : z_vse_by_parts<sext8dbl, 7, 15>;
926 def z_vsei16_by_parts : z_vse_by_parts<sext16dbl, 3, 7>;
927 def z_vsei32_by_parts : z_vse_by_parts<sext32, 1, 3>;