1 //===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
12 def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>,
14 def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>,
16 def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
17 def SDT_ZCmp : SDTypeProfile<1, 2,
20 def SDT_ZICmp : SDTypeProfile<1, 3,
24 def SDT_ZBRCCMask : SDTypeProfile<0, 4,
29 def SDT_ZSelectCCMask : SDTypeProfile<1, 5,
35 def SDT_ZWrapPtr : SDTypeProfile<1, 1,
38 def SDT_ZWrapOffset : SDTypeProfile<1, 2,
42 def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>;
43 def SDT_ZProbedAlloca : SDTypeProfile<1, 2,
47 def SDT_ZGR128Binary : SDTypeProfile<1, 2,
48 [SDTCisVT<0, untyped>,
51 def SDT_ZBinaryWithFlags : SDTypeProfile<2, 2,
56 def SDT_ZBinaryWithCarry : SDTypeProfile<2, 3,
62 def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5,
69 def SDT_ZAtomicCmpSwapW : SDTypeProfile<2, 6,
78 def SDT_ZAtomicCmpSwap : SDTypeProfile<2, 3,
84 def SDT_ZAtomicLoad128 : SDTypeProfile<1, 1,
85 [SDTCisVT<0, untyped>,
87 def SDT_ZAtomicStore128 : SDTypeProfile<0, 2,
88 [SDTCisVT<0, untyped>,
90 def SDT_ZAtomicCmpSwap128 : SDTypeProfile<2, 3,
91 [SDTCisVT<0, untyped>,
95 SDTCisVT<4, untyped>]>;
96 def SDT_ZMemMemLength : SDTypeProfile<0, 3,
100 def SDT_ZMemMemLengthCC : SDTypeProfile<1, 3,
105 def SDT_ZMemsetMVC : SDTypeProfile<0, 3,
109 def SDT_ZString : SDTypeProfile<1, 3,
114 def SDT_ZStringCC : SDTypeProfile<2, 3,
120 def SDT_ZIPM : SDTypeProfile<1, 1,
123 def SDT_ZPrefetch : SDTypeProfile<0, 2,
126 def SDT_ZTBegin : SDTypeProfile<1, 2,
130 def SDT_ZTEnd : SDTypeProfile<1, 0,
132 def SDT_ZInsertVectorElt : SDTypeProfile<1, 3,
136 def SDT_ZExtractVectorElt : SDTypeProfile<1, 2,
139 def SDT_ZReplicate : SDTypeProfile<1, 1,
141 def SDT_ZVecUnaryConv : SDTypeProfile<1, 1,
144 def SDT_ZVecUnary : SDTypeProfile<1, 1,
146 SDTCisSameAs<0, 1>]>;
147 def SDT_ZVecUnaryCC : SDTypeProfile<2, 1,
150 SDTCisSameAs<0, 2>]>;
151 def SDT_ZVecBinary : SDTypeProfile<1, 2,
154 SDTCisSameAs<0, 2>]>;
155 def SDT_ZVecBinaryCC : SDTypeProfile<2, 2,
159 SDTCisSameAs<0, 2>]>;
160 def SDT_ZVecBinaryInt : SDTypeProfile<1, 2,
164 def SDT_ZVecBinaryConv : SDTypeProfile<1, 2,
167 SDTCisSameAs<1, 2>]>;
168 def SDT_ZVecBinaryConvCC : SDTypeProfile<2, 2,
172 SDTCisSameAs<2, 3>]>;
173 def SDT_ZVecBinaryConvIntCC : SDTypeProfile<2, 2,
178 def SDT_ZRotateMask : SDTypeProfile<1, 2,
182 def SDT_ZJoinDwords : SDTypeProfile<1, 2,
186 def SDT_ZVecTernary : SDTypeProfile<1, 3,
190 SDTCisSameAs<0, 3>]>;
191 def SDT_ZVecTernaryConvCC : SDTypeProfile<2, 3,
196 SDTCisSameAs<0, 4>]>;
197 def SDT_ZVecTernaryInt : SDTypeProfile<1, 3,
202 def SDT_ZVecTernaryIntCC : SDTypeProfile<2, 3,
208 def SDT_ZVecQuaternaryInt : SDTypeProfile<1, 4,
214 def SDT_ZVecQuaternaryIntCC : SDTypeProfile<2, 4,
221 def SDT_ZTest : SDTypeProfile<1, 2,
225 //===----------------------------------------------------------------------===//
227 //===----------------------------------------------------------------------===//
229 // These are target-independent nodes, but have target-specific formats.
230 def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart,
231 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>;
232 def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd,
233 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue,
235 def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>;
237 // Nodes for SystemZISD::*. See SystemZISelLowering.h for more details.
238 def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone,
239 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>;
240 def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall,
241 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
243 def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall,
244 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
246 def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall,
247 [SDNPHasChain, SDNPInGlue, SDNPOutGlue,
249 def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall,
250 [SDNPHasChain, SDNPInGlue, SDNPOutGlue,
252 def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>;
253 def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET",
254 SDT_ZWrapOffset, []>;
255 def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp>;
256 def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp>;
257 def z_strict_fcmp : SDNode<"SystemZISD::STRICT_FCMP", SDT_ZCmp,
259 def z_strict_fcmps : SDNode<"SystemZISD::STRICT_FCMPS", SDT_ZCmp,
261 def z_tm : SDNode<"SystemZISD::TM", SDT_ZICmp>;
262 def z_br_ccmask_1 : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask,
264 def z_select_ccmask_1 : SDNode<"SystemZISD::SELECT_CCMASK",
266 def z_ipm_1 : SDNode<"SystemZISD::IPM", SDT_ZIPM>;
267 def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>;
268 def z_probed_alloca : SDNode<"SystemZISD::PROBED_ALLOCA", SDT_ZProbedAlloca,
270 def z_popcnt : SDNode<"SystemZISD::POPCNT", SDTIntUnaryOp>;
271 def z_smul_lohi : SDNode<"SystemZISD::SMUL_LOHI", SDT_ZGR128Binary>;
272 def z_umul_lohi : SDNode<"SystemZISD::UMUL_LOHI", SDT_ZGR128Binary>;
273 def z_sdivrem : SDNode<"SystemZISD::SDIVREM", SDT_ZGR128Binary>;
274 def z_udivrem : SDNode<"SystemZISD::UDIVREM", SDT_ZGR128Binary>;
275 def z_saddo : SDNode<"SystemZISD::SADDO", SDT_ZBinaryWithFlags>;
276 def z_ssubo : SDNode<"SystemZISD::SSUBO", SDT_ZBinaryWithFlags>;
277 def z_uaddo : SDNode<"SystemZISD::UADDO", SDT_ZBinaryWithFlags>;
278 def z_usubo : SDNode<"SystemZISD::USUBO", SDT_ZBinaryWithFlags>;
279 def z_addcarry_1 : SDNode<"SystemZISD::ADDCARRY", SDT_ZBinaryWithCarry>;
280 def z_subcarry_1 : SDNode<"SystemZISD::SUBCARRY", SDT_ZBinaryWithCarry>;
282 def z_membarrier : SDNode<"SystemZISD::MEMBARRIER", SDTNone,
283 [SDNPHasChain, SDNPSideEffect]>;
285 def z_loadbswap : SDNode<"SystemZISD::LRV", SDTLoad,
286 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
287 def z_storebswap : SDNode<"SystemZISD::STRV", SDTStore,
288 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
289 def z_loadeswap : SDNode<"SystemZISD::VLER", SDTLoad,
290 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
291 def z_storeeswap : SDNode<"SystemZISD::VSTER", SDTStore,
292 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
294 def z_tdc : SDNode<"SystemZISD::TDC", SDT_ZTest>;
296 // Defined because the index is an i32 rather than a pointer.
297 def z_vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT",
298 SDT_ZInsertVectorElt>;
299 def z_vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT",
300 SDT_ZExtractVectorElt>;
301 def z_byte_mask : SDNode<"SystemZISD::BYTE_MASK", SDT_ZReplicate>;
302 def z_rotate_mask : SDNode<"SystemZISD::ROTATE_MASK", SDT_ZRotateMask>;
303 def z_replicate : SDNode<"SystemZISD::REPLICATE", SDT_ZReplicate>;
304 def z_join_dwords : SDNode<"SystemZISD::JOIN_DWORDS", SDT_ZJoinDwords>;
305 def z_splat : SDNode<"SystemZISD::SPLAT", SDT_ZVecBinaryInt>;
306 def z_merge_high : SDNode<"SystemZISD::MERGE_HIGH", SDT_ZVecBinary>;
307 def z_merge_low : SDNode<"SystemZISD::MERGE_LOW", SDT_ZVecBinary>;
308 def z_shl_double : SDNode<"SystemZISD::SHL_DOUBLE", SDT_ZVecTernaryInt>;
309 def z_permute_dwords : SDNode<"SystemZISD::PERMUTE_DWORDS",
311 def z_permute : SDNode<"SystemZISD::PERMUTE", SDT_ZVecTernary>;
312 def z_pack : SDNode<"SystemZISD::PACK", SDT_ZVecBinaryConv>;
313 def z_packs_cc : SDNode<"SystemZISD::PACKS_CC", SDT_ZVecBinaryConvCC>;
314 def z_packls_cc : SDNode<"SystemZISD::PACKLS_CC", SDT_ZVecBinaryConvCC>;
315 def z_unpack_high : SDNode<"SystemZISD::UNPACK_HIGH", SDT_ZVecUnaryConv>;
316 def z_unpackl_high : SDNode<"SystemZISD::UNPACKL_HIGH", SDT_ZVecUnaryConv>;
317 def z_unpack_low : SDNode<"SystemZISD::UNPACK_LOW", SDT_ZVecUnaryConv>;
318 def z_unpackl_low : SDNode<"SystemZISD::UNPACKL_LOW", SDT_ZVecUnaryConv>;
319 def z_vshl_by_scalar : SDNode<"SystemZISD::VSHL_BY_SCALAR",
321 def z_vsrl_by_scalar : SDNode<"SystemZISD::VSRL_BY_SCALAR",
323 def z_vsra_by_scalar : SDNode<"SystemZISD::VSRA_BY_SCALAR",
325 def z_vsum : SDNode<"SystemZISD::VSUM", SDT_ZVecBinaryConv>;
326 def z_vicmpe : SDNode<"SystemZISD::VICMPE", SDT_ZVecBinary>;
327 def z_vicmph : SDNode<"SystemZISD::VICMPH", SDT_ZVecBinary>;
328 def z_vicmphl : SDNode<"SystemZISD::VICMPHL", SDT_ZVecBinary>;
329 def z_vicmpes : SDNode<"SystemZISD::VICMPES", SDT_ZVecBinaryCC>;
330 def z_vicmphs : SDNode<"SystemZISD::VICMPHS", SDT_ZVecBinaryCC>;
331 def z_vicmphls : SDNode<"SystemZISD::VICMPHLS", SDT_ZVecBinaryCC>;
332 def z_vfcmpe : SDNode<"SystemZISD::VFCMPE", SDT_ZVecBinaryConv>;
333 def z_strict_vfcmpe : SDNode<"SystemZISD::STRICT_VFCMPE",
334 SDT_ZVecBinaryConv, [SDNPHasChain]>;
335 def z_strict_vfcmpes : SDNode<"SystemZISD::STRICT_VFCMPES",
336 SDT_ZVecBinaryConv, [SDNPHasChain]>;
337 def z_vfcmph : SDNode<"SystemZISD::VFCMPH", SDT_ZVecBinaryConv>;
338 def z_strict_vfcmph : SDNode<"SystemZISD::STRICT_VFCMPH",
339 SDT_ZVecBinaryConv, [SDNPHasChain]>;
340 def z_strict_vfcmphs : SDNode<"SystemZISD::STRICT_VFCMPHS",
341 SDT_ZVecBinaryConv, [SDNPHasChain]>;
342 def z_vfcmphe : SDNode<"SystemZISD::VFCMPHE", SDT_ZVecBinaryConv>;
343 def z_strict_vfcmphe : SDNode<"SystemZISD::STRICT_VFCMPHE",
344 SDT_ZVecBinaryConv, [SDNPHasChain]>;
345 def z_strict_vfcmphes : SDNode<"SystemZISD::STRICT_VFCMPHES",
346 SDT_ZVecBinaryConv, [SDNPHasChain]>;
347 def z_vfcmpes : SDNode<"SystemZISD::VFCMPES", SDT_ZVecBinaryConvCC>;
348 def z_vfcmphs : SDNode<"SystemZISD::VFCMPHS", SDT_ZVecBinaryConvCC>;
349 def z_vfcmphes : SDNode<"SystemZISD::VFCMPHES", SDT_ZVecBinaryConvCC>;
350 def z_vextend : SDNode<"SystemZISD::VEXTEND", SDT_ZVecUnaryConv>;
351 def z_strict_vextend : SDNode<"SystemZISD::STRICT_VEXTEND",
352 SDT_ZVecUnaryConv, [SDNPHasChain]>;
353 def z_vround : SDNode<"SystemZISD::VROUND", SDT_ZVecUnaryConv>;
354 def z_strict_vround : SDNode<"SystemZISD::STRICT_VROUND",
355 SDT_ZVecUnaryConv, [SDNPHasChain]>;
356 def z_vtm : SDNode<"SystemZISD::VTM", SDT_ZCmp>;
357 def z_vfae_cc : SDNode<"SystemZISD::VFAE_CC", SDT_ZVecTernaryIntCC>;
358 def z_vfaez_cc : SDNode<"SystemZISD::VFAEZ_CC", SDT_ZVecTernaryIntCC>;
359 def z_vfee_cc : SDNode<"SystemZISD::VFEE_CC", SDT_ZVecBinaryCC>;
360 def z_vfeez_cc : SDNode<"SystemZISD::VFEEZ_CC", SDT_ZVecBinaryCC>;
361 def z_vfene_cc : SDNode<"SystemZISD::VFENE_CC", SDT_ZVecBinaryCC>;
362 def z_vfenez_cc : SDNode<"SystemZISD::VFENEZ_CC", SDT_ZVecBinaryCC>;
363 def z_vistr_cc : SDNode<"SystemZISD::VISTR_CC", SDT_ZVecUnaryCC>;
364 def z_vstrc_cc : SDNode<"SystemZISD::VSTRC_CC",
365 SDT_ZVecQuaternaryIntCC>;
366 def z_vstrcz_cc : SDNode<"SystemZISD::VSTRCZ_CC",
367 SDT_ZVecQuaternaryIntCC>;
368 def z_vstrs_cc : SDNode<"SystemZISD::VSTRS_CC",
369 SDT_ZVecTernaryConvCC>;
370 def z_vstrsz_cc : SDNode<"SystemZISD::VSTRSZ_CC",
371 SDT_ZVecTernaryConvCC>;
372 def z_vftci : SDNode<"SystemZISD::VFTCI", SDT_ZVecBinaryConvIntCC>;
374 class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW>
375 : SDNode<"SystemZISD::"#name, profile,
376 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
378 def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">;
379 def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">;
380 def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">;
381 def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">;
382 def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">;
383 def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">;
384 def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">;
385 def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">;
386 def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">;
387 def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">;
388 def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">;
390 def z_atomic_cmp_swap : SDNode<"SystemZISD::ATOMIC_CMP_SWAP",
392 [SDNPHasChain, SDNPMayStore, SDNPMayLoad,
394 def z_atomic_cmp_swapw : SDNode<"SystemZISD::ATOMIC_CMP_SWAPW",
396 [SDNPHasChain, SDNPMayStore, SDNPMayLoad,
399 def z_atomic_load_128 : SDNode<"SystemZISD::ATOMIC_LOAD_128",
401 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
402 def z_atomic_store_128 : SDNode<"SystemZISD::ATOMIC_STORE_128",
404 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
405 def z_atomic_cmp_swap_128 : SDNode<"SystemZISD::ATOMIC_CMP_SWAP_128",
406 SDT_ZAtomicCmpSwap128,
407 [SDNPHasChain, SDNPMayStore, SDNPMayLoad,
410 def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength,
411 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
412 def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength,
413 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
414 def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength,
415 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
416 def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength,
417 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
418 def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLengthCC,
419 [SDNPHasChain, SDNPMayLoad]>;
420 def z_memset_mvc : SDNode<"SystemZISD::MEMSET_MVC", SDT_ZMemsetMVC,
421 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
422 def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZStringCC,
423 [SDNPHasChain, SDNPMayLoad]>;
424 def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString,
425 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
426 def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZStringCC,
427 [SDNPHasChain, SDNPMayLoad]>;
428 def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch,
429 [SDNPHasChain, SDNPMayLoad, SDNPMayStore,
432 def z_tbegin : SDNode<"SystemZISD::TBEGIN", SDT_ZTBegin,
433 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>;
434 def z_tbegin_nofloat : SDNode<"SystemZISD::TBEGIN_NOFLOAT", SDT_ZTBegin,
435 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>;
436 def z_tend : SDNode<"SystemZISD::TEND", SDT_ZTEnd,
437 [SDNPHasChain, SDNPSideEffect]>;
439 def z_vshl : SDNode<"ISD::SHL", SDT_ZVecBinary>;
440 def z_vsra : SDNode<"ISD::SRA", SDT_ZVecBinary>;
441 def z_vsrl : SDNode<"ISD::SRL", SDT_ZVecBinary>;
443 //===----------------------------------------------------------------------===//
445 //===----------------------------------------------------------------------===//
447 def z_loadbswap16 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{
448 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16;
450 def z_loadbswap32 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{
451 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32;
453 def z_loadbswap64 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{
454 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64;
457 def z_storebswap16 : PatFrag<(ops node:$src, node:$addr),
458 (z_storebswap node:$src, node:$addr), [{
459 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16;
461 def z_storebswap32 : PatFrag<(ops node:$src, node:$addr),
462 (z_storebswap node:$src, node:$addr), [{
463 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32;
465 def z_storebswap64 : PatFrag<(ops node:$src, node:$addr),
466 (z_storebswap node:$src, node:$addr), [{
467 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64;
470 // Fragments including CC as an implicit source.
472 : PatFrag<(ops node:$valid, node:$mask, node:$bb),
473 (z_br_ccmask_1 node:$valid, node:$mask, node:$bb, CC)>;
475 : PatFrag<(ops node:$true, node:$false, node:$valid, node:$mask),
476 (z_select_ccmask_1 node:$true, node:$false,
477 node:$valid, node:$mask, CC)>;
478 def z_ipm : PatFrag<(ops), (z_ipm_1 CC)>;
479 def z_addcarry : PatFrag<(ops node:$lhs, node:$rhs),
480 (z_addcarry_1 node:$lhs, node:$rhs, CC)>;
481 def z_subcarry : PatFrag<(ops node:$lhs, node:$rhs),
482 (z_subcarry_1 node:$lhs, node:$rhs, CC)>;
484 // Signed and unsigned comparisons.
485 def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, timm), [{
486 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue();
487 return Type != SystemZICMP::UnsignedOnly;
489 def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, timm), [{
490 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue();
491 return Type != SystemZICMP::SignedOnly;
494 // Register- and memory-based TEST UNDER MASK.
495 def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, timm)>;
496 def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>;
498 // Register sign-extend operations. Sub-32-bit values are represented as i32s.
499 def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>;
500 def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>;
501 def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>;
503 // Match extensions of an i32 to an i64, followed by an in-register sign
504 // extension from a sub-i32 value.
505 def sext8dbl : PatFrag<(ops node:$src), (sext8 (anyext node:$src))>;
506 def sext16dbl : PatFrag<(ops node:$src), (sext16 (anyext node:$src))>;
508 // Register zero-extend operations. Sub-32-bit values are represented as i32s.
509 def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>;
510 def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>;
511 def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>;
513 // Extending loads in which the extension type can be signed.
514 def asextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
515 unsigned Type = cast<LoadSDNode>(N)->getExtensionType();
516 return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD;
518 def asextloadi8 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
519 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
521 def asextloadi16 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
522 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
524 def asextloadi32 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{
525 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
528 // Extending loads in which the extension type can be unsigned.
529 def azextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
530 unsigned Type = cast<LoadSDNode>(N)->getExtensionType();
531 return Type == ISD::EXTLOAD || Type == ISD::ZEXTLOAD;
533 def azextloadi8 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
534 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
536 def azextloadi16 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
537 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
539 def azextloadi32 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{
540 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
543 // Extending loads in which the extension type doesn't matter.
544 def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
545 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD;
547 def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
548 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
550 def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
551 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
553 def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{
554 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
558 class AlignedLoad<SDPatternOperator load>
559 : PatFrag<(ops node:$addr), (load node:$addr),
560 [{ return storeLoadIsAligned(N); }]>;
561 def aligned_load : AlignedLoad<load>;
562 def aligned_asextloadi16 : AlignedLoad<asextloadi16>;
563 def aligned_asextloadi32 : AlignedLoad<asextloadi32>;
564 def aligned_azextloadi16 : AlignedLoad<azextloadi16>;
565 def aligned_azextloadi32 : AlignedLoad<azextloadi32>;
568 class AlignedStore<SDPatternOperator store>
569 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr),
570 [{ return storeLoadIsAligned(N); }]>;
571 def aligned_store : AlignedStore<store>;
572 def aligned_truncstorei16 : AlignedStore<truncstorei16>;
573 def aligned_truncstorei32 : AlignedStore<truncstorei32>;
575 // Non-volatile loads. Used for instructions that might access the storage
576 // location multiple times.
577 class NonvolatileLoad<SDPatternOperator load>
578 : PatFrag<(ops node:$addr), (load node:$addr), [{
579 auto *Load = cast<LoadSDNode>(N);
580 return !Load->isVolatile();
582 def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>;
583 def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>;
584 def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>;
586 // Non-volatile stores.
587 class NonvolatileStore<SDPatternOperator store>
588 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{
589 auto *Store = cast<StoreSDNode>(N);
590 return !Store->isVolatile();
592 def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>;
593 def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>;
594 def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>;
596 // A store of a load that can be implemented using MVC.
597 def mvc_store : PatFrag<(ops node:$value, node:$addr),
598 (unindexedstore node:$value, node:$addr),
599 [{ return storeLoadCanUseMVC(N); }]>;
601 // Binary read-modify-write operations on memory in which the other
602 // operand is also memory and for which block operations like NC can
603 // be used. There are two patterns for each operator, depending on
604 // which operand contains the "other" load.
605 multiclass block_op<SDPatternOperator operator> {
606 def "1" : PatFrag<(ops node:$value, node:$addr),
607 (unindexedstore (operator node:$value,
608 (unindexedload node:$addr)),
610 [{ return storeLoadCanUseBlockBinary(N, 0); }]>;
611 def "2" : PatFrag<(ops node:$value, node:$addr),
612 (unindexedstore (operator (unindexedload node:$addr),
615 [{ return storeLoadCanUseBlockBinary(N, 1); }]>;
617 defm block_and : block_op<and>;
618 defm block_or : block_op<or>;
619 defm block_xor : block_op<xor>;
622 def inserti8 : PatFrag<(ops node:$src1, node:$src2),
623 (or (and node:$src1, -256), node:$src2)>;
624 def insertll : PatFrag<(ops node:$src1, node:$src2),
625 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>;
626 def insertlh : PatFrag<(ops node:$src1, node:$src2),
627 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>;
628 def inserthl : PatFrag<(ops node:$src1, node:$src2),
629 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>;
630 def inserthh : PatFrag<(ops node:$src1, node:$src2),
631 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>;
632 def insertlf : PatFrag<(ops node:$src1, node:$src2),
633 (or (and node:$src1, 0xffffffff00000000), node:$src2)>;
634 def inserthf : PatFrag<(ops node:$src1, node:$src2),
635 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>;
637 // ORs that can be treated as insertions.
638 def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2),
639 (or node:$src1, node:$src2), [{
640 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits();
641 return CurDAG->MaskedValueIsZero(N->getOperand(0),
642 APInt::getLowBitsSet(BitWidth, 8));
645 // ORs that can be treated as reversed insertions.
646 def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2),
647 (or node:$src1, node:$src2), [{
648 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits();
649 return CurDAG->MaskedValueIsZero(N->getOperand(1),
650 APInt::getLowBitsSet(BitWidth, 8));
653 // Negative integer absolute.
654 def z_inegabs : PatFrag<(ops node:$src), (ineg (abs node:$src))>;
656 // Integer multiply-and-add
657 def z_muladd : PatFrag<(ops node:$src1, node:$src2, node:$src3),
658 (add (mul node:$src1, node:$src2), node:$src3)>;
660 // Alternatives to match operations with or without an overflow CC result.
661 def z_sadd : PatFrags<(ops node:$src1, node:$src2),
662 [(z_saddo node:$src1, node:$src2),
663 (add node:$src1, node:$src2)]>;
664 def z_uadd : PatFrags<(ops node:$src1, node:$src2),
665 [(z_uaddo node:$src1, node:$src2),
666 (add node:$src1, node:$src2)]>;
667 def z_ssub : PatFrags<(ops node:$src1, node:$src2),
668 [(z_ssubo node:$src1, node:$src2),
669 (sub node:$src1, node:$src2)]>;
670 def z_usub : PatFrags<(ops node:$src1, node:$src2),
671 [(z_usubo node:$src1, node:$src2),
672 (sub node:$src1, node:$src2)]>;
674 // Combined logical operations.
675 def andc : PatFrag<(ops node:$src1, node:$src2),
676 (and node:$src1, (not node:$src2))>;
677 def orc : PatFrag<(ops node:$src1, node:$src2),
678 (or node:$src1, (not node:$src2))>;
679 def nand : PatFrag<(ops node:$src1, node:$src2),
680 (not (and node:$src1, node:$src2))>;
681 def nor : PatFrag<(ops node:$src1, node:$src2),
682 (not (or node:$src1, node:$src2))>;
683 def nxor : PatFrag<(ops node:$src1, node:$src2),
684 (not (xor node:$src1, node:$src2))>;
686 // Fused multiply-subtract, using the natural operand order.
687 def any_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3),
688 (any_fma node:$src1, node:$src2, (fneg node:$src3))>;
690 // Fused multiply-add and multiply-subtract, but with the order of the
691 // operands matching SystemZ's MA and MS instructions.
692 def z_any_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3),
693 (any_fma node:$src2, node:$src3, node:$src1)>;
694 def z_any_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3),
695 (any_fma node:$src2, node:$src3, (fneg node:$src1))>;
697 // Negative fused multiply-add and multiply-subtract.
698 def any_fnma : PatFrag<(ops node:$src1, node:$src2, node:$src3),
699 (fneg (any_fma node:$src1, node:$src2, node:$src3))>;
700 def any_fnms : PatFrag<(ops node:$src1, node:$src2, node:$src3),
701 (fneg (any_fms node:$src1, node:$src2, node:$src3))>;
703 // Floating-point negative absolute.
704 def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>;
706 // Strict floating-point fragments.
707 def z_any_fcmp : PatFrags<(ops node:$lhs, node:$rhs),
708 [(z_strict_fcmp node:$lhs, node:$rhs),
709 (z_fcmp node:$lhs, node:$rhs)]>;
710 def z_any_vfcmpe : PatFrags<(ops node:$lhs, node:$rhs),
711 [(z_strict_vfcmpe node:$lhs, node:$rhs),
712 (z_vfcmpe node:$lhs, node:$rhs)]>;
713 def z_any_vfcmph : PatFrags<(ops node:$lhs, node:$rhs),
714 [(z_strict_vfcmph node:$lhs, node:$rhs),
715 (z_vfcmph node:$lhs, node:$rhs)]>;
716 def z_any_vfcmphe : PatFrags<(ops node:$lhs, node:$rhs),
717 [(z_strict_vfcmphe node:$lhs, node:$rhs),
718 (z_vfcmphe node:$lhs, node:$rhs)]>;
719 def z_any_vextend : PatFrags<(ops node:$src),
720 [(z_strict_vextend node:$src),
721 (z_vextend node:$src)]>;
722 def z_any_vround : PatFrags<(ops node:$src),
723 [(z_strict_vround node:$src),
724 (z_vround node:$src)]>;
726 // Create a unary operator that loads from memory and then performs
727 // the given operation on it.
728 class loadu<SDPatternOperator operator, SDPatternOperator load = load>
729 : PatFrag<(ops node:$addr), (operator (load node:$addr))>;
731 // Create a store operator that performs the given unary operation
732 // on the value before storing it.
733 class storeu<SDPatternOperator operator, SDPatternOperator store = store>
734 : PatFrag<(ops node:$value, node:$addr),
735 (store (operator node:$value), node:$addr)>;
737 // Create a store operator that performs the given inherent operation
738 // and stores the resulting value.
739 class storei<SDPatternOperator operator, SDPatternOperator store = store>
740 : PatFrag<(ops node:$addr),
741 (store (operator), node:$addr)>;
743 // Create a shift operator that optionally ignores an AND of the
744 // shift count with an immediate if the bottom 6 bits are all set.
745 def imm32bottom6set : PatLeaf<(i32 imm), [{
746 return (N->getZExtValue() & 0x3f) == 0x3f;
748 class shiftop<SDPatternOperator operator>
749 : PatFrags<(ops node:$val, node:$count),
750 [(operator node:$val, node:$count),
751 (operator node:$val, (and node:$count, imm32bottom6set))]>;
753 def imm32mod64 : PatLeaf<(i32 imm), [{
754 return (N->getZExtValue() % 64 == 0);
757 // Load a scalar and replicate it in all elements of a vector.
758 class z_replicate_load<ValueType scalartype, SDPatternOperator load>
759 : PatFrag<(ops node:$addr),
760 (z_replicate (scalartype (load node:$addr)))>;
761 def z_replicate_loadi8 : z_replicate_load<i32, anyextloadi8>;
762 def z_replicate_loadi16 : z_replicate_load<i32, anyextloadi16>;
763 def z_replicate_loadi32 : z_replicate_load<i32, load>;
764 def z_replicate_loadi64 : z_replicate_load<i64, load>;
765 def z_replicate_loadf32 : z_replicate_load<f32, load>;
766 def z_replicate_loadf64 : z_replicate_load<f64, load>;
767 // Byte-swapped replicated vector element loads.
768 def z_replicate_loadbswapi16 : z_replicate_load<i32, z_loadbswap16>;
769 def z_replicate_loadbswapi32 : z_replicate_load<i32, z_loadbswap32>;
770 def z_replicate_loadbswapi64 : z_replicate_load<i64, z_loadbswap64>;
772 // Load a scalar and insert it into a single element of a vector.
773 class z_vle<ValueType scalartype, SDPatternOperator load>
774 : PatFrag<(ops node:$vec, node:$addr, node:$index),
775 (z_vector_insert node:$vec, (scalartype (load node:$addr)),
777 def z_vlei8 : z_vle<i32, anyextloadi8>;
778 def z_vlei16 : z_vle<i32, anyextloadi16>;
779 def z_vlei32 : z_vle<i32, load>;
780 def z_vlei64 : z_vle<i64, load>;
781 def z_vlef32 : z_vle<f32, load>;
782 def z_vlef64 : z_vle<f64, load>;
783 // Byte-swapped vector element loads.
784 def z_vlebri16 : z_vle<i32, z_loadbswap16>;
785 def z_vlebri32 : z_vle<i32, z_loadbswap32>;
786 def z_vlebri64 : z_vle<i64, z_loadbswap64>;
788 // Load a scalar and insert it into the low element of the high i64 of a
790 class z_vllez<ValueType scalartype, SDPatternOperator load, int index>
791 : PatFrag<(ops node:$addr),
792 (z_vector_insert immAllZerosV,
793 (scalartype (load node:$addr)), (i32 index))>;
794 def z_vllezi8 : z_vllez<i32, anyextloadi8, 7>;
795 def z_vllezi16 : z_vllez<i32, anyextloadi16, 3>;
796 def z_vllezi32 : z_vllez<i32, load, 1>;
797 def z_vllezi64 : PatFrags<(ops node:$addr),
798 [(z_vector_insert immAllZerosV,
799 (i64 (load node:$addr)), (i32 0)),
800 (z_join_dwords (i64 (load node:$addr)), (i64 0))]>;
801 // We use high merges to form a v4f32 from four f32s. Propagating zero
802 // into all elements but index 1 gives this expression.
803 def z_vllezf32 : PatFrag<(ops node:$addr),
809 (v4f32 (scalar_to_vector
810 (f32 (load node:$addr)))))))),
812 (bitconvert (v4f32 immAllZerosV))))>;
813 def z_vllezf64 : PatFrag<(ops node:$addr),
815 (v2f64 (scalar_to_vector (f64 (load node:$addr)))),
818 // Similarly for the high element of a zeroed vector.
819 def z_vllezli32 : z_vllez<i32, load, 0>;
820 def z_vllezlf32 : PatFrag<(ops node:$addr),
825 (v4f32 (scalar_to_vector
826 (f32 (load node:$addr)))),
827 (v4f32 immAllZerosV)))),
829 (bitconvert (v4f32 immAllZerosV))))>;
831 // Byte-swapped variants.
832 def z_vllebrzi16 : z_vllez<i32, z_loadbswap16, 3>;
833 def z_vllebrzi32 : z_vllez<i32, z_loadbswap32, 1>;
834 def z_vllebrzli32 : z_vllez<i32, z_loadbswap32, 0>;
835 def z_vllebrzi64 : PatFrags<(ops node:$addr),
836 [(z_vector_insert immAllZerosV,
837 (i64 (z_loadbswap64 node:$addr)),
839 (z_join_dwords (i64 (z_loadbswap64 node:$addr)),
843 // Store one element of a vector.
844 class z_vste<ValueType scalartype, SDPatternOperator store>
845 : PatFrag<(ops node:$vec, node:$addr, node:$index),
846 (store (scalartype (z_vector_extract node:$vec, node:$index)),
848 def z_vstei8 : z_vste<i32, truncstorei8>;
849 def z_vstei16 : z_vste<i32, truncstorei16>;
850 def z_vstei32 : z_vste<i32, store>;
851 def z_vstei64 : z_vste<i64, store>;
852 def z_vstef32 : z_vste<f32, store>;
853 def z_vstef64 : z_vste<f64, store>;
854 // Byte-swapped vector element stores.
855 def z_vstebri16 : z_vste<i32, z_storebswap16>;
856 def z_vstebri32 : z_vste<i32, z_storebswap32>;
857 def z_vstebri64 : z_vste<i64, z_storebswap64>;
859 // Arithmetic negation on vectors.
860 def z_vneg : PatFrag<(ops node:$x), (sub immAllZerosV, node:$x)>;
862 // Bitwise negation on vectors.
863 def z_vnot : PatFrag<(ops node:$x), (xor node:$x, immAllOnesV)>;
865 // Signed "integer greater than zero" on vectors.
866 def z_vicmph_zero : PatFrag<(ops node:$x), (z_vicmph node:$x, immAllZerosV)>;
868 // Signed "integer less than zero" on vectors.
869 def z_vicmpl_zero : PatFrag<(ops node:$x), (z_vicmph immAllZerosV, node:$x)>;
871 // Sign-extend the i64 elements of a vector.
872 class z_vse<int shift>
873 : PatFrag<(ops node:$src),
874 (z_vsra_by_scalar (z_vshl_by_scalar node:$src, shift), shift)>;
875 def z_vsei8 : z_vse<56>;
876 def z_vsei16 : z_vse<48>;
877 def z_vsei32 : z_vse<32>;
879 // ...and again with the extensions being done on individual i64 scalars.
880 class z_vse_by_parts<SDPatternOperator operator, int index1, int index2>
881 : PatFrag<(ops node:$src),
883 (operator (z_vector_extract node:$src, index1)),
884 (operator (z_vector_extract node:$src, index2)))>;
885 def z_vsei8_by_parts : z_vse_by_parts<sext8dbl, 7, 15>;
886 def z_vsei16_by_parts : z_vse_by_parts<sext16dbl, 3, 7>;
887 def z_vsei32_by_parts : z_vse_by_parts<sext32, 1, 3>;