1 //===-- VE.h - Top-level interface for VE representation --------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file contains the entry points for global functions defined in the LLVM
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_VE_VE_H
15 #define LLVM_LIB_TARGET_VE_VE_H
17 #include "MCTargetDesc/VEMCTargetDesc.h"
18 #include "llvm/ADT/StringSwitch.h"
19 #include "llvm/Support/ErrorHandling.h"
20 #include "llvm/Target/TargetMachine.h"
24 class VETargetMachine;
25 class formatted_raw_ostream;
30 FunctionPass *createVEISelDag(VETargetMachine &TM);
31 FunctionPass *createVEPromoteToI1Pass();
33 void LowerVEMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
38 // Enums corresponding to VE condition codes, both icc's and fcc's. These
39 // values must be kept in sync with the ones in the .td file.
45 CC_INE = 2, // Not Equal
47 CC_IGE = 4, // Greater or Equal
48 CC_ILE = 5, // Less or Equal
50 // Floating point comparison
51 CC_AF = 0 + 6, // Never
52 CC_G = 1 + 6, // Greater
54 CC_NE = 3 + 6, // Not Equal
55 CC_EQ = 4 + 6, // Equal
56 CC_GE = 5 + 6, // Greater or Equal
57 CC_LE = 6 + 6, // Less or Equal
58 CC_NUM = 7 + 6, // Number
59 CC_NAN = 8 + 6, // NaN
60 CC_GNAN = 9 + 6, // Greater or NaN
61 CC_LNAN = 10 + 6, // Less or NaN
62 CC_NENAN = 11 + 6, // Not Equal or NaN
63 CC_EQNAN = 12 + 6, // Equal or NaN
64 CC_GENAN = 13 + 6, // Greater or Equal or NaN
65 CC_LENAN = 14 + 6, // Less or Equal or NaN
66 CC_AT = 15 + 6, // Always
70 // Enums corresponding to VE Rounding Mode. These values must be kept in
71 // sync with the ones in the .td file.
74 RD_NONE = 0, // According to PSW
75 RD_RZ = 8, // Round toward Zero
76 RD_RP = 9, // Round toward Plus infinity
77 RD_RM = 10, // Round toward Minus infinity
78 RD_RN = 11, // Round to Nearest (ties to Even)
79 RD_RA = 12, // Round to Nearest (ties to Away)
84 inline static const char *VECondCodeToString(VECC::CondCode CC) {
86 case VECC::CC_IG: return "gt";
87 case VECC::CC_IL: return "lt";
88 case VECC::CC_INE: return "ne";
89 case VECC::CC_IEQ: return "eq";
90 case VECC::CC_IGE: return "ge";
91 case VECC::CC_ILE: return "le";
92 case VECC::CC_AF: return "af";
93 case VECC::CC_G: return "gt";
94 case VECC::CC_L: return "lt";
95 case VECC::CC_NE: return "ne";
96 case VECC::CC_EQ: return "eq";
97 case VECC::CC_GE: return "ge";
98 case VECC::CC_LE: return "le";
99 case VECC::CC_NUM: return "num";
100 case VECC::CC_NAN: return "nan";
101 case VECC::CC_GNAN: return "gtnan";
102 case VECC::CC_LNAN: return "ltnan";
103 case VECC::CC_NENAN: return "nenan";
104 case VECC::CC_EQNAN: return "eqnan";
105 case VECC::CC_GENAN: return "genan";
106 case VECC::CC_LENAN: return "lenan";
107 case VECC::CC_AT: return "at";
109 llvm_unreachable("Invalid cond code");
113 inline static VECC::CondCode stringToVEICondCode(StringRef S) {
114 return StringSwitch<VECC::CondCode>(S)
115 .Case("gt", VECC::CC_IG)
116 .Case("lt", VECC::CC_IL)
117 .Case("ne", VECC::CC_INE)
118 .Case("eq", VECC::CC_IEQ)
119 .Case("ge", VECC::CC_IGE)
120 .Case("le", VECC::CC_ILE)
121 .Case("af", VECC::CC_AF)
122 .Case("at", VECC::CC_AT)
123 .Case("", VECC::CC_AT)
124 .Default(VECC::UNKNOWN);
127 inline static VECC::CondCode stringToVEFCondCode(StringRef S) {
128 return StringSwitch<VECC::CondCode>(S)
129 .Case("gt", VECC::CC_G)
130 .Case("lt", VECC::CC_L)
131 .Case("ne", VECC::CC_NE)
132 .Case("eq", VECC::CC_EQ)
133 .Case("ge", VECC::CC_GE)
134 .Case("le", VECC::CC_LE)
135 .Case("num", VECC::CC_NUM)
136 .Case("nan", VECC::CC_NAN)
137 .Case("gtnan", VECC::CC_GNAN)
138 .Case("ltnan", VECC::CC_LNAN)
139 .Case("nenan", VECC::CC_NENAN)
140 .Case("eqnan", VECC::CC_EQNAN)
141 .Case("genan", VECC::CC_GENAN)
142 .Case("lenan", VECC::CC_LENAN)
143 .Case("af", VECC::CC_AF)
144 .Case("at", VECC::CC_AT)
145 .Case("", VECC::CC_AT)
146 .Default(VECC::UNKNOWN);
149 inline static unsigned VECondCodeToVal(VECC::CondCode CC) {
196 llvm_unreachable("Invalid cond code");
200 inline static VECC::CondCode VEValToCondCode(unsigned Val, bool IsInteger) {
241 return VECC::CC_GNAN;
243 return VECC::CC_LNAN;
245 return VECC::CC_NENAN;
247 return VECC::CC_EQNAN;
249 return VECC::CC_GENAN;
251 return VECC::CC_LENAN;
256 llvm_unreachable("Invalid cond code");
259 inline static const char *VERDToString(VERD::RoundingMode R) {
274 llvm_unreachable("Invalid branch predicate");
278 inline static VERD::RoundingMode stringToVERD(StringRef S) {
279 return StringSwitch<VERD::RoundingMode>(S)
280 .Case("", VERD::RD_NONE)
281 .Case(".rz", VERD::RD_RZ)
282 .Case(".rp", VERD::RD_RP)
283 .Case(".rm", VERD::RD_RM)
284 .Case(".rn", VERD::RD_RN)
285 .Case(".ra", VERD::RD_RA)
286 .Default(VERD::UNKNOWN);
289 inline static unsigned VERDToVal(VERD::RoundingMode R) {
297 return static_cast<unsigned>(R);
301 llvm_unreachable("Invalid branch predicates");
304 inline static VERD::RoundingMode VEValToRD(unsigned Val) {
306 case static_cast<unsigned>(VERD::RD_NONE):
307 return VERD::RD_NONE;
308 case static_cast<unsigned>(VERD::RD_RZ):
310 case static_cast<unsigned>(VERD::RD_RP):
312 case static_cast<unsigned>(VERD::RD_RM):
314 case static_cast<unsigned>(VERD::RD_RN):
316 case static_cast<unsigned>(VERD::RD_RA):
321 llvm_unreachable("Invalid branch predicates");
324 // MImm - Special immediate value of sequential bit stream of 0 or 1.
325 // See VEInstrInfo.td for details.
326 inline static bool isMImmVal(uint64_t Val) {
331 if (isMask_64(Val)) {
336 return (Val & (1UL << 63)) && isShiftedMask_64(Val);
339 inline static bool isMImm32Val(uint32_t Val) {
344 if (isMask_32(Val)) {
349 return (Val & (1 << 31)) && isShiftedMask_32(Val);
352 inline unsigned M0(unsigned Val) { return Val + 64; }
353 inline unsigned M1(unsigned Val) { return Val; }