1 //===-- VEISelDAGToDAG.cpp - A dag to dag inst selector for VE ------------===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file defines an instruction selector for the VE target.
11 //===----------------------------------------------------------------------===//
13 #include "VETargetMachine.h"
14 #include "llvm/CodeGen/MachineRegisterInfo.h"
15 #include "llvm/CodeGen/SelectionDAGISel.h"
16 #include "llvm/IR/Intrinsics.h"
17 #include "llvm/Support/Debug.h"
18 #include "llvm/Support/ErrorHandling.h"
19 #include "llvm/Support/raw_ostream.h"
22 //===----------------------------------------------------------------------===//
23 // Instruction Selector Implementation
24 //===----------------------------------------------------------------------===//
26 /// Convert a DAG integer condition code to a VE ICC condition.
27 inline static VECC::CondCode intCondCode2Icc(ISD::CondCode CC) {
30 llvm_unreachable("Unknown integer condition code!");
54 /// Convert a DAG floating point condition code to a VE FCC condition.
55 inline static VECC::CondCode fpCondCode2Fcc(ISD::CondCode CC) {
58 llvm_unreachable("Unknown fp condition code!");
84 return VECC::CC_EQNAN;
86 return VECC::CC_NENAN;
92 return VECC::CC_LENAN;
94 return VECC::CC_GENAN;
100 /// getImmVal - get immediate representation of integer value
101 inline static uint64_t getImmVal(const ConstantSDNode *N) {
102 return N->getSExtValue();
105 /// getFpImmVal - get immediate representation of floating point value
106 inline static uint64_t getFpImmVal(const ConstantFPSDNode *N) {
107 const APInt &Imm = N->getValueAPF().bitcastToAPInt();
108 uint64_t Val = Imm.getZExtValue();
109 if (Imm.getBitWidth() == 32) {
110 // Immediate value of float place places at higher bits on VE.
116 /// convMImmVal - Convert a mimm integer immediate value to target immediate.
117 inline static uint64_t convMImmVal(uint64_t Val) {
120 if (Val & (1UL << 63))
121 return countLeadingOnes(Val); // (m)1
122 return countLeadingZeros(Val) | 0x40; // (m)0
125 //===--------------------------------------------------------------------===//
126 /// VEDAGToDAGISel - VE specific code to select VE machine
127 /// instructions for SelectionDAG operations.
130 class VEDAGToDAGISel : public SelectionDAGISel {
131 /// Subtarget - Keep a pointer to the VE Subtarget around so that we can
132 /// make the right decision when generating code for different targets.
133 const VESubtarget *Subtarget;
136 explicit VEDAGToDAGISel(VETargetMachine &tm) : SelectionDAGISel(tm) {}
138 bool runOnMachineFunction(MachineFunction &MF) override {
139 Subtarget = &MF.getSubtarget<VESubtarget>();
140 return SelectionDAGISel::runOnMachineFunction(MF);
143 void Select(SDNode *N) override;
145 // Complex Pattern Selectors.
146 bool selectADDRrri(SDValue N, SDValue &Base, SDValue &Index, SDValue &Offset);
147 bool selectADDRrii(SDValue N, SDValue &Base, SDValue &Index, SDValue &Offset);
148 bool selectADDRzri(SDValue N, SDValue &Base, SDValue &Index, SDValue &Offset);
149 bool selectADDRzii(SDValue N, SDValue &Base, SDValue &Index, SDValue &Offset);
150 bool selectADDRri(SDValue N, SDValue &Base, SDValue &Offset);
152 StringRef getPassName() const override {
153 return "VE DAG->DAG Pattern Instruction Selection";
156 // Include the pieces autogenerated from the target description.
157 #include "VEGenDAGISel.inc"
160 SDNode *getGlobalBaseReg();
162 bool matchADDRrr(SDValue N, SDValue &Base, SDValue &Index);
163 bool matchADDRri(SDValue N, SDValue &Base, SDValue &Offset);
165 } // end anonymous namespace
167 bool VEDAGToDAGISel::selectADDRrri(SDValue Addr, SDValue &Base, SDValue &Index,
169 if (Addr.getOpcode() == ISD::FrameIndex)
171 if (Addr.getOpcode() == ISD::TargetExternalSymbol ||
172 Addr.getOpcode() == ISD::TargetGlobalAddress ||
173 Addr.getOpcode() == ISD::TargetGlobalTLSAddress)
174 return false; // direct calls.
177 if (matchADDRri(Addr, LHS, RHS)) {
178 if (matchADDRrr(LHS, Base, Index)) {
182 // Return false to try selectADDRrii.
185 if (matchADDRrr(Addr, LHS, RHS)) {
186 if (matchADDRri(RHS, Index, Offset)) {
190 if (matchADDRri(LHS, Base, Offset)) {
196 Offset = CurDAG->getTargetConstant(0, SDLoc(Addr), MVT::i32);
199 return false; // Let the reg+imm(=0) pattern catch this!
202 bool VEDAGToDAGISel::selectADDRrii(SDValue Addr, SDValue &Base, SDValue &Index,
204 if (matchADDRri(Addr, Base, Offset)) {
205 Index = CurDAG->getTargetConstant(0, SDLoc(Addr), MVT::i32);
210 Index = CurDAG->getTargetConstant(0, SDLoc(Addr), MVT::i32);
211 Offset = CurDAG->getTargetConstant(0, SDLoc(Addr), MVT::i32);
215 bool VEDAGToDAGISel::selectADDRzri(SDValue Addr, SDValue &Base, SDValue &Index,
221 bool VEDAGToDAGISel::selectADDRzii(SDValue Addr, SDValue &Base, SDValue &Index,
223 if (dyn_cast<FrameIndexSDNode>(Addr)) {
226 if (Addr.getOpcode() == ISD::TargetExternalSymbol ||
227 Addr.getOpcode() == ISD::TargetGlobalAddress ||
228 Addr.getOpcode() == ISD::TargetGlobalTLSAddress)
229 return false; // direct calls.
231 if (ConstantSDNode *CN = cast<ConstantSDNode>(Addr)) {
232 if (isInt<32>(CN->getSExtValue())) {
233 Base = CurDAG->getTargetConstant(0, SDLoc(Addr), MVT::i32);
234 Index = CurDAG->getTargetConstant(0, SDLoc(Addr), MVT::i32);
236 CurDAG->getTargetConstant(CN->getZExtValue(), SDLoc(Addr), MVT::i32);
243 bool VEDAGToDAGISel::selectADDRri(SDValue Addr, SDValue &Base,
245 if (matchADDRri(Addr, Base, Offset))
249 Offset = CurDAG->getTargetConstant(0, SDLoc(Addr), MVT::i32);
253 bool VEDAGToDAGISel::matchADDRrr(SDValue Addr, SDValue &Base, SDValue &Index) {
254 if (dyn_cast<FrameIndexSDNode>(Addr))
256 if (Addr.getOpcode() == ISD::TargetExternalSymbol ||
257 Addr.getOpcode() == ISD::TargetGlobalAddress ||
258 Addr.getOpcode() == ISD::TargetGlobalTLSAddress)
259 return false; // direct calls.
261 if (Addr.getOpcode() == ISD::ADD) {
262 ; // Nothing to do here.
263 } else if (Addr.getOpcode() == ISD::OR) {
264 // We want to look through a transform in InstCombine and DAGCombiner that
265 // turns 'add' into 'or', so we can treat this 'or' exactly like an 'add'.
266 if (!CurDAG->haveNoCommonBitsSet(Addr.getOperand(0), Addr.getOperand(1)))
272 if (Addr.getOperand(0).getOpcode() == VEISD::Lo ||
273 Addr.getOperand(1).getOpcode() == VEISD::Lo)
274 return false; // Let the LEASL patterns catch this!
276 Base = Addr.getOperand(0);
277 Index = Addr.getOperand(1);
281 bool VEDAGToDAGISel::matchADDRri(SDValue Addr, SDValue &Base, SDValue &Offset) {
282 auto AddrTy = Addr->getValueType(0);
283 if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>(Addr)) {
284 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), AddrTy);
285 Offset = CurDAG->getTargetConstant(0, SDLoc(Addr), MVT::i32);
288 if (Addr.getOpcode() == ISD::TargetExternalSymbol ||
289 Addr.getOpcode() == ISD::TargetGlobalAddress ||
290 Addr.getOpcode() == ISD::TargetGlobalTLSAddress)
291 return false; // direct calls.
293 if (CurDAG->isBaseWithConstantOffset(Addr)) {
294 ConstantSDNode *CN = cast<ConstantSDNode>(Addr.getOperand(1));
295 if (isInt<32>(CN->getSExtValue())) {
296 if (FrameIndexSDNode *FIN =
297 dyn_cast<FrameIndexSDNode>(Addr.getOperand(0))) {
298 // Constant offset from frame ref.
299 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), AddrTy);
301 Base = Addr.getOperand(0);
304 CurDAG->getTargetConstant(CN->getZExtValue(), SDLoc(Addr), MVT::i32);
311 void VEDAGToDAGISel::Select(SDNode *N) {
313 if (N->isMachineOpcode()) {
315 return; // Already selected.
318 switch (N->getOpcode()) {
319 case VEISD::GLOBAL_BASE_REG:
320 ReplaceNode(N, getGlobalBaseReg());
327 SDNode *VEDAGToDAGISel::getGlobalBaseReg() {
328 Register GlobalBaseReg = Subtarget->getInstrInfo()->getGlobalBaseReg(MF);
330 ->getRegister(GlobalBaseReg, TLI->getPointerTy(CurDAG->getDataLayout()))
334 /// createVEISelDag - This pass converts a legalized DAG into a
335 /// VE-specific DAG, ready for instruction scheduling.
337 FunctionPass *llvm::createVEISelDag(VETargetMachine &TM) {
338 return new VEDAGToDAGISel(TM);