1 //===- ADCE.cpp - Code to perform dead code elimination -------------------===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file implements the Aggressive Dead Code Elimination pass. This pass
10 // optimistically assumes that all instructions are dead until proven otherwise,
11 // allowing it to eliminate dead computations that other DCE passes do not
12 // catch, particularly involving loop computations.
14 //===----------------------------------------------------------------------===//
16 #include "llvm/Transforms/Scalar/ADCE.h"
17 #include "llvm/ADT/DenseMap.h"
18 #include "llvm/ADT/DepthFirstIterator.h"
19 #include "llvm/ADT/GraphTraits.h"
20 #include "llvm/ADT/MapVector.h"
21 #include "llvm/ADT/PostOrderIterator.h"
22 #include "llvm/ADT/SetVector.h"
23 #include "llvm/ADT/SmallPtrSet.h"
24 #include "llvm/ADT/SmallVector.h"
25 #include "llvm/ADT/Statistic.h"
26 #include "llvm/Analysis/DomTreeUpdater.h"
27 #include "llvm/Analysis/GlobalsModRef.h"
28 #include "llvm/Analysis/IteratedDominanceFrontier.h"
29 #include "llvm/Analysis/PostDominators.h"
30 #include "llvm/IR/BasicBlock.h"
31 #include "llvm/IR/CFG.h"
32 #include "llvm/IR/DebugInfoMetadata.h"
33 #include "llvm/IR/DebugLoc.h"
34 #include "llvm/IR/Dominators.h"
35 #include "llvm/IR/Function.h"
36 #include "llvm/IR/IRBuilder.h"
37 #include "llvm/IR/InstIterator.h"
38 #include "llvm/IR/InstrTypes.h"
39 #include "llvm/IR/Instruction.h"
40 #include "llvm/IR/Instructions.h"
41 #include "llvm/IR/IntrinsicInst.h"
42 #include "llvm/IR/PassManager.h"
43 #include "llvm/IR/Use.h"
44 #include "llvm/IR/Value.h"
45 #include "llvm/InitializePasses.h"
46 #include "llvm/Pass.h"
47 #include "llvm/ProfileData/InstrProf.h"
48 #include "llvm/Support/Casting.h"
49 #include "llvm/Support/CommandLine.h"
50 #include "llvm/Support/Debug.h"
51 #include "llvm/Support/raw_ostream.h"
52 #include "llvm/Transforms/Scalar.h"
59 #define DEBUG_TYPE "adce"
61 STATISTIC(NumRemoved, "Number of instructions removed");
62 STATISTIC(NumBranchesRemoved, "Number of branch instructions removed");
64 // This is a temporary option until we change the interface to this pass based
65 // on optimization level.
66 static cl::opt<bool> RemoveControlFlowFlag("adce-remove-control-flow",
67 cl::init(true), cl::Hidden);
69 // This option enables removing of may-be-infinite loops which have no other
71 static cl::opt<bool> RemoveLoops("adce-remove-loops", cl::init(false),
76 /// Information about Instructions
78 /// True if the associated instruction is live.
81 /// Quick access to information for block containing associated Instruction.
82 struct BlockInfoType *Block = nullptr;
85 /// Information about basic blocks relevant to dead code elimination.
86 struct BlockInfoType {
87 /// True when this block contains a live instructions.
90 /// True when this block ends in an unconditional branch.
91 bool UnconditionalBranch = false;
93 /// True when this block is known to have live PHI nodes.
94 bool HasLivePhiNodes = false;
96 /// Control dependence sources need to be live for this block.
99 /// Quick access to the LiveInfo for the terminator,
100 /// holds the value &InstInfo[Terminator]
101 InstInfoType *TerminatorLiveInfo = nullptr;
103 /// Corresponding BasicBlock.
104 BasicBlock *BB = nullptr;
106 /// Cache of BB->getTerminator().
107 Instruction *Terminator = nullptr;
109 /// Post-order numbering of reverse control flow graph.
112 bool terminatorIsLive() const { return TerminatorLiveInfo->Live; }
115 class AggressiveDeadCodeElimination {
118 // ADCE does not use DominatorTree per se, but it updates it to preserve the
121 PostDominatorTree &PDT;
123 /// Mapping of blocks to associated information, an element in BlockInfoVec.
124 /// Use MapVector to get deterministic iteration order.
125 MapVector<BasicBlock *, BlockInfoType> BlockInfo;
126 bool isLive(BasicBlock *BB) { return BlockInfo[BB].Live; }
128 /// Mapping of instructions to associated information.
129 DenseMap<Instruction *, InstInfoType> InstInfo;
130 bool isLive(Instruction *I) { return InstInfo[I].Live; }
132 /// Instructions known to be live where we need to mark
133 /// reaching definitions as live.
134 SmallVector<Instruction *, 128> Worklist;
136 /// Debug info scopes around a live instruction.
137 SmallPtrSet<const Metadata *, 32> AliveScopes;
139 /// Set of blocks with not known to have live terminators.
140 SmallSetVector<BasicBlock *, 16> BlocksWithDeadTerminators;
142 /// The set of blocks which we have determined whose control
143 /// dependence sources must be live and which have not had
144 /// those dependences analyzed.
145 SmallPtrSet<BasicBlock *, 16> NewLiveBlocks;
147 /// Set up auxiliary data structures for Instructions and BasicBlocks and
148 /// initialize the Worklist to the set of must-be-live Instruscions.
151 /// Return true for operations which are always treated as live.
152 bool isAlwaysLive(Instruction &I);
154 /// Return true for instrumentation instructions for value profiling.
155 bool isInstrumentsConstant(Instruction &I);
157 /// Propagate liveness to reaching definitions.
158 void markLiveInstructions();
160 /// Mark an instruction as live.
161 void markLive(Instruction *I);
163 /// Mark a block as live.
164 void markLive(BlockInfoType &BB);
165 void markLive(BasicBlock *BB) { markLive(BlockInfo[BB]); }
167 /// Mark terminators of control predecessors of a PHI node live.
168 void markPhiLive(PHINode *PN);
170 /// Record the Debug Scopes which surround live debug information.
171 void collectLiveScopes(const DILocalScope &LS);
172 void collectLiveScopes(const DILocation &DL);
174 /// Analyze dead branches to find those whose branches are the sources
175 /// of control dependences impacting a live block. Those branches are
177 void markLiveBranchesFromControlDependences();
179 /// Remove instructions not marked live, return if any instruction was
181 bool removeDeadInstructions();
183 /// Identify connected sections of the control flow graph which have
184 /// dead terminators and rewrite the control flow graph to remove them.
185 bool updateDeadRegions();
187 /// Set the BlockInfo::PostOrder field based on a post-order
188 /// numbering of the reverse control flow graph.
189 void computeReversePostOrder();
191 /// Make the terminator of this block an unconditional branch to \p Target.
192 void makeUnconditional(BasicBlock *BB, BasicBlock *Target);
195 AggressiveDeadCodeElimination(Function &F, DominatorTree *DT,
196 PostDominatorTree &PDT)
197 : F(F), DT(DT), PDT(PDT) {}
199 bool performDeadCodeElimination();
202 } // end anonymous namespace
204 bool AggressiveDeadCodeElimination::performDeadCodeElimination() {
206 markLiveInstructions();
207 return removeDeadInstructions();
210 static bool isUnconditionalBranch(Instruction *Term) {
211 auto *BR = dyn_cast<BranchInst>(Term);
212 return BR && BR->isUnconditional();
215 void AggressiveDeadCodeElimination::initialize() {
216 auto NumBlocks = F.size();
218 // We will have an entry in the map for each block so we grow the
219 // structure to twice that size to keep the load factor low in the hash table.
220 BlockInfo.reserve(NumBlocks);
223 // Iterate over blocks and initialize BlockInfoVec entries, count
224 // instructions to size the InstInfo hash table.
226 NumInsts += BB.size();
227 auto &Info = BlockInfo[&BB];
229 Info.Terminator = BB.getTerminator();
230 Info.UnconditionalBranch = isUnconditionalBranch(Info.Terminator);
233 // Initialize instruction map and set pointers to block info.
234 InstInfo.reserve(NumInsts);
235 for (auto &BBInfo : BlockInfo)
236 for (Instruction &I : *BBInfo.second.BB)
237 InstInfo[&I].Block = &BBInfo.second;
239 // Since BlockInfoVec holds pointers into InstInfo and vice-versa, we may not
240 // add any more elements to either after this point.
241 for (auto &BBInfo : BlockInfo)
242 BBInfo.second.TerminatorLiveInfo = &InstInfo[BBInfo.second.Terminator];
244 // Collect the set of "root" instructions that are known live.
245 for (Instruction &I : instructions(F))
249 if (!RemoveControlFlowFlag)
253 // This stores state for the depth-first iterator. In addition
254 // to recording which nodes have been visited we also record whether
255 // a node is currently on the "stack" of active ancestors of the current
257 using StatusMap = DenseMap<BasicBlock *, bool>;
259 class DFState : public StatusMap {
261 std::pair<StatusMap::iterator, bool> insert(BasicBlock *BB) {
262 return StatusMap::insert(std::make_pair(BB, true));
265 // Invoked after we have visited all children of a node.
266 void completed(BasicBlock *BB) { (*this)[BB] = false; }
268 // Return true if \p BB is currently on the active stack
270 bool onStack(BasicBlock *BB) {
271 auto Iter = find(BB);
272 return Iter != end() && Iter->second;
276 State.reserve(F.size());
277 // Iterate over blocks in depth-first pre-order and
278 // treat all edges to a block already seen as loop back edges
279 // and mark the branch live it if there is a back edge.
280 for (auto *BB: depth_first_ext(&F.getEntryBlock(), State)) {
281 Instruction *Term = BB->getTerminator();
285 for (auto *Succ : successors(BB))
286 if (State.onStack(Succ)) {
294 // Mark blocks live if there is no path from the block to a
295 // return of the function.
296 // We do this by seeing which of the postdomtree root children exit the
297 // program, and for all others, mark the subtree live.
298 for (auto &PDTChild : children<DomTreeNode *>(PDT.getRootNode())) {
299 auto *BB = PDTChild->getBlock();
300 auto &Info = BlockInfo[BB];
301 // Real function return
302 if (isa<ReturnInst>(Info.Terminator)) {
303 LLVM_DEBUG(dbgs() << "post-dom root child is a return: " << BB->getName()
308 // This child is something else, like an infinite loop.
309 for (auto DFNode : depth_first(PDTChild))
310 markLive(BlockInfo[DFNode->getBlock()].Terminator);
313 // Treat the entry block as always live
314 auto *BB = &F.getEntryBlock();
315 auto &EntryInfo = BlockInfo[BB];
316 EntryInfo.Live = true;
317 if (EntryInfo.UnconditionalBranch)
318 markLive(EntryInfo.Terminator);
320 // Build initial collection of blocks with dead terminators
321 for (auto &BBInfo : BlockInfo)
322 if (!BBInfo.second.terminatorIsLive())
323 BlocksWithDeadTerminators.insert(BBInfo.second.BB);
326 bool AggressiveDeadCodeElimination::isAlwaysLive(Instruction &I) {
327 // TODO -- use llvm::isInstructionTriviallyDead
328 if (I.isEHPad() || I.mayHaveSideEffects()) {
329 // Skip any value profile instrumentation calls if they are
330 // instrumenting constants.
331 if (isInstrumentsConstant(I))
335 if (!I.isTerminator())
337 if (RemoveControlFlowFlag && (isa<BranchInst>(I) || isa<SwitchInst>(I)))
342 // Check if this instruction is a runtime call for value profiling and
343 // if it's instrumenting a constant.
344 bool AggressiveDeadCodeElimination::isInstrumentsConstant(Instruction &I) {
345 // TODO -- move this test into llvm::isInstructionTriviallyDead
346 if (CallInst *CI = dyn_cast<CallInst>(&I))
347 if (Function *Callee = CI->getCalledFunction())
348 if (Callee->getName().equals(getInstrProfValueProfFuncName()))
349 if (isa<Constant>(CI->getArgOperand(0)))
354 void AggressiveDeadCodeElimination::markLiveInstructions() {
355 // Propagate liveness backwards to operands.
357 // Worklist holds newly discovered live instructions
358 // where we need to mark the inputs as live.
359 while (!Worklist.empty()) {
360 Instruction *LiveInst = Worklist.pop_back_val();
361 LLVM_DEBUG(dbgs() << "work live: "; LiveInst->dump(););
363 for (Use &OI : LiveInst->operands())
364 if (Instruction *Inst = dyn_cast<Instruction>(OI))
367 if (auto *PN = dyn_cast<PHINode>(LiveInst))
371 // After data flow liveness has been identified, examine which branch
372 // decisions are required to determine live instructions are executed.
373 markLiveBranchesFromControlDependences();
375 } while (!Worklist.empty());
378 void AggressiveDeadCodeElimination::markLive(Instruction *I) {
379 auto &Info = InstInfo[I];
383 LLVM_DEBUG(dbgs() << "mark live: "; I->dump());
385 Worklist.push_back(I);
387 // Collect the live debug info scopes attached to this instruction.
388 if (const DILocation *DL = I->getDebugLoc())
389 collectLiveScopes(*DL);
391 // Mark the containing block live
392 auto &BBInfo = *Info.Block;
393 if (BBInfo.Terminator == I) {
394 BlocksWithDeadTerminators.remove(BBInfo.BB);
395 // For live terminators, mark destination blocks
396 // live to preserve this control flow edges.
397 if (!BBInfo.UnconditionalBranch)
398 for (auto *BB : successors(I->getParent()))
404 void AggressiveDeadCodeElimination::markLive(BlockInfoType &BBInfo) {
407 LLVM_DEBUG(dbgs() << "mark block live: " << BBInfo.BB->getName() << '\n');
409 if (!BBInfo.CFLive) {
410 BBInfo.CFLive = true;
411 NewLiveBlocks.insert(BBInfo.BB);
414 // Mark unconditional branches at the end of live
415 // blocks as live since there is no work to do for them later
416 if (BBInfo.UnconditionalBranch)
417 markLive(BBInfo.Terminator);
420 void AggressiveDeadCodeElimination::collectLiveScopes(const DILocalScope &LS) {
421 if (!AliveScopes.insert(&LS).second)
424 if (isa<DISubprogram>(LS))
427 // Tail-recurse through the scope chain.
428 collectLiveScopes(cast<DILocalScope>(*LS.getScope()));
431 void AggressiveDeadCodeElimination::collectLiveScopes(const DILocation &DL) {
432 // Even though DILocations are not scopes, shove them into AliveScopes so we
433 // don't revisit them.
434 if (!AliveScopes.insert(&DL).second)
437 // Collect live scopes from the scope chain.
438 collectLiveScopes(*DL.getScope());
440 // Tail-recurse through the inlined-at chain.
441 if (const DILocation *IA = DL.getInlinedAt())
442 collectLiveScopes(*IA);
445 void AggressiveDeadCodeElimination::markPhiLive(PHINode *PN) {
446 auto &Info = BlockInfo[PN->getParent()];
447 // Only need to check this once per block.
448 if (Info.HasLivePhiNodes)
450 Info.HasLivePhiNodes = true;
452 // If a predecessor block is not live, mark it as control-flow live
453 // which will trigger marking live branches upon which
454 // that block is control dependent.
455 for (auto *PredBB : predecessors(Info.BB)) {
456 auto &Info = BlockInfo[PredBB];
459 NewLiveBlocks.insert(PredBB);
464 void AggressiveDeadCodeElimination::markLiveBranchesFromControlDependences() {
465 if (BlocksWithDeadTerminators.empty())
469 dbgs() << "new live blocks:\n";
470 for (auto *BB : NewLiveBlocks)
471 dbgs() << "\t" << BB->getName() << '\n';
472 dbgs() << "dead terminator blocks:\n";
473 for (auto *BB : BlocksWithDeadTerminators)
474 dbgs() << "\t" << BB->getName() << '\n';
477 // The dominance frontier of a live block X in the reverse
478 // control graph is the set of blocks upon which X is control
479 // dependent. The following sequence computes the set of blocks
480 // which currently have dead terminators that are control
481 // dependence sources of a block which is in NewLiveBlocks.
483 const SmallPtrSet<BasicBlock *, 16> BWDT{
484 BlocksWithDeadTerminators.begin(),
485 BlocksWithDeadTerminators.end()
487 SmallVector<BasicBlock *, 32> IDFBlocks;
488 ReverseIDFCalculator IDFs(PDT);
489 IDFs.setDefiningBlocks(NewLiveBlocks);
490 IDFs.setLiveInBlocks(BWDT);
491 IDFs.calculate(IDFBlocks);
492 NewLiveBlocks.clear();
494 // Dead terminators which control live blocks are now marked live.
495 for (auto *BB : IDFBlocks) {
496 LLVM_DEBUG(dbgs() << "live control in: " << BB->getName() << '\n');
497 markLive(BB->getTerminator());
501 //===----------------------------------------------------------------------===//
503 // Routines to update the CFG and SSA information before removing dead code.
505 //===----------------------------------------------------------------------===//
506 bool AggressiveDeadCodeElimination::removeDeadInstructions() {
507 // Updates control and dataflow around dead blocks
508 bool RegionsUpdated = updateDeadRegions();
511 for (Instruction &I : instructions(F)) {
512 // Check if the instruction is alive.
516 if (auto *DII = dyn_cast<DbgVariableIntrinsic>(&I)) {
517 // Check if the scope of this variable location is alive.
518 if (AliveScopes.count(DII->getDebugLoc()->getScope()))
521 // If intrinsic is pointing at a live SSA value, there may be an
522 // earlier optimization bug: if we know the location of the variable,
523 // why isn't the scope of the location alive?
524 if (Value *V = DII->getVariableLocation())
525 if (Instruction *II = dyn_cast<Instruction>(V))
527 dbgs() << "Dropping debug info for " << *DII << "\n";
532 // The inverse of the live set is the dead set. These are those instructions
533 // that have no side effects and do not influence the control flow or return
534 // value of the function, and may therefore be deleted safely.
535 // NOTE: We reuse the Worklist vector here for memory efficiency.
536 for (Instruction &I : instructions(F)) {
537 // Check if the instruction is alive.
541 if (auto *DII = dyn_cast<DbgInfoIntrinsic>(&I)) {
542 // Check if the scope of this variable location is alive.
543 if (AliveScopes.count(DII->getDebugLoc()->getScope()))
546 // Fallthrough and drop the intrinsic.
549 // Prepare to delete.
550 Worklist.push_back(&I);
551 I.dropAllReferences();
554 for (Instruction *&I : Worklist) {
556 I->eraseFromParent();
559 return !Worklist.empty() || RegionsUpdated;
562 // A dead region is the set of dead blocks with a common live post-dominator.
563 bool AggressiveDeadCodeElimination::updateDeadRegions() {
565 dbgs() << "final dead terminator blocks: " << '\n';
566 for (auto *BB : BlocksWithDeadTerminators)
567 dbgs() << '\t' << BB->getName()
568 << (BlockInfo[BB].Live ? " LIVE\n" : "\n");
571 // Don't compute the post ordering unless we needed it.
572 bool HavePostOrder = false;
573 bool Changed = false;
575 for (auto *BB : BlocksWithDeadTerminators) {
576 auto &Info = BlockInfo[BB];
577 if (Info.UnconditionalBranch) {
578 InstInfo[Info.Terminator].Live = true;
582 if (!HavePostOrder) {
583 computeReversePostOrder();
584 HavePostOrder = true;
587 // Add an unconditional branch to the successor closest to the
588 // end of the function which insures a path to the exit for each
590 BlockInfoType *PreferredSucc = nullptr;
591 for (auto *Succ : successors(BB)) {
592 auto *Info = &BlockInfo[Succ];
593 if (!PreferredSucc || PreferredSucc->PostOrder < Info->PostOrder)
594 PreferredSucc = Info;
596 assert((PreferredSucc && PreferredSucc->PostOrder > 0) &&
597 "Failed to find safe successor for dead branch");
599 // Collect removed successors to update the (Post)DominatorTrees.
600 SmallPtrSet<BasicBlock *, 4> RemovedSuccessors;
602 for (auto *Succ : successors(BB)) {
603 if (!First || Succ != PreferredSucc->BB) {
604 Succ->removePredecessor(BB);
605 RemovedSuccessors.insert(Succ);
609 makeUnconditional(BB, PreferredSucc->BB);
611 // Inform the dominators about the deleted CFG edges.
612 SmallVector<DominatorTree::UpdateType, 4> DeletedEdges;
613 for (auto *Succ : RemovedSuccessors) {
614 // It might have happened that the same successor appeared multiple times
615 // and the CFG edge wasn't really removed.
616 if (Succ != PreferredSucc->BB) {
617 LLVM_DEBUG(dbgs() << "ADCE: (Post)DomTree edge enqueued for deletion"
618 << BB->getName() << " -> " << Succ->getName()
620 DeletedEdges.push_back({DominatorTree::Delete, BB, Succ});
624 DomTreeUpdater(DT, &PDT, DomTreeUpdater::UpdateStrategy::Eager)
625 .applyUpdates(DeletedEdges);
627 NumBranchesRemoved += 1;
634 // reverse top-sort order
635 void AggressiveDeadCodeElimination::computeReversePostOrder() {
636 // This provides a post-order numbering of the reverse control flow graph
637 // Note that it is incomplete in the presence of infinite loops but we don't
638 // need numbers blocks which don't reach the end of the functions since
639 // all branches in those blocks are forced live.
641 // For each block without successors, extend the DFS from the block
642 // backward through the graph
643 SmallPtrSet<BasicBlock*, 16> Visited;
644 unsigned PostOrder = 0;
646 if (succ_begin(&BB) != succ_end(&BB))
648 for (BasicBlock *Block : inverse_post_order_ext(&BB,Visited))
649 BlockInfo[Block].PostOrder = PostOrder++;
653 void AggressiveDeadCodeElimination::makeUnconditional(BasicBlock *BB,
654 BasicBlock *Target) {
655 Instruction *PredTerm = BB->getTerminator();
656 // Collect the live debug info scopes attached to this instruction.
657 if (const DILocation *DL = PredTerm->getDebugLoc())
658 collectLiveScopes(*DL);
660 // Just mark live an existing unconditional branch
661 if (isUnconditionalBranch(PredTerm)) {
662 PredTerm->setSuccessor(0, Target);
663 InstInfo[PredTerm].Live = true;
666 LLVM_DEBUG(dbgs() << "making unconditional " << BB->getName() << '\n');
667 NumBranchesRemoved += 1;
668 IRBuilder<> Builder(PredTerm);
669 auto *NewTerm = Builder.CreateBr(Target);
670 InstInfo[NewTerm].Live = true;
671 if (const DILocation *DL = PredTerm->getDebugLoc())
672 NewTerm->setDebugLoc(DL);
674 InstInfo.erase(PredTerm);
675 PredTerm->eraseFromParent();
678 //===----------------------------------------------------------------------===//
680 // Pass Manager integration code
682 //===----------------------------------------------------------------------===//
683 PreservedAnalyses ADCEPass::run(Function &F, FunctionAnalysisManager &FAM) {
684 // ADCE does not need DominatorTree, but require DominatorTree here
685 // to update analysis if it is already available.
686 auto *DT = FAM.getCachedResult<DominatorTreeAnalysis>(F);
687 auto &PDT = FAM.getResult<PostDominatorTreeAnalysis>(F);
688 if (!AggressiveDeadCodeElimination(F, DT, PDT).performDeadCodeElimination())
689 return PreservedAnalyses::all();
691 PreservedAnalyses PA;
692 // TODO: We could track if we have actually done CFG changes.
693 if (!RemoveControlFlowFlag)
694 PA.preserveSet<CFGAnalyses>();
696 PA.preserve<DominatorTreeAnalysis>();
697 PA.preserve<PostDominatorTreeAnalysis>();
699 PA.preserve<GlobalsAA>();
705 struct ADCELegacyPass : public FunctionPass {
706 static char ID; // Pass identification, replacement for typeid
708 ADCELegacyPass() : FunctionPass(ID) {
709 initializeADCELegacyPassPass(*PassRegistry::getPassRegistry());
712 bool runOnFunction(Function &F) override {
716 // ADCE does not need DominatorTree, but require DominatorTree here
717 // to update analysis if it is already available.
718 auto *DTWP = getAnalysisIfAvailable<DominatorTreeWrapperPass>();
719 auto *DT = DTWP ? &DTWP->getDomTree() : nullptr;
720 auto &PDT = getAnalysis<PostDominatorTreeWrapperPass>().getPostDomTree();
721 return AggressiveDeadCodeElimination(F, DT, PDT)
722 .performDeadCodeElimination();
725 void getAnalysisUsage(AnalysisUsage &AU) const override {
726 AU.addRequired<PostDominatorTreeWrapperPass>();
727 if (!RemoveControlFlowFlag)
728 AU.setPreservesCFG();
730 AU.addPreserved<DominatorTreeWrapperPass>();
731 AU.addPreserved<PostDominatorTreeWrapperPass>();
733 AU.addPreserved<GlobalsAAWrapperPass>();
737 } // end anonymous namespace
739 char ADCELegacyPass::ID = 0;
741 INITIALIZE_PASS_BEGIN(ADCELegacyPass, "adce",
742 "Aggressive Dead Code Elimination", false, false)
743 INITIALIZE_PASS_DEPENDENCY(PostDominatorTreeWrapperPass)
744 INITIALIZE_PASS_END(ADCELegacyPass, "adce", "Aggressive Dead Code Elimination",
747 FunctionPass *llvm::createAggressiveDCEPass() { return new ADCELegacyPass(); }