2 * Copyright (c) 2007 Cisco, Inc. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
39 MLX4_SEND_DOORBELL = 0x14,
43 MLX4_WQE_CTRL_SOLICIT = 1 << 1,
44 MLX4_WQE_CTRL_CQ_UPDATE = 3 << 2,
45 MLX4_WQE_CTRL_IP_HDR_CSUM = 1 << 4,
46 MLX4_WQE_CTRL_TCP_UDP_CSUM = 1 << 5,
47 MLX4_WQE_CTRL_FENCE = 1 << 6,
48 MLX4_WQE_CTRL_STRONG_ORDER = 1 << 7
52 MLX4_WQE_BIND_TYPE_2 = (1<<31),
53 MLX4_WQE_BIND_ZERO_BASED = (1<<30),
57 MLX4_INLINE_SEG = 1 << 31,
58 MLX4_INLINE_ALIGN = 64,
62 MLX4_INVALID_LKEY = 0x100,
65 struct mlx4_wqe_ctrl_seg {
66 uint32_t owner_opcode;
75 * High 24 bits are SRC remote buffer; low 8 bits are flags:
76 * [7] SO (strong ordering)
77 * [5] TCP/UDP checksum
79 * [3:2] C (generate completion queue entry)
80 * [1] SE (solicited event)
81 * [0] FL (force loopback)
85 * imm is immediate data for send/RDMA write w/ immediate;
86 * also invalidation key for send with invalidate; input
87 * modifier for WQEs on CCQs.
92 struct mlx4_wqe_datagram_seg {
100 struct mlx4_wqe_data_seg {
106 struct mlx4_wqe_inline_seg {
110 struct mlx4_wqe_srq_next_seg {
112 uint16_t next_wqe_index;
113 uint32_t reserved2[3];
116 struct mlx4_wqe_local_inval_seg {
120 uint64_t reserved3[2];
124 MLX4_WQE_MW_REMOTE_READ = 1 << 29,
125 MLX4_WQE_MW_REMOTE_WRITE = 1 << 30,
126 MLX4_WQE_MW_ATOMIC = 1 << 31
129 struct mlx4_wqe_raddr_seg {
135 struct mlx4_wqe_atomic_seg {
140 struct mlx4_wqe_bind_seg {